xref: /openbmc/qemu/target/arm/tcg/mve_helper.c (revision 2b74dd91)
1 /*
2  * M-profile MVE Operations
3  *
4  * Copyright (c) 2021 Linaro, Ltd.
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "internals.h"
23 #include "vec_internal.h"
24 #include "exec/helper-proto.h"
25 #include "exec/cpu_ldst.h"
26 #include "exec/exec-all.h"
27 #include "tcg/tcg.h"
28 #include "fpu/softfloat.h"
29 #include "crypto/clmul.h"
30 
31 static uint16_t mve_eci_mask(CPUARMState *env)
32 {
33     /*
34      * Return the mask of which elements in the MVE vector correspond
35      * to beats being executed. The mask has 1 bits for executed lanes
36      * and 0 bits where ECI says this beat was already executed.
37      */
38     int eci;
39 
40     if ((env->condexec_bits & 0xf) != 0) {
41         return 0xffff;
42     }
43 
44     eci = env->condexec_bits >> 4;
45     switch (eci) {
46     case ECI_NONE:
47         return 0xffff;
48     case ECI_A0:
49         return 0xfff0;
50     case ECI_A0A1:
51         return 0xff00;
52     case ECI_A0A1A2:
53     case ECI_A0A1A2B0:
54         return 0xf000;
55     default:
56         g_assert_not_reached();
57     }
58 }
59 
60 static uint16_t mve_element_mask(CPUARMState *env)
61 {
62     /*
63      * Return the mask of which elements in the MVE vector should be
64      * updated. This is a combination of multiple things:
65      *  (1) by default, we update every lane in the vector
66      *  (2) VPT predication stores its state in the VPR register;
67      *  (3) low-overhead-branch tail predication will mask out part
68      *      the vector on the final iteration of the loop
69      *  (4) if EPSR.ECI is set then we must execute only some beats
70      *      of the insn
71      * We combine all these into a 16-bit result with the same semantics
72      * as VPR.P0: 0 to mask the lane, 1 if it is active.
73      * 8-bit vector ops will look at all bits of the result;
74      * 16-bit ops will look at bits 0, 2, 4, ...;
75      * 32-bit ops will look at bits 0, 4, 8 and 12.
76      * Compare pseudocode GetCurInstrBeat(), though that only returns
77      * the 4-bit slice of the mask corresponding to a single beat.
78      */
79     uint16_t mask = FIELD_EX32(env->v7m.vpr, V7M_VPR, P0);
80 
81     if (!(env->v7m.vpr & R_V7M_VPR_MASK01_MASK)) {
82         mask |= 0xff;
83     }
84     if (!(env->v7m.vpr & R_V7M_VPR_MASK23_MASK)) {
85         mask |= 0xff00;
86     }
87 
88     if (env->v7m.ltpsize < 4 &&
89         env->regs[14] <= (1 << (4 - env->v7m.ltpsize))) {
90         /*
91          * Tail predication active, and this is the last loop iteration.
92          * The element size is (1 << ltpsize), and we only want to process
93          * loopcount elements, so we want to retain the least significant
94          * (loopcount * esize) predicate bits and zero out bits above that.
95          */
96         int masklen = env->regs[14] << env->v7m.ltpsize;
97         assert(masklen <= 16);
98         uint16_t ltpmask = masklen ? MAKE_64BIT_MASK(0, masklen) : 0;
99         mask &= ltpmask;
100     }
101 
102     /*
103      * ECI bits indicate which beats are already executed;
104      * we handle this by effectively predicating them out.
105      */
106     mask &= mve_eci_mask(env);
107     return mask;
108 }
109 
110 static void mve_advance_vpt(CPUARMState *env)
111 {
112     /* Advance the VPT and ECI state if necessary */
113     uint32_t vpr = env->v7m.vpr;
114     unsigned mask01, mask23;
115     uint16_t inv_mask;
116     uint16_t eci_mask = mve_eci_mask(env);
117 
118     if ((env->condexec_bits & 0xf) == 0) {
119         env->condexec_bits = (env->condexec_bits == (ECI_A0A1A2B0 << 4)) ?
120             (ECI_A0 << 4) : (ECI_NONE << 4);
121     }
122 
123     if (!(vpr & (R_V7M_VPR_MASK01_MASK | R_V7M_VPR_MASK23_MASK))) {
124         /* VPT not enabled, nothing to do */
125         return;
126     }
127 
128     /* Invert P0 bits if needed, but only for beats we actually executed */
129     mask01 = FIELD_EX32(vpr, V7M_VPR, MASK01);
130     mask23 = FIELD_EX32(vpr, V7M_VPR, MASK23);
131     /* Start by assuming we invert all bits corresponding to executed beats */
132     inv_mask = eci_mask;
133     if (mask01 <= 8) {
134         /* MASK01 says don't invert low half of P0 */
135         inv_mask &= ~0xff;
136     }
137     if (mask23 <= 8) {
138         /* MASK23 says don't invert high half of P0 */
139         inv_mask &= ~0xff00;
140     }
141     vpr ^= inv_mask;
142     /* Only update MASK01 if beat 1 executed */
143     if (eci_mask & 0xf0) {
144         vpr = FIELD_DP32(vpr, V7M_VPR, MASK01, mask01 << 1);
145     }
146     /* Beat 3 always executes, so update MASK23 */
147     vpr = FIELD_DP32(vpr, V7M_VPR, MASK23, mask23 << 1);
148     env->v7m.vpr = vpr;
149 }
150 
151 /* For loads, predicated lanes are zeroed instead of keeping their old values */
152 #define DO_VLDR(OP, MSIZE, LDTYPE, ESIZE, TYPE)                         \
153     void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr)    \
154     {                                                                   \
155         TYPE *d = vd;                                                   \
156         uint16_t mask = mve_element_mask(env);                          \
157         uint16_t eci_mask = mve_eci_mask(env);                          \
158         unsigned b, e;                                                  \
159         /*                                                              \
160          * R_SXTM allows the dest reg to become UNKNOWN for abandoned   \
161          * beats so we don't care if we update part of the dest and     \
162          * then take an exception.                                      \
163          */                                                             \
164         for (b = 0, e = 0; b < 16; b += ESIZE, e++) {                   \
165             if (eci_mask & (1 << b)) {                                  \
166                 d[H##ESIZE(e)] = (mask & (1 << b)) ?                    \
167                     cpu_##LDTYPE##_data_ra(env, addr, GETPC()) : 0;     \
168             }                                                           \
169             addr += MSIZE;                                              \
170         }                                                               \
171         mve_advance_vpt(env);                                           \
172     }
173 
174 #define DO_VSTR(OP, MSIZE, STTYPE, ESIZE, TYPE)                         \
175     void HELPER(mve_##OP)(CPUARMState *env, void *vd, uint32_t addr)    \
176     {                                                                   \
177         TYPE *d = vd;                                                   \
178         uint16_t mask = mve_element_mask(env);                          \
179         unsigned b, e;                                                  \
180         for (b = 0, e = 0; b < 16; b += ESIZE, e++) {                   \
181             if (mask & (1 << b)) {                                      \
182                 cpu_##STTYPE##_data_ra(env, addr, d[H##ESIZE(e)], GETPC()); \
183             }                                                           \
184             addr += MSIZE;                                              \
185         }                                                               \
186         mve_advance_vpt(env);                                           \
187     }
188 
189 DO_VLDR(vldrb, 1, ldub, 1, uint8_t)
190 DO_VLDR(vldrh, 2, lduw, 2, uint16_t)
191 DO_VLDR(vldrw, 4, ldl, 4, uint32_t)
192 
193 DO_VSTR(vstrb, 1, stb, 1, uint8_t)
194 DO_VSTR(vstrh, 2, stw, 2, uint16_t)
195 DO_VSTR(vstrw, 4, stl, 4, uint32_t)
196 
197 DO_VLDR(vldrb_sh, 1, ldsb, 2, int16_t)
198 DO_VLDR(vldrb_sw, 1, ldsb, 4, int32_t)
199 DO_VLDR(vldrb_uh, 1, ldub, 2, uint16_t)
200 DO_VLDR(vldrb_uw, 1, ldub, 4, uint32_t)
201 DO_VLDR(vldrh_sw, 2, ldsw, 4, int32_t)
202 DO_VLDR(vldrh_uw, 2, lduw, 4, uint32_t)
203 
204 DO_VSTR(vstrb_h, 1, stb, 2, int16_t)
205 DO_VSTR(vstrb_w, 1, stb, 4, int32_t)
206 DO_VSTR(vstrh_w, 2, stw, 4, int32_t)
207 
208 #undef DO_VLDR
209 #undef DO_VSTR
210 
211 /*
212  * Gather loads/scatter stores. Here each element of Qm specifies
213  * an offset to use from the base register Rm. In the _os_ versions
214  * that offset is scaled by the element size.
215  * For loads, predicated lanes are zeroed instead of retaining
216  * their previous values.
217  */
218 #define DO_VLDR_SG(OP, LDTYPE, ESIZE, TYPE, OFFTYPE, ADDRFN, WB)        \
219     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm,         \
220                           uint32_t base)                                \
221     {                                                                   \
222         TYPE *d = vd;                                                   \
223         OFFTYPE *m = vm;                                                \
224         uint16_t mask = mve_element_mask(env);                          \
225         uint16_t eci_mask = mve_eci_mask(env);                          \
226         unsigned e;                                                     \
227         uint32_t addr;                                                  \
228         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE, eci_mask >>= ESIZE) { \
229             if (!(eci_mask & 1)) {                                      \
230                 continue;                                               \
231             }                                                           \
232             addr = ADDRFN(base, m[H##ESIZE(e)]);                        \
233             d[H##ESIZE(e)] = (mask & 1) ?                               \
234                 cpu_##LDTYPE##_data_ra(env, addr, GETPC()) : 0;         \
235             if (WB) {                                                   \
236                 m[H##ESIZE(e)] = addr;                                  \
237             }                                                           \
238         }                                                               \
239         mve_advance_vpt(env);                                           \
240     }
241 
242 /* We know here TYPE is unsigned so always the same as the offset type */
243 #define DO_VSTR_SG(OP, STTYPE, ESIZE, TYPE, ADDRFN, WB)                 \
244     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm,         \
245                           uint32_t base)                                \
246     {                                                                   \
247         TYPE *d = vd;                                                   \
248         TYPE *m = vm;                                                   \
249         uint16_t mask = mve_element_mask(env);                          \
250         uint16_t eci_mask = mve_eci_mask(env);                          \
251         unsigned e;                                                     \
252         uint32_t addr;                                                  \
253         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE, eci_mask >>= ESIZE) { \
254             if (!(eci_mask & 1)) {                                      \
255                 continue;                                               \
256             }                                                           \
257             addr = ADDRFN(base, m[H##ESIZE(e)]);                        \
258             if (mask & 1) {                                             \
259                 cpu_##STTYPE##_data_ra(env, addr, d[H##ESIZE(e)], GETPC()); \
260             }                                                           \
261             if (WB) {                                                   \
262                 m[H##ESIZE(e)] = addr;                                  \
263             }                                                           \
264         }                                                               \
265         mve_advance_vpt(env);                                           \
266     }
267 
268 /*
269  * 64-bit accesses are slightly different: they are done as two 32-bit
270  * accesses, controlled by the predicate mask for the relevant beat,
271  * and with a single 32-bit offset in the first of the two Qm elements.
272  * Note that for QEMU our IMPDEF AIRCR.ENDIANNESS is always 0 (little).
273  * Address writeback happens on the odd beats and updates the address
274  * stored in the even-beat element.
275  */
276 #define DO_VLDR64_SG(OP, ADDRFN, WB)                                    \
277     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm,         \
278                           uint32_t base)                                \
279     {                                                                   \
280         uint32_t *d = vd;                                               \
281         uint32_t *m = vm;                                               \
282         uint16_t mask = mve_element_mask(env);                          \
283         uint16_t eci_mask = mve_eci_mask(env);                          \
284         unsigned e;                                                     \
285         uint32_t addr;                                                  \
286         for (e = 0; e < 16 / 4; e++, mask >>= 4, eci_mask >>= 4) {      \
287             if (!(eci_mask & 1)) {                                      \
288                 continue;                                               \
289             }                                                           \
290             addr = ADDRFN(base, m[H4(e & ~1)]);                         \
291             addr += 4 * (e & 1);                                        \
292             d[H4(e)] = (mask & 1) ? cpu_ldl_data_ra(env, addr, GETPC()) : 0; \
293             if (WB && (e & 1)) {                                        \
294                 m[H4(e & ~1)] = addr - 4;                               \
295             }                                                           \
296         }                                                               \
297         mve_advance_vpt(env);                                           \
298     }
299 
300 #define DO_VSTR64_SG(OP, ADDRFN, WB)                                    \
301     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm,         \
302                           uint32_t base)                                \
303     {                                                                   \
304         uint32_t *d = vd;                                               \
305         uint32_t *m = vm;                                               \
306         uint16_t mask = mve_element_mask(env);                          \
307         uint16_t eci_mask = mve_eci_mask(env);                          \
308         unsigned e;                                                     \
309         uint32_t addr;                                                  \
310         for (e = 0; e < 16 / 4; e++, mask >>= 4, eci_mask >>= 4) {      \
311             if (!(eci_mask & 1)) {                                      \
312                 continue;                                               \
313             }                                                           \
314             addr = ADDRFN(base, m[H4(e & ~1)]);                         \
315             addr += 4 * (e & 1);                                        \
316             if (mask & 1) {                                             \
317                 cpu_stl_data_ra(env, addr, d[H4(e)], GETPC());          \
318             }                                                           \
319             if (WB && (e & 1)) {                                        \
320                 m[H4(e & ~1)] = addr - 4;                               \
321             }                                                           \
322         }                                                               \
323         mve_advance_vpt(env);                                           \
324     }
325 
326 #define ADDR_ADD(BASE, OFFSET) ((BASE) + (OFFSET))
327 #define ADDR_ADD_OSH(BASE, OFFSET) ((BASE) + ((OFFSET) << 1))
328 #define ADDR_ADD_OSW(BASE, OFFSET) ((BASE) + ((OFFSET) << 2))
329 #define ADDR_ADD_OSD(BASE, OFFSET) ((BASE) + ((OFFSET) << 3))
330 
331 DO_VLDR_SG(vldrb_sg_sh, ldsb, 2, int16_t, uint16_t, ADDR_ADD, false)
332 DO_VLDR_SG(vldrb_sg_sw, ldsb, 4, int32_t, uint32_t, ADDR_ADD, false)
333 DO_VLDR_SG(vldrh_sg_sw, ldsw, 4, int32_t, uint32_t, ADDR_ADD, false)
334 
335 DO_VLDR_SG(vldrb_sg_ub, ldub, 1, uint8_t, uint8_t, ADDR_ADD, false)
336 DO_VLDR_SG(vldrb_sg_uh, ldub, 2, uint16_t, uint16_t, ADDR_ADD, false)
337 DO_VLDR_SG(vldrb_sg_uw, ldub, 4, uint32_t, uint32_t, ADDR_ADD, false)
338 DO_VLDR_SG(vldrh_sg_uh, lduw, 2, uint16_t, uint16_t, ADDR_ADD, false)
339 DO_VLDR_SG(vldrh_sg_uw, lduw, 4, uint32_t, uint32_t, ADDR_ADD, false)
340 DO_VLDR_SG(vldrw_sg_uw, ldl, 4, uint32_t, uint32_t, ADDR_ADD, false)
341 DO_VLDR64_SG(vldrd_sg_ud, ADDR_ADD, false)
342 
343 DO_VLDR_SG(vldrh_sg_os_sw, ldsw, 4, int32_t, uint32_t, ADDR_ADD_OSH, false)
344 DO_VLDR_SG(vldrh_sg_os_uh, lduw, 2, uint16_t, uint16_t, ADDR_ADD_OSH, false)
345 DO_VLDR_SG(vldrh_sg_os_uw, lduw, 4, uint32_t, uint32_t, ADDR_ADD_OSH, false)
346 DO_VLDR_SG(vldrw_sg_os_uw, ldl, 4, uint32_t, uint32_t, ADDR_ADD_OSW, false)
347 DO_VLDR64_SG(vldrd_sg_os_ud, ADDR_ADD_OSD, false)
348 
349 DO_VSTR_SG(vstrb_sg_ub, stb, 1, uint8_t, ADDR_ADD, false)
350 DO_VSTR_SG(vstrb_sg_uh, stb, 2, uint16_t, ADDR_ADD, false)
351 DO_VSTR_SG(vstrb_sg_uw, stb, 4, uint32_t, ADDR_ADD, false)
352 DO_VSTR_SG(vstrh_sg_uh, stw, 2, uint16_t, ADDR_ADD, false)
353 DO_VSTR_SG(vstrh_sg_uw, stw, 4, uint32_t, ADDR_ADD, false)
354 DO_VSTR_SG(vstrw_sg_uw, stl, 4, uint32_t, ADDR_ADD, false)
355 DO_VSTR64_SG(vstrd_sg_ud, ADDR_ADD, false)
356 
357 DO_VSTR_SG(vstrh_sg_os_uh, stw, 2, uint16_t, ADDR_ADD_OSH, false)
358 DO_VSTR_SG(vstrh_sg_os_uw, stw, 4, uint32_t, ADDR_ADD_OSH, false)
359 DO_VSTR_SG(vstrw_sg_os_uw, stl, 4, uint32_t, ADDR_ADD_OSW, false)
360 DO_VSTR64_SG(vstrd_sg_os_ud, ADDR_ADD_OSD, false)
361 
362 DO_VLDR_SG(vldrw_sg_wb_uw, ldl, 4, uint32_t, uint32_t, ADDR_ADD, true)
363 DO_VLDR64_SG(vldrd_sg_wb_ud, ADDR_ADD, true)
364 DO_VSTR_SG(vstrw_sg_wb_uw, stl, 4, uint32_t, ADDR_ADD, true)
365 DO_VSTR64_SG(vstrd_sg_wb_ud, ADDR_ADD, true)
366 
367 /*
368  * Deinterleaving loads/interleaving stores.
369  *
370  * For these helpers we are passed the index of the first Qreg
371  * (VLD2/VST2 will also access Qn+1, VLD4/VST4 access Qn .. Qn+3)
372  * and the value of the base address register Rn.
373  * The helpers are specialized for pattern and element size, so
374  * for instance vld42h is VLD4 with pattern 2, element size MO_16.
375  *
376  * These insns are beatwise but not predicated, so we must honour ECI,
377  * but need not look at mve_element_mask().
378  *
379  * The pseudocode implements these insns with multiple memory accesses
380  * of the element size, but rules R_VVVG and R_FXDM permit us to make
381  * one 32-bit memory access per beat.
382  */
383 #define DO_VLD4B(OP, O1, O2, O3, O4)                                    \
384     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
385                           uint32_t base)                                \
386     {                                                                   \
387         int beat, e;                                                    \
388         uint16_t mask = mve_eci_mask(env);                              \
389         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
390         uint32_t addr, data;                                            \
391         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
392             if ((mask & 1) == 0) {                                      \
393                 /* ECI says skip this beat */                           \
394                 continue;                                               \
395             }                                                           \
396             addr = base + off[beat] * 4;                                \
397             data = cpu_ldl_le_data_ra(env, addr, GETPC());              \
398             for (e = 0; e < 4; e++, data >>= 8) {                       \
399                 uint8_t *qd = (uint8_t *)aa32_vfp_qreg(env, qnidx + e); \
400                 qd[H1(off[beat])] = data;                               \
401             }                                                           \
402         }                                                               \
403     }
404 
405 #define DO_VLD4H(OP, O1, O2)                                            \
406     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
407                           uint32_t base)                                \
408     {                                                                   \
409         int beat;                                                       \
410         uint16_t mask = mve_eci_mask(env);                              \
411         static const uint8_t off[4] = { O1, O1, O2, O2 };               \
412         uint32_t addr, data;                                            \
413         int y; /* y counts 0 2 0 2 */                                   \
414         uint16_t *qd;                                                   \
415         for (beat = 0, y = 0; beat < 4; beat++, mask >>= 4, y ^= 2) {   \
416             if ((mask & 1) == 0) {                                      \
417                 /* ECI says skip this beat */                           \
418                 continue;                                               \
419             }                                                           \
420             addr = base + off[beat] * 8 + (beat & 1) * 4;               \
421             data = cpu_ldl_le_data_ra(env, addr, GETPC());              \
422             qd = (uint16_t *)aa32_vfp_qreg(env, qnidx + y);             \
423             qd[H2(off[beat])] = data;                                   \
424             data >>= 16;                                                \
425             qd = (uint16_t *)aa32_vfp_qreg(env, qnidx + y + 1);         \
426             qd[H2(off[beat])] = data;                                   \
427         }                                                               \
428     }
429 
430 #define DO_VLD4W(OP, O1, O2, O3, O4)                                    \
431     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
432                           uint32_t base)                                \
433     {                                                                   \
434         int beat;                                                       \
435         uint16_t mask = mve_eci_mask(env);                              \
436         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
437         uint32_t addr, data;                                            \
438         uint32_t *qd;                                                   \
439         int y;                                                          \
440         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
441             if ((mask & 1) == 0) {                                      \
442                 /* ECI says skip this beat */                           \
443                 continue;                                               \
444             }                                                           \
445             addr = base + off[beat] * 4;                                \
446             data = cpu_ldl_le_data_ra(env, addr, GETPC());              \
447             y = (beat + (O1 & 2)) & 3;                                  \
448             qd = (uint32_t *)aa32_vfp_qreg(env, qnidx + y);             \
449             qd[H4(off[beat] >> 2)] = data;                              \
450         }                                                               \
451     }
452 
453 DO_VLD4B(vld40b, 0, 1, 10, 11)
454 DO_VLD4B(vld41b, 2, 3, 12, 13)
455 DO_VLD4B(vld42b, 4, 5, 14, 15)
456 DO_VLD4B(vld43b, 6, 7, 8, 9)
457 
458 DO_VLD4H(vld40h, 0, 5)
459 DO_VLD4H(vld41h, 1, 6)
460 DO_VLD4H(vld42h, 2, 7)
461 DO_VLD4H(vld43h, 3, 4)
462 
463 DO_VLD4W(vld40w, 0, 1, 10, 11)
464 DO_VLD4W(vld41w, 2, 3, 12, 13)
465 DO_VLD4W(vld42w, 4, 5, 14, 15)
466 DO_VLD4W(vld43w, 6, 7, 8, 9)
467 
468 #define DO_VLD2B(OP, O1, O2, O3, O4)                                    \
469     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
470                           uint32_t base)                                \
471     {                                                                   \
472         int beat, e;                                                    \
473         uint16_t mask = mve_eci_mask(env);                              \
474         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
475         uint32_t addr, data;                                            \
476         uint8_t *qd;                                                    \
477         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
478             if ((mask & 1) == 0) {                                      \
479                 /* ECI says skip this beat */                           \
480                 continue;                                               \
481             }                                                           \
482             addr = base + off[beat] * 2;                                \
483             data = cpu_ldl_le_data_ra(env, addr, GETPC());              \
484             for (e = 0; e < 4; e++, data >>= 8) {                       \
485                 qd = (uint8_t *)aa32_vfp_qreg(env, qnidx + (e & 1));    \
486                 qd[H1(off[beat] + (e >> 1))] = data;                    \
487             }                                                           \
488         }                                                               \
489     }
490 
491 #define DO_VLD2H(OP, O1, O2, O3, O4)                                    \
492     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
493                           uint32_t base)                                \
494     {                                                                   \
495         int beat;                                                       \
496         uint16_t mask = mve_eci_mask(env);                              \
497         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
498         uint32_t addr, data;                                            \
499         int e;                                                          \
500         uint16_t *qd;                                                   \
501         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
502             if ((mask & 1) == 0) {                                      \
503                 /* ECI says skip this beat */                           \
504                 continue;                                               \
505             }                                                           \
506             addr = base + off[beat] * 4;                                \
507             data = cpu_ldl_le_data_ra(env, addr, GETPC());              \
508             for (e = 0; e < 2; e++, data >>= 16) {                      \
509                 qd = (uint16_t *)aa32_vfp_qreg(env, qnidx + e);         \
510                 qd[H2(off[beat])] = data;                               \
511             }                                                           \
512         }                                                               \
513     }
514 
515 #define DO_VLD2W(OP, O1, O2, O3, O4)                                    \
516     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
517                           uint32_t base)                                \
518     {                                                                   \
519         int beat;                                                       \
520         uint16_t mask = mve_eci_mask(env);                              \
521         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
522         uint32_t addr, data;                                            \
523         uint32_t *qd;                                                   \
524         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
525             if ((mask & 1) == 0) {                                      \
526                 /* ECI says skip this beat */                           \
527                 continue;                                               \
528             }                                                           \
529             addr = base + off[beat];                                    \
530             data = cpu_ldl_le_data_ra(env, addr, GETPC());              \
531             qd = (uint32_t *)aa32_vfp_qreg(env, qnidx + (beat & 1));    \
532             qd[H4(off[beat] >> 3)] = data;                              \
533         }                                                               \
534     }
535 
536 DO_VLD2B(vld20b, 0, 2, 12, 14)
537 DO_VLD2B(vld21b, 4, 6, 8, 10)
538 
539 DO_VLD2H(vld20h, 0, 1, 6, 7)
540 DO_VLD2H(vld21h, 2, 3, 4, 5)
541 
542 DO_VLD2W(vld20w, 0, 4, 24, 28)
543 DO_VLD2W(vld21w, 8, 12, 16, 20)
544 
545 #define DO_VST4B(OP, O1, O2, O3, O4)                                    \
546     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
547                           uint32_t base)                                \
548     {                                                                   \
549         int beat, e;                                                    \
550         uint16_t mask = mve_eci_mask(env);                              \
551         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
552         uint32_t addr, data;                                            \
553         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
554             if ((mask & 1) == 0) {                                      \
555                 /* ECI says skip this beat */                           \
556                 continue;                                               \
557             }                                                           \
558             addr = base + off[beat] * 4;                                \
559             data = 0;                                                   \
560             for (e = 3; e >= 0; e--) {                                  \
561                 uint8_t *qd = (uint8_t *)aa32_vfp_qreg(env, qnidx + e); \
562                 data = (data << 8) | qd[H1(off[beat])];                 \
563             }                                                           \
564             cpu_stl_le_data_ra(env, addr, data, GETPC());               \
565         }                                                               \
566     }
567 
568 #define DO_VST4H(OP, O1, O2)                                            \
569     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
570                           uint32_t base)                                \
571     {                                                                   \
572         int beat;                                                       \
573         uint16_t mask = mve_eci_mask(env);                              \
574         static const uint8_t off[4] = { O1, O1, O2, O2 };               \
575         uint32_t addr, data;                                            \
576         int y; /* y counts 0 2 0 2 */                                   \
577         uint16_t *qd;                                                   \
578         for (beat = 0, y = 0; beat < 4; beat++, mask >>= 4, y ^= 2) {   \
579             if ((mask & 1) == 0) {                                      \
580                 /* ECI says skip this beat */                           \
581                 continue;                                               \
582             }                                                           \
583             addr = base + off[beat] * 8 + (beat & 1) * 4;               \
584             qd = (uint16_t *)aa32_vfp_qreg(env, qnidx + y);             \
585             data = qd[H2(off[beat])];                                   \
586             qd = (uint16_t *)aa32_vfp_qreg(env, qnidx + y + 1);         \
587             data |= qd[H2(off[beat])] << 16;                            \
588             cpu_stl_le_data_ra(env, addr, data, GETPC());               \
589         }                                                               \
590     }
591 
592 #define DO_VST4W(OP, O1, O2, O3, O4)                                    \
593     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
594                           uint32_t base)                                \
595     {                                                                   \
596         int beat;                                                       \
597         uint16_t mask = mve_eci_mask(env);                              \
598         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
599         uint32_t addr, data;                                            \
600         uint32_t *qd;                                                   \
601         int y;                                                          \
602         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
603             if ((mask & 1) == 0) {                                      \
604                 /* ECI says skip this beat */                           \
605                 continue;                                               \
606             }                                                           \
607             addr = base + off[beat] * 4;                                \
608             y = (beat + (O1 & 2)) & 3;                                  \
609             qd = (uint32_t *)aa32_vfp_qreg(env, qnidx + y);             \
610             data = qd[H4(off[beat] >> 2)];                              \
611             cpu_stl_le_data_ra(env, addr, data, GETPC());               \
612         }                                                               \
613     }
614 
615 DO_VST4B(vst40b, 0, 1, 10, 11)
616 DO_VST4B(vst41b, 2, 3, 12, 13)
617 DO_VST4B(vst42b, 4, 5, 14, 15)
618 DO_VST4B(vst43b, 6, 7, 8, 9)
619 
620 DO_VST4H(vst40h, 0, 5)
621 DO_VST4H(vst41h, 1, 6)
622 DO_VST4H(vst42h, 2, 7)
623 DO_VST4H(vst43h, 3, 4)
624 
625 DO_VST4W(vst40w, 0, 1, 10, 11)
626 DO_VST4W(vst41w, 2, 3, 12, 13)
627 DO_VST4W(vst42w, 4, 5, 14, 15)
628 DO_VST4W(vst43w, 6, 7, 8, 9)
629 
630 #define DO_VST2B(OP, O1, O2, O3, O4)                                    \
631     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
632                           uint32_t base)                                \
633     {                                                                   \
634         int beat, e;                                                    \
635         uint16_t mask = mve_eci_mask(env);                              \
636         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
637         uint32_t addr, data;                                            \
638         uint8_t *qd;                                                    \
639         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
640             if ((mask & 1) == 0) {                                      \
641                 /* ECI says skip this beat */                           \
642                 continue;                                               \
643             }                                                           \
644             addr = base + off[beat] * 2;                                \
645             data = 0;                                                   \
646             for (e = 3; e >= 0; e--) {                                  \
647                 qd = (uint8_t *)aa32_vfp_qreg(env, qnidx + (e & 1));    \
648                 data = (data << 8) | qd[H1(off[beat] + (e >> 1))];      \
649             }                                                           \
650             cpu_stl_le_data_ra(env, addr, data, GETPC());               \
651         }                                                               \
652     }
653 
654 #define DO_VST2H(OP, O1, O2, O3, O4)                                    \
655     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
656                           uint32_t base)                                \
657     {                                                                   \
658         int beat;                                                       \
659         uint16_t mask = mve_eci_mask(env);                              \
660         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
661         uint32_t addr, data;                                            \
662         int e;                                                          \
663         uint16_t *qd;                                                   \
664         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
665             if ((mask & 1) == 0) {                                      \
666                 /* ECI says skip this beat */                           \
667                 continue;                                               \
668             }                                                           \
669             addr = base + off[beat] * 4;                                \
670             data = 0;                                                   \
671             for (e = 1; e >= 0; e--) {                                  \
672                 qd = (uint16_t *)aa32_vfp_qreg(env, qnidx + e);         \
673                 data = (data << 16) | qd[H2(off[beat])];                \
674             }                                                           \
675             cpu_stl_le_data_ra(env, addr, data, GETPC());               \
676         }                                                               \
677     }
678 
679 #define DO_VST2W(OP, O1, O2, O3, O4)                                    \
680     void HELPER(mve_##OP)(CPUARMState *env, uint32_t qnidx,             \
681                           uint32_t base)                                \
682     {                                                                   \
683         int beat;                                                       \
684         uint16_t mask = mve_eci_mask(env);                              \
685         static const uint8_t off[4] = { O1, O2, O3, O4 };               \
686         uint32_t addr, data;                                            \
687         uint32_t *qd;                                                   \
688         for (beat = 0; beat < 4; beat++, mask >>= 4) {                  \
689             if ((mask & 1) == 0) {                                      \
690                 /* ECI says skip this beat */                           \
691                 continue;                                               \
692             }                                                           \
693             addr = base + off[beat];                                    \
694             qd = (uint32_t *)aa32_vfp_qreg(env, qnidx + (beat & 1));    \
695             data = qd[H4(off[beat] >> 3)];                              \
696             cpu_stl_le_data_ra(env, addr, data, GETPC());               \
697         }                                                               \
698     }
699 
700 DO_VST2B(vst20b, 0, 2, 12, 14)
701 DO_VST2B(vst21b, 4, 6, 8, 10)
702 
703 DO_VST2H(vst20h, 0, 1, 6, 7)
704 DO_VST2H(vst21h, 2, 3, 4, 5)
705 
706 DO_VST2W(vst20w, 0, 4, 24, 28)
707 DO_VST2W(vst21w, 8, 12, 16, 20)
708 
709 /*
710  * The mergemask(D, R, M) macro performs the operation "*D = R" but
711  * storing only the bytes which correspond to 1 bits in M,
712  * leaving other bytes in *D unchanged. We use _Generic
713  * to select the correct implementation based on the type of D.
714  */
715 
716 static void mergemask_ub(uint8_t *d, uint8_t r, uint16_t mask)
717 {
718     if (mask & 1) {
719         *d = r;
720     }
721 }
722 
723 static void mergemask_sb(int8_t *d, int8_t r, uint16_t mask)
724 {
725     mergemask_ub((uint8_t *)d, r, mask);
726 }
727 
728 static void mergemask_uh(uint16_t *d, uint16_t r, uint16_t mask)
729 {
730     uint16_t bmask = expand_pred_b(mask);
731     *d = (*d & ~bmask) | (r & bmask);
732 }
733 
734 static void mergemask_sh(int16_t *d, int16_t r, uint16_t mask)
735 {
736     mergemask_uh((uint16_t *)d, r, mask);
737 }
738 
739 static void mergemask_uw(uint32_t *d, uint32_t r, uint16_t mask)
740 {
741     uint32_t bmask = expand_pred_b(mask);
742     *d = (*d & ~bmask) | (r & bmask);
743 }
744 
745 static void mergemask_sw(int32_t *d, int32_t r, uint16_t mask)
746 {
747     mergemask_uw((uint32_t *)d, r, mask);
748 }
749 
750 static void mergemask_uq(uint64_t *d, uint64_t r, uint16_t mask)
751 {
752     uint64_t bmask = expand_pred_b(mask);
753     *d = (*d & ~bmask) | (r & bmask);
754 }
755 
756 static void mergemask_sq(int64_t *d, int64_t r, uint16_t mask)
757 {
758     mergemask_uq((uint64_t *)d, r, mask);
759 }
760 
761 #define mergemask(D, R, M)                      \
762     _Generic(D,                                 \
763              uint8_t *: mergemask_ub,           \
764              int8_t *:  mergemask_sb,           \
765              uint16_t *: mergemask_uh,          \
766              int16_t *:  mergemask_sh,          \
767              uint32_t *: mergemask_uw,          \
768              int32_t *:  mergemask_sw,          \
769              uint64_t *: mergemask_uq,          \
770              int64_t *:  mergemask_sq)(D, R, M)
771 
772 void HELPER(mve_vdup)(CPUARMState *env, void *vd, uint32_t val)
773 {
774     /*
775      * The generated code already replicated an 8 or 16 bit constant
776      * into the 32-bit value, so we only need to write the 32-bit
777      * value to all elements of the Qreg, allowing for predication.
778      */
779     uint32_t *d = vd;
780     uint16_t mask = mve_element_mask(env);
781     unsigned e;
782     for (e = 0; e < 16 / 4; e++, mask >>= 4) {
783         mergemask(&d[H4(e)], val, mask);
784     }
785     mve_advance_vpt(env);
786 }
787 
788 #define DO_1OP(OP, ESIZE, TYPE, FN)                                     \
789     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \
790     {                                                                   \
791         TYPE *d = vd, *m = vm;                                          \
792         uint16_t mask = mve_element_mask(env);                          \
793         unsigned e;                                                     \
794         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
795             mergemask(&d[H##ESIZE(e)], FN(m[H##ESIZE(e)]), mask);       \
796         }                                                               \
797         mve_advance_vpt(env);                                           \
798     }
799 
800 #define DO_CLS_B(N)   (clrsb32(N) - 24)
801 #define DO_CLS_H(N)   (clrsb32(N) - 16)
802 
803 DO_1OP(vclsb, 1, int8_t, DO_CLS_B)
804 DO_1OP(vclsh, 2, int16_t, DO_CLS_H)
805 DO_1OP(vclsw, 4, int32_t, clrsb32)
806 
807 #define DO_CLZ_B(N)   (clz32(N) - 24)
808 #define DO_CLZ_H(N)   (clz32(N) - 16)
809 
810 DO_1OP(vclzb, 1, uint8_t, DO_CLZ_B)
811 DO_1OP(vclzh, 2, uint16_t, DO_CLZ_H)
812 DO_1OP(vclzw, 4, uint32_t, clz32)
813 
814 DO_1OP(vrev16b, 2, uint16_t, bswap16)
815 DO_1OP(vrev32b, 4, uint32_t, bswap32)
816 DO_1OP(vrev32h, 4, uint32_t, hswap32)
817 DO_1OP(vrev64b, 8, uint64_t, bswap64)
818 DO_1OP(vrev64h, 8, uint64_t, hswap64)
819 DO_1OP(vrev64w, 8, uint64_t, wswap64)
820 
821 #define DO_NOT(N) (~(N))
822 
823 DO_1OP(vmvn, 8, uint64_t, DO_NOT)
824 
825 #define DO_ABS(N) ((N) < 0 ? -(N) : (N))
826 #define DO_FABSH(N)  ((N) & dup_const(MO_16, 0x7fff))
827 #define DO_FABSS(N)  ((N) & dup_const(MO_32, 0x7fffffff))
828 
829 DO_1OP(vabsb, 1, int8_t, DO_ABS)
830 DO_1OP(vabsh, 2, int16_t, DO_ABS)
831 DO_1OP(vabsw, 4, int32_t, DO_ABS)
832 
833 /* We can do these 64 bits at a time */
834 DO_1OP(vfabsh, 8, uint64_t, DO_FABSH)
835 DO_1OP(vfabss, 8, uint64_t, DO_FABSS)
836 
837 #define DO_NEG(N)    (-(N))
838 #define DO_FNEGH(N) ((N) ^ dup_const(MO_16, 0x8000))
839 #define DO_FNEGS(N) ((N) ^ dup_const(MO_32, 0x80000000))
840 
841 DO_1OP(vnegb, 1, int8_t, DO_NEG)
842 DO_1OP(vnegh, 2, int16_t, DO_NEG)
843 DO_1OP(vnegw, 4, int32_t, DO_NEG)
844 
845 /* We can do these 64 bits at a time */
846 DO_1OP(vfnegh, 8, uint64_t, DO_FNEGH)
847 DO_1OP(vfnegs, 8, uint64_t, DO_FNEGS)
848 
849 /*
850  * 1 operand immediates: Vda is destination and possibly also one source.
851  * All these insns work at 64-bit widths.
852  */
853 #define DO_1OP_IMM(OP, FN)                                              \
854     void HELPER(mve_##OP)(CPUARMState *env, void *vda, uint64_t imm)    \
855     {                                                                   \
856         uint64_t *da = vda;                                             \
857         uint16_t mask = mve_element_mask(env);                          \
858         unsigned e;                                                     \
859         for (e = 0; e < 16 / 8; e++, mask >>= 8) {                      \
860             mergemask(&da[H8(e)], FN(da[H8(e)], imm), mask);            \
861         }                                                               \
862         mve_advance_vpt(env);                                           \
863     }
864 
865 #define DO_MOVI(N, I) (I)
866 #define DO_ANDI(N, I) ((N) & (I))
867 #define DO_ORRI(N, I) ((N) | (I))
868 
869 DO_1OP_IMM(vmovi, DO_MOVI)
870 DO_1OP_IMM(vandi, DO_ANDI)
871 DO_1OP_IMM(vorri, DO_ORRI)
872 
873 #define DO_2OP(OP, ESIZE, TYPE, FN)                                     \
874     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
875                                 void *vd, void *vn, void *vm)           \
876     {                                                                   \
877         TYPE *d = vd, *n = vn, *m = vm;                                 \
878         uint16_t mask = mve_element_mask(env);                          \
879         unsigned e;                                                     \
880         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
881             mergemask(&d[H##ESIZE(e)],                                  \
882                       FN(n[H##ESIZE(e)], m[H##ESIZE(e)]), mask);        \
883         }                                                               \
884         mve_advance_vpt(env);                                           \
885     }
886 
887 /* provide unsigned 2-op helpers for all sizes */
888 #define DO_2OP_U(OP, FN)                        \
889     DO_2OP(OP##b, 1, uint8_t, FN)               \
890     DO_2OP(OP##h, 2, uint16_t, FN)              \
891     DO_2OP(OP##w, 4, uint32_t, FN)
892 
893 /* provide signed 2-op helpers for all sizes */
894 #define DO_2OP_S(OP, FN)                        \
895     DO_2OP(OP##b, 1, int8_t, FN)                \
896     DO_2OP(OP##h, 2, int16_t, FN)               \
897     DO_2OP(OP##w, 4, int32_t, FN)
898 
899 /*
900  * "Long" operations where two half-sized inputs (taken from either the
901  * top or the bottom of the input vector) produce a double-width result.
902  * Here ESIZE, TYPE are for the input, and LESIZE, LTYPE for the output.
903  */
904 #define DO_2OP_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)               \
905     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
906     {                                                                   \
907         LTYPE *d = vd;                                                  \
908         TYPE *n = vn, *m = vm;                                          \
909         uint16_t mask = mve_element_mask(env);                          \
910         unsigned le;                                                    \
911         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
912             LTYPE r = FN((LTYPE)n[H##ESIZE(le * 2 + TOP)],              \
913                          m[H##ESIZE(le * 2 + TOP)]);                    \
914             mergemask(&d[H##LESIZE(le)], r, mask);                      \
915         }                                                               \
916         mve_advance_vpt(env);                                           \
917     }
918 
919 #define DO_2OP_SAT(OP, ESIZE, TYPE, FN)                                 \
920     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
921     {                                                                   \
922         TYPE *d = vd, *n = vn, *m = vm;                                 \
923         uint16_t mask = mve_element_mask(env);                          \
924         unsigned e;                                                     \
925         bool qc = false;                                                \
926         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
927             bool sat = false;                                           \
928             TYPE r_ = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], &sat);         \
929             mergemask(&d[H##ESIZE(e)], r_, mask);                       \
930             qc |= sat & mask & 1;                                       \
931         }                                                               \
932         if (qc) {                                                       \
933             env->vfp.qc[0] = qc;                                        \
934         }                                                               \
935         mve_advance_vpt(env);                                           \
936     }
937 
938 /* provide unsigned 2-op helpers for all sizes */
939 #define DO_2OP_SAT_U(OP, FN)                    \
940     DO_2OP_SAT(OP##b, 1, uint8_t, FN)           \
941     DO_2OP_SAT(OP##h, 2, uint16_t, FN)          \
942     DO_2OP_SAT(OP##w, 4, uint32_t, FN)
943 
944 /* provide signed 2-op helpers for all sizes */
945 #define DO_2OP_SAT_S(OP, FN)                    \
946     DO_2OP_SAT(OP##b, 1, int8_t, FN)            \
947     DO_2OP_SAT(OP##h, 2, int16_t, FN)           \
948     DO_2OP_SAT(OP##w, 4, int32_t, FN)
949 
950 #define DO_AND(N, M)  ((N) & (M))
951 #define DO_BIC(N, M)  ((N) & ~(M))
952 #define DO_ORR(N, M)  ((N) | (M))
953 #define DO_ORN(N, M)  ((N) | ~(M))
954 #define DO_EOR(N, M)  ((N) ^ (M))
955 
956 DO_2OP(vand, 8, uint64_t, DO_AND)
957 DO_2OP(vbic, 8, uint64_t, DO_BIC)
958 DO_2OP(vorr, 8, uint64_t, DO_ORR)
959 DO_2OP(vorn, 8, uint64_t, DO_ORN)
960 DO_2OP(veor, 8, uint64_t, DO_EOR)
961 
962 #define DO_ADD(N, M) ((N) + (M))
963 #define DO_SUB(N, M) ((N) - (M))
964 #define DO_MUL(N, M) ((N) * (M))
965 
966 DO_2OP_U(vadd, DO_ADD)
967 DO_2OP_U(vsub, DO_SUB)
968 DO_2OP_U(vmul, DO_MUL)
969 
970 DO_2OP_L(vmullbsb, 0, 1, int8_t, 2, int16_t, DO_MUL)
971 DO_2OP_L(vmullbsh, 0, 2, int16_t, 4, int32_t, DO_MUL)
972 DO_2OP_L(vmullbsw, 0, 4, int32_t, 8, int64_t, DO_MUL)
973 DO_2OP_L(vmullbub, 0, 1, uint8_t, 2, uint16_t, DO_MUL)
974 DO_2OP_L(vmullbuh, 0, 2, uint16_t, 4, uint32_t, DO_MUL)
975 DO_2OP_L(vmullbuw, 0, 4, uint32_t, 8, uint64_t, DO_MUL)
976 
977 DO_2OP_L(vmulltsb, 1, 1, int8_t, 2, int16_t, DO_MUL)
978 DO_2OP_L(vmulltsh, 1, 2, int16_t, 4, int32_t, DO_MUL)
979 DO_2OP_L(vmulltsw, 1, 4, int32_t, 8, int64_t, DO_MUL)
980 DO_2OP_L(vmulltub, 1, 1, uint8_t, 2, uint16_t, DO_MUL)
981 DO_2OP_L(vmulltuh, 1, 2, uint16_t, 4, uint32_t, DO_MUL)
982 DO_2OP_L(vmulltuw, 1, 4, uint32_t, 8, uint64_t, DO_MUL)
983 
984 /*
985  * Polynomial multiply. We can always do this generating 64 bits
986  * of the result at a time, so we don't need to use DO_2OP_L.
987  */
988 DO_2OP(vmullpbh, 8, uint64_t, clmul_8x4_even)
989 DO_2OP(vmullpth, 8, uint64_t, clmul_8x4_odd)
990 DO_2OP(vmullpbw, 8, uint64_t, clmul_16x2_even)
991 DO_2OP(vmullptw, 8, uint64_t, clmul_16x2_odd)
992 
993 /*
994  * Because the computation type is at least twice as large as required,
995  * these work for both signed and unsigned source types.
996  */
997 static inline uint8_t do_mulh_b(int32_t n, int32_t m)
998 {
999     return (n * m) >> 8;
1000 }
1001 
1002 static inline uint16_t do_mulh_h(int32_t n, int32_t m)
1003 {
1004     return (n * m) >> 16;
1005 }
1006 
1007 static inline uint32_t do_mulh_w(int64_t n, int64_t m)
1008 {
1009     return (n * m) >> 32;
1010 }
1011 
1012 static inline uint8_t do_rmulh_b(int32_t n, int32_t m)
1013 {
1014     return (n * m + (1U << 7)) >> 8;
1015 }
1016 
1017 static inline uint16_t do_rmulh_h(int32_t n, int32_t m)
1018 {
1019     return (n * m + (1U << 15)) >> 16;
1020 }
1021 
1022 static inline uint32_t do_rmulh_w(int64_t n, int64_t m)
1023 {
1024     return (n * m + (1U << 31)) >> 32;
1025 }
1026 
1027 DO_2OP(vmulhsb, 1, int8_t, do_mulh_b)
1028 DO_2OP(vmulhsh, 2, int16_t, do_mulh_h)
1029 DO_2OP(vmulhsw, 4, int32_t, do_mulh_w)
1030 DO_2OP(vmulhub, 1, uint8_t, do_mulh_b)
1031 DO_2OP(vmulhuh, 2, uint16_t, do_mulh_h)
1032 DO_2OP(vmulhuw, 4, uint32_t, do_mulh_w)
1033 
1034 DO_2OP(vrmulhsb, 1, int8_t, do_rmulh_b)
1035 DO_2OP(vrmulhsh, 2, int16_t, do_rmulh_h)
1036 DO_2OP(vrmulhsw, 4, int32_t, do_rmulh_w)
1037 DO_2OP(vrmulhub, 1, uint8_t, do_rmulh_b)
1038 DO_2OP(vrmulhuh, 2, uint16_t, do_rmulh_h)
1039 DO_2OP(vrmulhuw, 4, uint32_t, do_rmulh_w)
1040 
1041 #define DO_MAX(N, M)  ((N) >= (M) ? (N) : (M))
1042 #define DO_MIN(N, M)  ((N) >= (M) ? (M) : (N))
1043 
1044 DO_2OP_S(vmaxs, DO_MAX)
1045 DO_2OP_U(vmaxu, DO_MAX)
1046 DO_2OP_S(vmins, DO_MIN)
1047 DO_2OP_U(vminu, DO_MIN)
1048 
1049 #define DO_ABD(N, M)  ((N) >= (M) ? (N) - (M) : (M) - (N))
1050 
1051 DO_2OP_S(vabds, DO_ABD)
1052 DO_2OP_U(vabdu, DO_ABD)
1053 
1054 static inline uint32_t do_vhadd_u(uint32_t n, uint32_t m)
1055 {
1056     return ((uint64_t)n + m) >> 1;
1057 }
1058 
1059 static inline int32_t do_vhadd_s(int32_t n, int32_t m)
1060 {
1061     return ((int64_t)n + m) >> 1;
1062 }
1063 
1064 static inline uint32_t do_vhsub_u(uint32_t n, uint32_t m)
1065 {
1066     return ((uint64_t)n - m) >> 1;
1067 }
1068 
1069 static inline int32_t do_vhsub_s(int32_t n, int32_t m)
1070 {
1071     return ((int64_t)n - m) >> 1;
1072 }
1073 
1074 DO_2OP_S(vhadds, do_vhadd_s)
1075 DO_2OP_U(vhaddu, do_vhadd_u)
1076 DO_2OP_S(vhsubs, do_vhsub_s)
1077 DO_2OP_U(vhsubu, do_vhsub_u)
1078 
1079 #define DO_VSHLS(N, M) do_sqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, false, NULL)
1080 #define DO_VSHLU(N, M) do_uqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, false, NULL)
1081 #define DO_VRSHLS(N, M) do_sqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, true, NULL)
1082 #define DO_VRSHLU(N, M) do_uqrshl_bhs(N, (int8_t)(M), sizeof(N) * 8, true, NULL)
1083 
1084 DO_2OP_S(vshls, DO_VSHLS)
1085 DO_2OP_U(vshlu, DO_VSHLU)
1086 DO_2OP_S(vrshls, DO_VRSHLS)
1087 DO_2OP_U(vrshlu, DO_VRSHLU)
1088 
1089 #define DO_RHADD_S(N, M) (((int64_t)(N) + (M) + 1) >> 1)
1090 #define DO_RHADD_U(N, M) (((uint64_t)(N) + (M) + 1) >> 1)
1091 
1092 DO_2OP_S(vrhadds, DO_RHADD_S)
1093 DO_2OP_U(vrhaddu, DO_RHADD_U)
1094 
1095 static void do_vadc(CPUARMState *env, uint32_t *d, uint32_t *n, uint32_t *m,
1096                     uint32_t inv, uint32_t carry_in, bool update_flags)
1097 {
1098     uint16_t mask = mve_element_mask(env);
1099     unsigned e;
1100 
1101     /* If any additions trigger, we will update flags. */
1102     if (mask & 0x1111) {
1103         update_flags = true;
1104     }
1105 
1106     for (e = 0; e < 16 / 4; e++, mask >>= 4) {
1107         uint64_t r = carry_in;
1108         r += n[H4(e)];
1109         r += m[H4(e)] ^ inv;
1110         if (mask & 1) {
1111             carry_in = r >> 32;
1112         }
1113         mergemask(&d[H4(e)], r, mask);
1114     }
1115 
1116     if (update_flags) {
1117         /* Store C, clear NZV. */
1118         env->vfp.fpsr &= ~FPSR_NZCV_MASK;
1119         env->vfp.fpsr |= carry_in * FPSR_C;
1120     }
1121     mve_advance_vpt(env);
1122 }
1123 
1124 void HELPER(mve_vadc)(CPUARMState *env, void *vd, void *vn, void *vm)
1125 {
1126     bool carry_in = env->vfp.fpsr & FPSR_C;
1127     do_vadc(env, vd, vn, vm, 0, carry_in, false);
1128 }
1129 
1130 void HELPER(mve_vsbc)(CPUARMState *env, void *vd, void *vn, void *vm)
1131 {
1132     bool carry_in = env->vfp.fpsr & FPSR_C;
1133     do_vadc(env, vd, vn, vm, -1, carry_in, false);
1134 }
1135 
1136 
1137 void HELPER(mve_vadci)(CPUARMState *env, void *vd, void *vn, void *vm)
1138 {
1139     do_vadc(env, vd, vn, vm, 0, 0, true);
1140 }
1141 
1142 void HELPER(mve_vsbci)(CPUARMState *env, void *vd, void *vn, void *vm)
1143 {
1144     do_vadc(env, vd, vn, vm, -1, 1, true);
1145 }
1146 
1147 #define DO_VCADD(OP, ESIZE, TYPE, FN0, FN1)                             \
1148     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \
1149     {                                                                   \
1150         TYPE *d = vd, *n = vn, *m = vm;                                 \
1151         uint16_t mask = mve_element_mask(env);                          \
1152         unsigned e;                                                     \
1153         TYPE r[16 / ESIZE];                                             \
1154         /* Calculate all results first to avoid overwriting inputs */   \
1155         for (e = 0; e < 16 / ESIZE; e++) {                              \
1156             if (!(e & 1)) {                                             \
1157                 r[e] = FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)]);         \
1158             } else {                                                    \
1159                 r[e] = FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)]);         \
1160             }                                                           \
1161         }                                                               \
1162         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1163             mergemask(&d[H##ESIZE(e)], r[e], mask);                     \
1164         }                                                               \
1165         mve_advance_vpt(env);                                           \
1166     }
1167 
1168 #define DO_VCADD_ALL(OP, FN0, FN1)              \
1169     DO_VCADD(OP##b, 1, int8_t, FN0, FN1)        \
1170     DO_VCADD(OP##h, 2, int16_t, FN0, FN1)       \
1171     DO_VCADD(OP##w, 4, int32_t, FN0, FN1)
1172 
1173 DO_VCADD_ALL(vcadd90, DO_SUB, DO_ADD)
1174 DO_VCADD_ALL(vcadd270, DO_ADD, DO_SUB)
1175 DO_VCADD_ALL(vhcadd90, do_vhsub_s, do_vhadd_s)
1176 DO_VCADD_ALL(vhcadd270, do_vhadd_s, do_vhsub_s)
1177 
1178 static inline int32_t do_sat_bhw(int64_t val, int64_t min, int64_t max, bool *s)
1179 {
1180     if (val > max) {
1181         *s = true;
1182         return max;
1183     } else if (val < min) {
1184         *s = true;
1185         return min;
1186     }
1187     return val;
1188 }
1189 
1190 #define DO_SQADD_B(n, m, s) do_sat_bhw((int64_t)n + m, INT8_MIN, INT8_MAX, s)
1191 #define DO_SQADD_H(n, m, s) do_sat_bhw((int64_t)n + m, INT16_MIN, INT16_MAX, s)
1192 #define DO_SQADD_W(n, m, s) do_sat_bhw((int64_t)n + m, INT32_MIN, INT32_MAX, s)
1193 
1194 #define DO_UQADD_B(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT8_MAX, s)
1195 #define DO_UQADD_H(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT16_MAX, s)
1196 #define DO_UQADD_W(n, m, s) do_sat_bhw((int64_t)n + m, 0, UINT32_MAX, s)
1197 
1198 #define DO_SQSUB_B(n, m, s) do_sat_bhw((int64_t)n - m, INT8_MIN, INT8_MAX, s)
1199 #define DO_SQSUB_H(n, m, s) do_sat_bhw((int64_t)n - m, INT16_MIN, INT16_MAX, s)
1200 #define DO_SQSUB_W(n, m, s) do_sat_bhw((int64_t)n - m, INT32_MIN, INT32_MAX, s)
1201 
1202 #define DO_UQSUB_B(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT8_MAX, s)
1203 #define DO_UQSUB_H(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT16_MAX, s)
1204 #define DO_UQSUB_W(n, m, s) do_sat_bhw((int64_t)n - m, 0, UINT32_MAX, s)
1205 
1206 /*
1207  * For QDMULH and QRDMULH we simplify "double and shift by esize" into
1208  * "shift by esize-1", adjusting the QRDMULH rounding constant to match.
1209  */
1210 #define DO_QDMULH_B(n, m, s) do_sat_bhw(((int64_t)n * m) >> 7, \
1211                                         INT8_MIN, INT8_MAX, s)
1212 #define DO_QDMULH_H(n, m, s) do_sat_bhw(((int64_t)n * m) >> 15, \
1213                                         INT16_MIN, INT16_MAX, s)
1214 #define DO_QDMULH_W(n, m, s) do_sat_bhw(((int64_t)n * m) >> 31, \
1215                                         INT32_MIN, INT32_MAX, s)
1216 
1217 #define DO_QRDMULH_B(n, m, s) do_sat_bhw(((int64_t)n * m + (1 << 6)) >> 7, \
1218                                          INT8_MIN, INT8_MAX, s)
1219 #define DO_QRDMULH_H(n, m, s) do_sat_bhw(((int64_t)n * m + (1 << 14)) >> 15, \
1220                                          INT16_MIN, INT16_MAX, s)
1221 #define DO_QRDMULH_W(n, m, s) do_sat_bhw(((int64_t)n * m + (1 << 30)) >> 31, \
1222                                          INT32_MIN, INT32_MAX, s)
1223 
1224 DO_2OP_SAT(vqdmulhb, 1, int8_t, DO_QDMULH_B)
1225 DO_2OP_SAT(vqdmulhh, 2, int16_t, DO_QDMULH_H)
1226 DO_2OP_SAT(vqdmulhw, 4, int32_t, DO_QDMULH_W)
1227 
1228 DO_2OP_SAT(vqrdmulhb, 1, int8_t, DO_QRDMULH_B)
1229 DO_2OP_SAT(vqrdmulhh, 2, int16_t, DO_QRDMULH_H)
1230 DO_2OP_SAT(vqrdmulhw, 4, int32_t, DO_QRDMULH_W)
1231 
1232 DO_2OP_SAT(vqaddub, 1, uint8_t, DO_UQADD_B)
1233 DO_2OP_SAT(vqadduh, 2, uint16_t, DO_UQADD_H)
1234 DO_2OP_SAT(vqadduw, 4, uint32_t, DO_UQADD_W)
1235 DO_2OP_SAT(vqaddsb, 1, int8_t, DO_SQADD_B)
1236 DO_2OP_SAT(vqaddsh, 2, int16_t, DO_SQADD_H)
1237 DO_2OP_SAT(vqaddsw, 4, int32_t, DO_SQADD_W)
1238 
1239 DO_2OP_SAT(vqsubub, 1, uint8_t, DO_UQSUB_B)
1240 DO_2OP_SAT(vqsubuh, 2, uint16_t, DO_UQSUB_H)
1241 DO_2OP_SAT(vqsubuw, 4, uint32_t, DO_UQSUB_W)
1242 DO_2OP_SAT(vqsubsb, 1, int8_t, DO_SQSUB_B)
1243 DO_2OP_SAT(vqsubsh, 2, int16_t, DO_SQSUB_H)
1244 DO_2OP_SAT(vqsubsw, 4, int32_t, DO_SQSUB_W)
1245 
1246 /*
1247  * This wrapper fixes up the impedance mismatch between do_sqrshl_bhs()
1248  * and friends wanting a uint32_t* sat and our needing a bool*.
1249  */
1250 #define WRAP_QRSHL_HELPER(FN, N, M, ROUND, satp)                        \
1251     ({                                                                  \
1252         uint32_t su32 = 0;                                              \
1253         typeof(N) qrshl_ret = FN(N, (int8_t)(M), sizeof(N) * 8, ROUND, &su32); \
1254         if (su32) {                                                     \
1255             *satp = true;                                               \
1256         }                                                               \
1257         qrshl_ret;                                                      \
1258     })
1259 
1260 #define DO_SQSHL_OP(N, M, satp) \
1261     WRAP_QRSHL_HELPER(do_sqrshl_bhs, N, M, false, satp)
1262 #define DO_UQSHL_OP(N, M, satp) \
1263     WRAP_QRSHL_HELPER(do_uqrshl_bhs, N, M, false, satp)
1264 #define DO_SQRSHL_OP(N, M, satp) \
1265     WRAP_QRSHL_HELPER(do_sqrshl_bhs, N, M, true, satp)
1266 #define DO_UQRSHL_OP(N, M, satp) \
1267     WRAP_QRSHL_HELPER(do_uqrshl_bhs, N, M, true, satp)
1268 #define DO_SUQSHL_OP(N, M, satp) \
1269     WRAP_QRSHL_HELPER(do_suqrshl_bhs, N, M, false, satp)
1270 
1271 DO_2OP_SAT_S(vqshls, DO_SQSHL_OP)
1272 DO_2OP_SAT_U(vqshlu, DO_UQSHL_OP)
1273 DO_2OP_SAT_S(vqrshls, DO_SQRSHL_OP)
1274 DO_2OP_SAT_U(vqrshlu, DO_UQRSHL_OP)
1275 
1276 /*
1277  * Multiply add dual returning high half
1278  * The 'FN' here takes four inputs A, B, C, D, a 0/1 indicator of
1279  * whether to add the rounding constant, and the pointer to the
1280  * saturation flag, and should do "(A * B + C * D) * 2 + rounding constant",
1281  * saturate to twice the input size and return the high half; or
1282  * (A * B - C * D) etc for VQDMLSDH.
1283  */
1284 #define DO_VQDMLADH_OP(OP, ESIZE, TYPE, XCHG, ROUND, FN)                \
1285     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1286                                 void *vm)                               \
1287     {                                                                   \
1288         TYPE *d = vd, *n = vn, *m = vm;                                 \
1289         uint16_t mask = mve_element_mask(env);                          \
1290         unsigned e;                                                     \
1291         bool qc = false;                                                \
1292         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1293             bool sat = false;                                           \
1294             if ((e & 1) == XCHG) {                                      \
1295                 TYPE vqdmladh_ret = FN(n[H##ESIZE(e)],                  \
1296                             m[H##ESIZE(e - XCHG)],                      \
1297                             n[H##ESIZE(e + (1 - 2 * XCHG))],            \
1298                             m[H##ESIZE(e + (1 - XCHG))],                \
1299                             ROUND, &sat);                               \
1300                 mergemask(&d[H##ESIZE(e)], vqdmladh_ret, mask);         \
1301                 qc |= sat & mask & 1;                                   \
1302             }                                                           \
1303         }                                                               \
1304         if (qc) {                                                       \
1305             env->vfp.qc[0] = qc;                                        \
1306         }                                                               \
1307         mve_advance_vpt(env);                                           \
1308     }
1309 
1310 static int8_t do_vqdmladh_b(int8_t a, int8_t b, int8_t c, int8_t d,
1311                             int round, bool *sat)
1312 {
1313     int64_t r = ((int64_t)a * b + (int64_t)c * d) * 2 + (round << 7);
1314     return do_sat_bhw(r, INT16_MIN, INT16_MAX, sat) >> 8;
1315 }
1316 
1317 static int16_t do_vqdmladh_h(int16_t a, int16_t b, int16_t c, int16_t d,
1318                              int round, bool *sat)
1319 {
1320     int64_t r = ((int64_t)a * b + (int64_t)c * d) * 2 + (round << 15);
1321     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat) >> 16;
1322 }
1323 
1324 static int32_t do_vqdmladh_w(int32_t a, int32_t b, int32_t c, int32_t d,
1325                              int round, bool *sat)
1326 {
1327     int64_t m1 = (int64_t)a * b;
1328     int64_t m2 = (int64_t)c * d;
1329     int64_t r;
1330     /*
1331      * Architecturally we should do the entire add, double, round
1332      * and then check for saturation. We do three saturating adds,
1333      * but we need to be careful about the order. If the first
1334      * m1 + m2 saturates then it's impossible for the *2+rc to
1335      * bring it back into the non-saturated range. However, if
1336      * m1 + m2 is negative then it's possible that doing the doubling
1337      * would take the intermediate result below INT64_MAX and the
1338      * addition of the rounding constant then brings it back in range.
1339      * So we add half the rounding constant before doubling rather
1340      * than adding the rounding constant after the doubling.
1341      */
1342     if (sadd64_overflow(m1, m2, &r) ||
1343         sadd64_overflow(r, (round << 30), &r) ||
1344         sadd64_overflow(r, r, &r)) {
1345         *sat = true;
1346         return r < 0 ? INT32_MAX : INT32_MIN;
1347     }
1348     return r >> 32;
1349 }
1350 
1351 static int8_t do_vqdmlsdh_b(int8_t a, int8_t b, int8_t c, int8_t d,
1352                             int round, bool *sat)
1353 {
1354     int64_t r = ((int64_t)a * b - (int64_t)c * d) * 2 + (round << 7);
1355     return do_sat_bhw(r, INT16_MIN, INT16_MAX, sat) >> 8;
1356 }
1357 
1358 static int16_t do_vqdmlsdh_h(int16_t a, int16_t b, int16_t c, int16_t d,
1359                              int round, bool *sat)
1360 {
1361     int64_t r = ((int64_t)a * b - (int64_t)c * d) * 2 + (round << 15);
1362     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat) >> 16;
1363 }
1364 
1365 static int32_t do_vqdmlsdh_w(int32_t a, int32_t b, int32_t c, int32_t d,
1366                              int round, bool *sat)
1367 {
1368     int64_t m1 = (int64_t)a * b;
1369     int64_t m2 = (int64_t)c * d;
1370     int64_t r;
1371     /* The same ordering issue as in do_vqdmladh_w applies here too */
1372     if (ssub64_overflow(m1, m2, &r) ||
1373         sadd64_overflow(r, (round << 30), &r) ||
1374         sadd64_overflow(r, r, &r)) {
1375         *sat = true;
1376         return r < 0 ? INT32_MAX : INT32_MIN;
1377     }
1378     return r >> 32;
1379 }
1380 
1381 DO_VQDMLADH_OP(vqdmladhb, 1, int8_t, 0, 0, do_vqdmladh_b)
1382 DO_VQDMLADH_OP(vqdmladhh, 2, int16_t, 0, 0, do_vqdmladh_h)
1383 DO_VQDMLADH_OP(vqdmladhw, 4, int32_t, 0, 0, do_vqdmladh_w)
1384 DO_VQDMLADH_OP(vqdmladhxb, 1, int8_t, 1, 0, do_vqdmladh_b)
1385 DO_VQDMLADH_OP(vqdmladhxh, 2, int16_t, 1, 0, do_vqdmladh_h)
1386 DO_VQDMLADH_OP(vqdmladhxw, 4, int32_t, 1, 0, do_vqdmladh_w)
1387 
1388 DO_VQDMLADH_OP(vqrdmladhb, 1, int8_t, 0, 1, do_vqdmladh_b)
1389 DO_VQDMLADH_OP(vqrdmladhh, 2, int16_t, 0, 1, do_vqdmladh_h)
1390 DO_VQDMLADH_OP(vqrdmladhw, 4, int32_t, 0, 1, do_vqdmladh_w)
1391 DO_VQDMLADH_OP(vqrdmladhxb, 1, int8_t, 1, 1, do_vqdmladh_b)
1392 DO_VQDMLADH_OP(vqrdmladhxh, 2, int16_t, 1, 1, do_vqdmladh_h)
1393 DO_VQDMLADH_OP(vqrdmladhxw, 4, int32_t, 1, 1, do_vqdmladh_w)
1394 
1395 DO_VQDMLADH_OP(vqdmlsdhb, 1, int8_t, 0, 0, do_vqdmlsdh_b)
1396 DO_VQDMLADH_OP(vqdmlsdhh, 2, int16_t, 0, 0, do_vqdmlsdh_h)
1397 DO_VQDMLADH_OP(vqdmlsdhw, 4, int32_t, 0, 0, do_vqdmlsdh_w)
1398 DO_VQDMLADH_OP(vqdmlsdhxb, 1, int8_t, 1, 0, do_vqdmlsdh_b)
1399 DO_VQDMLADH_OP(vqdmlsdhxh, 2, int16_t, 1, 0, do_vqdmlsdh_h)
1400 DO_VQDMLADH_OP(vqdmlsdhxw, 4, int32_t, 1, 0, do_vqdmlsdh_w)
1401 
1402 DO_VQDMLADH_OP(vqrdmlsdhb, 1, int8_t, 0, 1, do_vqdmlsdh_b)
1403 DO_VQDMLADH_OP(vqrdmlsdhh, 2, int16_t, 0, 1, do_vqdmlsdh_h)
1404 DO_VQDMLADH_OP(vqrdmlsdhw, 4, int32_t, 0, 1, do_vqdmlsdh_w)
1405 DO_VQDMLADH_OP(vqrdmlsdhxb, 1, int8_t, 1, 1, do_vqdmlsdh_b)
1406 DO_VQDMLADH_OP(vqrdmlsdhxh, 2, int16_t, 1, 1, do_vqdmlsdh_h)
1407 DO_VQDMLADH_OP(vqrdmlsdhxw, 4, int32_t, 1, 1, do_vqdmlsdh_w)
1408 
1409 #define DO_2OP_SCALAR(OP, ESIZE, TYPE, FN)                              \
1410     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1411                                 uint32_t rm)                            \
1412     {                                                                   \
1413         TYPE *d = vd, *n = vn;                                          \
1414         TYPE m = rm;                                                    \
1415         uint16_t mask = mve_element_mask(env);                          \
1416         unsigned e;                                                     \
1417         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1418             mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m), mask);    \
1419         }                                                               \
1420         mve_advance_vpt(env);                                           \
1421     }
1422 
1423 #define DO_2OP_SAT_SCALAR(OP, ESIZE, TYPE, FN)                          \
1424     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1425                                 uint32_t rm)                            \
1426     {                                                                   \
1427         TYPE *d = vd, *n = vn;                                          \
1428         TYPE m = rm;                                                    \
1429         uint16_t mask = mve_element_mask(env);                          \
1430         unsigned e;                                                     \
1431         bool qc = false;                                                \
1432         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1433             bool sat = false;                                           \
1434             mergemask(&d[H##ESIZE(e)], FN(n[H##ESIZE(e)], m, &sat),     \
1435                       mask);                                            \
1436             qc |= sat & mask & 1;                                       \
1437         }                                                               \
1438         if (qc) {                                                       \
1439             env->vfp.qc[0] = qc;                                        \
1440         }                                                               \
1441         mve_advance_vpt(env);                                           \
1442     }
1443 
1444 /* "accumulating" version where FN takes d as well as n and m */
1445 #define DO_2OP_ACC_SCALAR(OP, ESIZE, TYPE, FN)                          \
1446     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1447                                 uint32_t rm)                            \
1448     {                                                                   \
1449         TYPE *d = vd, *n = vn;                                          \
1450         TYPE m = rm;                                                    \
1451         uint16_t mask = mve_element_mask(env);                          \
1452         unsigned e;                                                     \
1453         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1454             mergemask(&d[H##ESIZE(e)],                                  \
1455                       FN(d[H##ESIZE(e)], n[H##ESIZE(e)], m), mask);     \
1456         }                                                               \
1457         mve_advance_vpt(env);                                           \
1458     }
1459 
1460 #define DO_2OP_SAT_ACC_SCALAR(OP, ESIZE, TYPE, FN)                      \
1461     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1462                                 uint32_t rm)                            \
1463     {                                                                   \
1464         TYPE *d = vd, *n = vn;                                          \
1465         TYPE m = rm;                                                    \
1466         uint16_t mask = mve_element_mask(env);                          \
1467         unsigned e;                                                     \
1468         bool qc = false;                                                \
1469         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1470             bool sat = false;                                           \
1471             mergemask(&d[H##ESIZE(e)],                                  \
1472                       FN(d[H##ESIZE(e)], n[H##ESIZE(e)], m, &sat),      \
1473                       mask);                                            \
1474             qc |= sat & mask & 1;                                       \
1475         }                                                               \
1476         if (qc) {                                                       \
1477             env->vfp.qc[0] = qc;                                        \
1478         }                                                               \
1479         mve_advance_vpt(env);                                           \
1480     }
1481 
1482 /* provide unsigned 2-op scalar helpers for all sizes */
1483 #define DO_2OP_SCALAR_U(OP, FN)                 \
1484     DO_2OP_SCALAR(OP##b, 1, uint8_t, FN)        \
1485     DO_2OP_SCALAR(OP##h, 2, uint16_t, FN)       \
1486     DO_2OP_SCALAR(OP##w, 4, uint32_t, FN)
1487 #define DO_2OP_SCALAR_S(OP, FN)                 \
1488     DO_2OP_SCALAR(OP##b, 1, int8_t, FN)         \
1489     DO_2OP_SCALAR(OP##h, 2, int16_t, FN)        \
1490     DO_2OP_SCALAR(OP##w, 4, int32_t, FN)
1491 
1492 #define DO_2OP_ACC_SCALAR_U(OP, FN)             \
1493     DO_2OP_ACC_SCALAR(OP##b, 1, uint8_t, FN)    \
1494     DO_2OP_ACC_SCALAR(OP##h, 2, uint16_t, FN)   \
1495     DO_2OP_ACC_SCALAR(OP##w, 4, uint32_t, FN)
1496 
1497 DO_2OP_SCALAR_U(vadd_scalar, DO_ADD)
1498 DO_2OP_SCALAR_U(vsub_scalar, DO_SUB)
1499 DO_2OP_SCALAR_U(vmul_scalar, DO_MUL)
1500 DO_2OP_SCALAR_S(vhadds_scalar, do_vhadd_s)
1501 DO_2OP_SCALAR_U(vhaddu_scalar, do_vhadd_u)
1502 DO_2OP_SCALAR_S(vhsubs_scalar, do_vhsub_s)
1503 DO_2OP_SCALAR_U(vhsubu_scalar, do_vhsub_u)
1504 
1505 DO_2OP_SAT_SCALAR(vqaddu_scalarb, 1, uint8_t, DO_UQADD_B)
1506 DO_2OP_SAT_SCALAR(vqaddu_scalarh, 2, uint16_t, DO_UQADD_H)
1507 DO_2OP_SAT_SCALAR(vqaddu_scalarw, 4, uint32_t, DO_UQADD_W)
1508 DO_2OP_SAT_SCALAR(vqadds_scalarb, 1, int8_t, DO_SQADD_B)
1509 DO_2OP_SAT_SCALAR(vqadds_scalarh, 2, int16_t, DO_SQADD_H)
1510 DO_2OP_SAT_SCALAR(vqadds_scalarw, 4, int32_t, DO_SQADD_W)
1511 
1512 DO_2OP_SAT_SCALAR(vqsubu_scalarb, 1, uint8_t, DO_UQSUB_B)
1513 DO_2OP_SAT_SCALAR(vqsubu_scalarh, 2, uint16_t, DO_UQSUB_H)
1514 DO_2OP_SAT_SCALAR(vqsubu_scalarw, 4, uint32_t, DO_UQSUB_W)
1515 DO_2OP_SAT_SCALAR(vqsubs_scalarb, 1, int8_t, DO_SQSUB_B)
1516 DO_2OP_SAT_SCALAR(vqsubs_scalarh, 2, int16_t, DO_SQSUB_H)
1517 DO_2OP_SAT_SCALAR(vqsubs_scalarw, 4, int32_t, DO_SQSUB_W)
1518 
1519 DO_2OP_SAT_SCALAR(vqdmulh_scalarb, 1, int8_t, DO_QDMULH_B)
1520 DO_2OP_SAT_SCALAR(vqdmulh_scalarh, 2, int16_t, DO_QDMULH_H)
1521 DO_2OP_SAT_SCALAR(vqdmulh_scalarw, 4, int32_t, DO_QDMULH_W)
1522 DO_2OP_SAT_SCALAR(vqrdmulh_scalarb, 1, int8_t, DO_QRDMULH_B)
1523 DO_2OP_SAT_SCALAR(vqrdmulh_scalarh, 2, int16_t, DO_QRDMULH_H)
1524 DO_2OP_SAT_SCALAR(vqrdmulh_scalarw, 4, int32_t, DO_QRDMULH_W)
1525 
1526 static int8_t do_vqdmlah_b(int8_t a, int8_t b, int8_t c, int round, bool *sat)
1527 {
1528     int64_t r = (int64_t)a * b * 2 + ((int64_t)c << 8) + (round << 7);
1529     return do_sat_bhw(r, INT16_MIN, INT16_MAX, sat) >> 8;
1530 }
1531 
1532 static int16_t do_vqdmlah_h(int16_t a, int16_t b, int16_t c,
1533                            int round, bool *sat)
1534 {
1535     int64_t r = (int64_t)a * b * 2 + ((int64_t)c << 16) + (round << 15);
1536     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat) >> 16;
1537 }
1538 
1539 static int32_t do_vqdmlah_w(int32_t a, int32_t b, int32_t c,
1540                             int round, bool *sat)
1541 {
1542     /*
1543      * Architecturally we should do the entire add, double, round
1544      * and then check for saturation. We do three saturating adds,
1545      * but we need to be careful about the order. If the first
1546      * m1 + m2 saturates then it's impossible for the *2+rc to
1547      * bring it back into the non-saturated range. However, if
1548      * m1 + m2 is negative then it's possible that doing the doubling
1549      * would take the intermediate result below INT64_MAX and the
1550      * addition of the rounding constant then brings it back in range.
1551      * So we add half the rounding constant and half the "c << esize"
1552      * before doubling rather than adding the rounding constant after
1553      * the doubling.
1554      */
1555     int64_t m1 = (int64_t)a * b;
1556     int64_t m2 = (int64_t)c << 31;
1557     int64_t r;
1558     if (sadd64_overflow(m1, m2, &r) ||
1559         sadd64_overflow(r, (round << 30), &r) ||
1560         sadd64_overflow(r, r, &r)) {
1561         *sat = true;
1562         return r < 0 ? INT32_MAX : INT32_MIN;
1563     }
1564     return r >> 32;
1565 }
1566 
1567 /*
1568  * The *MLAH insns are vector * scalar + vector;
1569  * the *MLASH insns are vector * vector + scalar
1570  */
1571 #define DO_VQDMLAH_B(D, N, M, S) do_vqdmlah_b(N, M, D, 0, S)
1572 #define DO_VQDMLAH_H(D, N, M, S) do_vqdmlah_h(N, M, D, 0, S)
1573 #define DO_VQDMLAH_W(D, N, M, S) do_vqdmlah_w(N, M, D, 0, S)
1574 #define DO_VQRDMLAH_B(D, N, M, S) do_vqdmlah_b(N, M, D, 1, S)
1575 #define DO_VQRDMLAH_H(D, N, M, S) do_vqdmlah_h(N, M, D, 1, S)
1576 #define DO_VQRDMLAH_W(D, N, M, S) do_vqdmlah_w(N, M, D, 1, S)
1577 
1578 #define DO_VQDMLASH_B(D, N, M, S) do_vqdmlah_b(N, D, M, 0, S)
1579 #define DO_VQDMLASH_H(D, N, M, S) do_vqdmlah_h(N, D, M, 0, S)
1580 #define DO_VQDMLASH_W(D, N, M, S) do_vqdmlah_w(N, D, M, 0, S)
1581 #define DO_VQRDMLASH_B(D, N, M, S) do_vqdmlah_b(N, D, M, 1, S)
1582 #define DO_VQRDMLASH_H(D, N, M, S) do_vqdmlah_h(N, D, M, 1, S)
1583 #define DO_VQRDMLASH_W(D, N, M, S) do_vqdmlah_w(N, D, M, 1, S)
1584 
1585 DO_2OP_SAT_ACC_SCALAR(vqdmlahb, 1, int8_t, DO_VQDMLAH_B)
1586 DO_2OP_SAT_ACC_SCALAR(vqdmlahh, 2, int16_t, DO_VQDMLAH_H)
1587 DO_2OP_SAT_ACC_SCALAR(vqdmlahw, 4, int32_t, DO_VQDMLAH_W)
1588 DO_2OP_SAT_ACC_SCALAR(vqrdmlahb, 1, int8_t, DO_VQRDMLAH_B)
1589 DO_2OP_SAT_ACC_SCALAR(vqrdmlahh, 2, int16_t, DO_VQRDMLAH_H)
1590 DO_2OP_SAT_ACC_SCALAR(vqrdmlahw, 4, int32_t, DO_VQRDMLAH_W)
1591 
1592 DO_2OP_SAT_ACC_SCALAR(vqdmlashb, 1, int8_t, DO_VQDMLASH_B)
1593 DO_2OP_SAT_ACC_SCALAR(vqdmlashh, 2, int16_t, DO_VQDMLASH_H)
1594 DO_2OP_SAT_ACC_SCALAR(vqdmlashw, 4, int32_t, DO_VQDMLASH_W)
1595 DO_2OP_SAT_ACC_SCALAR(vqrdmlashb, 1, int8_t, DO_VQRDMLASH_B)
1596 DO_2OP_SAT_ACC_SCALAR(vqrdmlashh, 2, int16_t, DO_VQRDMLASH_H)
1597 DO_2OP_SAT_ACC_SCALAR(vqrdmlashw, 4, int32_t, DO_VQRDMLASH_W)
1598 
1599 /* Vector by scalar plus vector */
1600 #define DO_VMLA(D, N, M) ((N) * (M) + (D))
1601 
1602 DO_2OP_ACC_SCALAR_U(vmla, DO_VMLA)
1603 
1604 /* Vector by vector plus scalar */
1605 #define DO_VMLAS(D, N, M) ((N) * (D) + (M))
1606 
1607 DO_2OP_ACC_SCALAR_U(vmlas, DO_VMLAS)
1608 
1609 /*
1610  * Long saturating scalar ops. As with DO_2OP_L, TYPE and H are for the
1611  * input (smaller) type and LESIZE, LTYPE, LH for the output (long) type.
1612  * SATMASK specifies which bits of the predicate mask matter for determining
1613  * whether to propagate a saturation indication into FPSCR.QC -- for
1614  * the 16x16->32 case we must check only the bit corresponding to the T or B
1615  * half that we used, but for the 32x32->64 case we propagate if the mask
1616  * bit is set for either half.
1617  */
1618 #define DO_2OP_SAT_SCALAR_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN, SATMASK) \
1619     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1620                                 uint32_t rm)                            \
1621     {                                                                   \
1622         LTYPE *d = vd;                                                  \
1623         TYPE *n = vn;                                                   \
1624         TYPE m = rm;                                                    \
1625         uint16_t mask = mve_element_mask(env);                          \
1626         unsigned le;                                                    \
1627         bool qc = false;                                                \
1628         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
1629             bool sat = false;                                           \
1630             LTYPE r = FN((LTYPE)n[H##ESIZE(le * 2 + TOP)], m, &sat);    \
1631             mergemask(&d[H##LESIZE(le)], r, mask);                      \
1632             qc |= sat && (mask & SATMASK);                              \
1633         }                                                               \
1634         if (qc) {                                                       \
1635             env->vfp.qc[0] = qc;                                        \
1636         }                                                               \
1637         mve_advance_vpt(env);                                           \
1638     }
1639 
1640 static inline int32_t do_qdmullh(int16_t n, int16_t m, bool *sat)
1641 {
1642     int64_t r = ((int64_t)n * m) * 2;
1643     return do_sat_bhw(r, INT32_MIN, INT32_MAX, sat);
1644 }
1645 
1646 static inline int64_t do_qdmullw(int32_t n, int32_t m, bool *sat)
1647 {
1648     /* The multiply can't overflow, but the doubling might */
1649     int64_t r = (int64_t)n * m;
1650     if (r > INT64_MAX / 2) {
1651         *sat = true;
1652         return INT64_MAX;
1653     } else if (r < INT64_MIN / 2) {
1654         *sat = true;
1655         return INT64_MIN;
1656     } else {
1657         return r * 2;
1658     }
1659 }
1660 
1661 #define SATMASK16B 1
1662 #define SATMASK16T (1 << 2)
1663 #define SATMASK32 ((1 << 4) | 1)
1664 
1665 DO_2OP_SAT_SCALAR_L(vqdmullb_scalarh, 0, 2, int16_t, 4, int32_t, \
1666                     do_qdmullh, SATMASK16B)
1667 DO_2OP_SAT_SCALAR_L(vqdmullb_scalarw, 0, 4, int32_t, 8, int64_t, \
1668                     do_qdmullw, SATMASK32)
1669 DO_2OP_SAT_SCALAR_L(vqdmullt_scalarh, 1, 2, int16_t, 4, int32_t, \
1670                     do_qdmullh, SATMASK16T)
1671 DO_2OP_SAT_SCALAR_L(vqdmullt_scalarw, 1, 4, int32_t, 8, int64_t, \
1672                     do_qdmullw, SATMASK32)
1673 
1674 /*
1675  * Long saturating ops
1676  */
1677 #define DO_2OP_SAT_L(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN, SATMASK)  \
1678     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn,   \
1679                                 void *vm)                               \
1680     {                                                                   \
1681         LTYPE *d = vd;                                                  \
1682         TYPE *n = vn, *m = vm;                                          \
1683         uint16_t mask = mve_element_mask(env);                          \
1684         unsigned le;                                                    \
1685         bool qc = false;                                                \
1686         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
1687             bool sat = false;                                           \
1688             LTYPE op1 = n[H##ESIZE(le * 2 + TOP)];                      \
1689             LTYPE op2 = m[H##ESIZE(le * 2 + TOP)];                      \
1690             mergemask(&d[H##LESIZE(le)], FN(op1, op2, &sat), mask);     \
1691             qc |= sat && (mask & SATMASK);                              \
1692         }                                                               \
1693         if (qc) {                                                       \
1694             env->vfp.qc[0] = qc;                                        \
1695         }                                                               \
1696         mve_advance_vpt(env);                                           \
1697     }
1698 
1699 DO_2OP_SAT_L(vqdmullbh, 0, 2, int16_t, 4, int32_t, do_qdmullh, SATMASK16B)
1700 DO_2OP_SAT_L(vqdmullbw, 0, 4, int32_t, 8, int64_t, do_qdmullw, SATMASK32)
1701 DO_2OP_SAT_L(vqdmullth, 1, 2, int16_t, 4, int32_t, do_qdmullh, SATMASK16T)
1702 DO_2OP_SAT_L(vqdmulltw, 1, 4, int32_t, 8, int64_t, do_qdmullw, SATMASK32)
1703 
1704 static inline uint32_t do_vbrsrb(uint32_t n, uint32_t m)
1705 {
1706     m &= 0xff;
1707     if (m == 0) {
1708         return 0;
1709     }
1710     n = revbit8(n);
1711     if (m < 8) {
1712         n >>= 8 - m;
1713     }
1714     return n;
1715 }
1716 
1717 static inline uint32_t do_vbrsrh(uint32_t n, uint32_t m)
1718 {
1719     m &= 0xff;
1720     if (m == 0) {
1721         return 0;
1722     }
1723     n = revbit16(n);
1724     if (m < 16) {
1725         n >>= 16 - m;
1726     }
1727     return n;
1728 }
1729 
1730 static inline uint32_t do_vbrsrw(uint32_t n, uint32_t m)
1731 {
1732     m &= 0xff;
1733     if (m == 0) {
1734         return 0;
1735     }
1736     n = revbit32(n);
1737     if (m < 32) {
1738         n >>= 32 - m;
1739     }
1740     return n;
1741 }
1742 
1743 DO_2OP_SCALAR(vbrsrb, 1, uint8_t, do_vbrsrb)
1744 DO_2OP_SCALAR(vbrsrh, 2, uint16_t, do_vbrsrh)
1745 DO_2OP_SCALAR(vbrsrw, 4, uint32_t, do_vbrsrw)
1746 
1747 /*
1748  * Multiply add long dual accumulate ops.
1749  */
1750 #define DO_LDAV(OP, ESIZE, TYPE, XCHG, EVENACC, ODDACC)                 \
1751     uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,         \
1752                                     void *vm, uint64_t a)               \
1753     {                                                                   \
1754         uint16_t mask = mve_element_mask(env);                          \
1755         unsigned e;                                                     \
1756         TYPE *n = vn, *m = vm;                                          \
1757         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1758             if (mask & 1) {                                             \
1759                 if (e & 1) {                                            \
1760                     a ODDACC                                            \
1761                         (int64_t)n[H##ESIZE(e - 1 * XCHG)] * m[H##ESIZE(e)]; \
1762                 } else {                                                \
1763                     a EVENACC                                           \
1764                         (int64_t)n[H##ESIZE(e + 1 * XCHG)] * m[H##ESIZE(e)]; \
1765                 }                                                       \
1766             }                                                           \
1767         }                                                               \
1768         mve_advance_vpt(env);                                           \
1769         return a;                                                       \
1770     }
1771 
1772 DO_LDAV(vmlaldavsh, 2, int16_t, false, +=, +=)
1773 DO_LDAV(vmlaldavxsh, 2, int16_t, true, +=, +=)
1774 DO_LDAV(vmlaldavsw, 4, int32_t, false, +=, +=)
1775 DO_LDAV(vmlaldavxsw, 4, int32_t, true, +=, +=)
1776 
1777 DO_LDAV(vmlaldavuh, 2, uint16_t, false, +=, +=)
1778 DO_LDAV(vmlaldavuw, 4, uint32_t, false, +=, +=)
1779 
1780 DO_LDAV(vmlsldavsh, 2, int16_t, false, +=, -=)
1781 DO_LDAV(vmlsldavxsh, 2, int16_t, true, +=, -=)
1782 DO_LDAV(vmlsldavsw, 4, int32_t, false, +=, -=)
1783 DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
1784 
1785 /*
1786  * Multiply add dual accumulate ops
1787  */
1788 #define DO_DAV(OP, ESIZE, TYPE, XCHG, EVENACC, ODDACC) \
1789     uint32_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,         \
1790                                     void *vm, uint32_t a)               \
1791     {                                                                   \
1792         uint16_t mask = mve_element_mask(env);                          \
1793         unsigned e;                                                     \
1794         TYPE *n = vn, *m = vm;                                          \
1795         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
1796             if (mask & 1) {                                             \
1797                 if (e & 1) {                                            \
1798                     a ODDACC                                            \
1799                         n[H##ESIZE(e - 1 * XCHG)] * m[H##ESIZE(e)];     \
1800                 } else {                                                \
1801                     a EVENACC                                           \
1802                         n[H##ESIZE(e + 1 * XCHG)] * m[H##ESIZE(e)];     \
1803                 }                                                       \
1804             }                                                           \
1805         }                                                               \
1806         mve_advance_vpt(env);                                           \
1807         return a;                                                       \
1808     }
1809 
1810 #define DO_DAV_S(INSN, XCHG, EVENACC, ODDACC)           \
1811     DO_DAV(INSN##b, 1, int8_t, XCHG, EVENACC, ODDACC)   \
1812     DO_DAV(INSN##h, 2, int16_t, XCHG, EVENACC, ODDACC)  \
1813     DO_DAV(INSN##w, 4, int32_t, XCHG, EVENACC, ODDACC)
1814 
1815 #define DO_DAV_U(INSN, XCHG, EVENACC, ODDACC)           \
1816     DO_DAV(INSN##b, 1, uint8_t, XCHG, EVENACC, ODDACC)  \
1817     DO_DAV(INSN##h, 2, uint16_t, XCHG, EVENACC, ODDACC) \
1818     DO_DAV(INSN##w, 4, uint32_t, XCHG, EVENACC, ODDACC)
1819 
1820 DO_DAV_S(vmladavs, false, +=, +=)
1821 DO_DAV_U(vmladavu, false, +=, +=)
1822 DO_DAV_S(vmlsdav, false, +=, -=)
1823 DO_DAV_S(vmladavsx, true, +=, +=)
1824 DO_DAV_S(vmlsdavx, true, +=, -=)
1825 
1826 /*
1827  * Rounding multiply add long dual accumulate high. In the pseudocode
1828  * this is implemented with a 72-bit internal accumulator value of which
1829  * the top 64 bits are returned. We optimize this to avoid having to
1830  * use 128-bit arithmetic -- we can do this because the 74-bit accumulator
1831  * is squashed back into 64-bits after each beat.
1832  */
1833 #define DO_LDAVH(OP, TYPE, LTYPE, XCHG, SUB)                            \
1834     uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,         \
1835                                     void *vm, uint64_t a)               \
1836     {                                                                   \
1837         uint16_t mask = mve_element_mask(env);                          \
1838         unsigned e;                                                     \
1839         TYPE *n = vn, *m = vm;                                          \
1840         for (e = 0; e < 16 / 4; e++, mask >>= 4) {                      \
1841             if (mask & 1) {                                             \
1842                 LTYPE mul;                                              \
1843                 if (e & 1) {                                            \
1844                     mul = (LTYPE)n[H4(e - 1 * XCHG)] * m[H4(e)];        \
1845                     if (SUB) {                                          \
1846                         mul = -mul;                                     \
1847                     }                                                   \
1848                 } else {                                                \
1849                     mul = (LTYPE)n[H4(e + 1 * XCHG)] * m[H4(e)];        \
1850                 }                                                       \
1851                 mul = (mul >> 8) + ((mul >> 7) & 1);                    \
1852                 a += mul;                                               \
1853             }                                                           \
1854         }                                                               \
1855         mve_advance_vpt(env);                                           \
1856         return a;                                                       \
1857     }
1858 
1859 DO_LDAVH(vrmlaldavhsw, int32_t, int64_t, false, false)
1860 DO_LDAVH(vrmlaldavhxsw, int32_t, int64_t, true, false)
1861 
1862 DO_LDAVH(vrmlaldavhuw, uint32_t, uint64_t, false, false)
1863 
1864 DO_LDAVH(vrmlsldavhsw, int32_t, int64_t, false, true)
1865 DO_LDAVH(vrmlsldavhxsw, int32_t, int64_t, true, true)
1866 
1867 /* Vector add across vector */
1868 #define DO_VADDV(OP, ESIZE, TYPE)                               \
1869     uint32_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vm, \
1870                                     uint32_t ra)                \
1871     {                                                           \
1872         uint16_t mask = mve_element_mask(env);                  \
1873         unsigned e;                                             \
1874         TYPE *m = vm;                                           \
1875         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
1876             if (mask & 1) {                                     \
1877                 ra += m[H##ESIZE(e)];                           \
1878             }                                                   \
1879         }                                                       \
1880         mve_advance_vpt(env);                                   \
1881         return ra;                                              \
1882     }                                                           \
1883 
1884 DO_VADDV(vaddvsb, 1, int8_t)
1885 DO_VADDV(vaddvsh, 2, int16_t)
1886 DO_VADDV(vaddvsw, 4, int32_t)
1887 DO_VADDV(vaddvub, 1, uint8_t)
1888 DO_VADDV(vaddvuh, 2, uint16_t)
1889 DO_VADDV(vaddvuw, 4, uint32_t)
1890 
1891 /*
1892  * Vector max/min across vector. Unlike VADDV, we must
1893  * read ra as the element size, not its full width.
1894  * We work with int64_t internally for simplicity.
1895  */
1896 #define DO_VMAXMINV(OP, ESIZE, TYPE, RATYPE, FN)                \
1897     uint32_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vm, \
1898                                     uint32_t ra_in)             \
1899     {                                                           \
1900         uint16_t mask = mve_element_mask(env);                  \
1901         unsigned e;                                             \
1902         TYPE *m = vm;                                           \
1903         int64_t ra = (RATYPE)ra_in;                             \
1904         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
1905             if (mask & 1) {                                     \
1906                 ra = FN(ra, m[H##ESIZE(e)]);                    \
1907             }                                                   \
1908         }                                                       \
1909         mve_advance_vpt(env);                                   \
1910         return ra;                                              \
1911     }                                                           \
1912 
1913 #define DO_VMAXMINV_U(INSN, FN)                         \
1914     DO_VMAXMINV(INSN##b, 1, uint8_t, uint8_t, FN)       \
1915     DO_VMAXMINV(INSN##h, 2, uint16_t, uint16_t, FN)     \
1916     DO_VMAXMINV(INSN##w, 4, uint32_t, uint32_t, FN)
1917 #define DO_VMAXMINV_S(INSN, FN)                         \
1918     DO_VMAXMINV(INSN##b, 1, int8_t, int8_t, FN)         \
1919     DO_VMAXMINV(INSN##h, 2, int16_t, int16_t, FN)       \
1920     DO_VMAXMINV(INSN##w, 4, int32_t, int32_t, FN)
1921 
1922 /*
1923  * Helpers for max and min of absolute values across vector:
1924  * note that we only take the absolute value of 'm', not 'n'
1925  */
1926 static int64_t do_maxa(int64_t n, int64_t m)
1927 {
1928     if (m < 0) {
1929         m = -m;
1930     }
1931     return MAX(n, m);
1932 }
1933 
1934 static int64_t do_mina(int64_t n, int64_t m)
1935 {
1936     if (m < 0) {
1937         m = -m;
1938     }
1939     return MIN(n, m);
1940 }
1941 
1942 DO_VMAXMINV_S(vmaxvs, DO_MAX)
1943 DO_VMAXMINV_U(vmaxvu, DO_MAX)
1944 DO_VMAXMINV_S(vminvs, DO_MIN)
1945 DO_VMAXMINV_U(vminvu, DO_MIN)
1946 /*
1947  * VMAXAV, VMINAV treat the general purpose input as unsigned
1948  * and the vector elements as signed.
1949  */
1950 DO_VMAXMINV(vmaxavb, 1, int8_t, uint8_t, do_maxa)
1951 DO_VMAXMINV(vmaxavh, 2, int16_t, uint16_t, do_maxa)
1952 DO_VMAXMINV(vmaxavw, 4, int32_t, uint32_t, do_maxa)
1953 DO_VMAXMINV(vminavb, 1, int8_t, uint8_t, do_mina)
1954 DO_VMAXMINV(vminavh, 2, int16_t, uint16_t, do_mina)
1955 DO_VMAXMINV(vminavw, 4, int32_t, uint32_t, do_mina)
1956 
1957 #define DO_VABAV(OP, ESIZE, TYPE)                               \
1958     uint32_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vn, \
1959                                     void *vm, uint32_t ra)      \
1960     {                                                           \
1961         uint16_t mask = mve_element_mask(env);                  \
1962         unsigned e;                                             \
1963         TYPE *m = vm, *n = vn;                                  \
1964         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
1965             if (mask & 1) {                                     \
1966                 int64_t n0 = n[H##ESIZE(e)];                    \
1967                 int64_t m0 = m[H##ESIZE(e)];                    \
1968                 uint32_t r = n0 >= m0 ? (n0 - m0) : (m0 - n0);  \
1969                 ra += r;                                        \
1970             }                                                   \
1971         }                                                       \
1972         mve_advance_vpt(env);                                   \
1973         return ra;                                              \
1974     }
1975 
1976 DO_VABAV(vabavsb, 1, int8_t)
1977 DO_VABAV(vabavsh, 2, int16_t)
1978 DO_VABAV(vabavsw, 4, int32_t)
1979 DO_VABAV(vabavub, 1, uint8_t)
1980 DO_VABAV(vabavuh, 2, uint16_t)
1981 DO_VABAV(vabavuw, 4, uint32_t)
1982 
1983 #define DO_VADDLV(OP, TYPE, LTYPE)                              \
1984     uint64_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vm, \
1985                                     uint64_t ra)                \
1986     {                                                           \
1987         uint16_t mask = mve_element_mask(env);                  \
1988         unsigned e;                                             \
1989         TYPE *m = vm;                                           \
1990         for (e = 0; e < 16 / 4; e++, mask >>= 4) {              \
1991             if (mask & 1) {                                     \
1992                 ra += (LTYPE)m[H4(e)];                          \
1993             }                                                   \
1994         }                                                       \
1995         mve_advance_vpt(env);                                   \
1996         return ra;                                              \
1997     }                                                           \
1998 
1999 DO_VADDLV(vaddlv_s, int32_t, int64_t)
2000 DO_VADDLV(vaddlv_u, uint32_t, uint64_t)
2001 
2002 /* Shifts by immediate */
2003 #define DO_2SHIFT(OP, ESIZE, TYPE, FN)                          \
2004     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
2005                                 void *vm, uint32_t shift)       \
2006     {                                                           \
2007         TYPE *d = vd, *m = vm;                                  \
2008         uint16_t mask = mve_element_mask(env);                  \
2009         unsigned e;                                             \
2010         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
2011             mergemask(&d[H##ESIZE(e)],                          \
2012                       FN(m[H##ESIZE(e)], shift), mask);         \
2013         }                                                       \
2014         mve_advance_vpt(env);                                   \
2015     }
2016 
2017 #define DO_2SHIFT_SAT(OP, ESIZE, TYPE, FN)                      \
2018     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
2019                                 void *vm, uint32_t shift)       \
2020     {                                                           \
2021         TYPE *d = vd, *m = vm;                                  \
2022         uint16_t mask = mve_element_mask(env);                  \
2023         unsigned e;                                             \
2024         bool qc = false;                                        \
2025         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
2026             bool sat = false;                                   \
2027             mergemask(&d[H##ESIZE(e)],                          \
2028                       FN(m[H##ESIZE(e)], shift, &sat), mask);   \
2029             qc |= sat & mask & 1;                               \
2030         }                                                       \
2031         if (qc) {                                               \
2032             env->vfp.qc[0] = qc;                                \
2033         }                                                       \
2034         mve_advance_vpt(env);                                   \
2035     }
2036 
2037 /* provide unsigned 2-op shift helpers for all sizes */
2038 #define DO_2SHIFT_U(OP, FN)                     \
2039     DO_2SHIFT(OP##b, 1, uint8_t, FN)            \
2040     DO_2SHIFT(OP##h, 2, uint16_t, FN)           \
2041     DO_2SHIFT(OP##w, 4, uint32_t, FN)
2042 #define DO_2SHIFT_S(OP, FN)                     \
2043     DO_2SHIFT(OP##b, 1, int8_t, FN)             \
2044     DO_2SHIFT(OP##h, 2, int16_t, FN)            \
2045     DO_2SHIFT(OP##w, 4, int32_t, FN)
2046 
2047 #define DO_2SHIFT_SAT_U(OP, FN)                 \
2048     DO_2SHIFT_SAT(OP##b, 1, uint8_t, FN)        \
2049     DO_2SHIFT_SAT(OP##h, 2, uint16_t, FN)       \
2050     DO_2SHIFT_SAT(OP##w, 4, uint32_t, FN)
2051 #define DO_2SHIFT_SAT_S(OP, FN)                 \
2052     DO_2SHIFT_SAT(OP##b, 1, int8_t, FN)         \
2053     DO_2SHIFT_SAT(OP##h, 2, int16_t, FN)        \
2054     DO_2SHIFT_SAT(OP##w, 4, int32_t, FN)
2055 
2056 DO_2SHIFT_U(vshli_u, DO_VSHLU)
2057 DO_2SHIFT_S(vshli_s, DO_VSHLS)
2058 DO_2SHIFT_SAT_U(vqshli_u, DO_UQSHL_OP)
2059 DO_2SHIFT_SAT_S(vqshli_s, DO_SQSHL_OP)
2060 DO_2SHIFT_SAT_S(vqshlui_s, DO_SUQSHL_OP)
2061 DO_2SHIFT_U(vrshli_u, DO_VRSHLU)
2062 DO_2SHIFT_S(vrshli_s, DO_VRSHLS)
2063 DO_2SHIFT_SAT_U(vqrshli_u, DO_UQRSHL_OP)
2064 DO_2SHIFT_SAT_S(vqrshli_s, DO_SQRSHL_OP)
2065 
2066 /* Shift-and-insert; we always work with 64 bits at a time */
2067 #define DO_2SHIFT_INSERT(OP, ESIZE, SHIFTFN, MASKFN)                    \
2068     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,             \
2069                                 void *vm, uint32_t shift)               \
2070     {                                                                   \
2071         uint64_t *d = vd, *m = vm;                                      \
2072         uint16_t mask;                                                  \
2073         uint64_t shiftmask;                                             \
2074         unsigned e;                                                     \
2075         if (shift == ESIZE * 8) {                                       \
2076             /*                                                          \
2077              * Only VSRI can shift by <dt>; it should mean "don't       \
2078              * update the destination". The generic logic can't handle  \
2079              * this because it would try to shift by an out-of-range    \
2080              * amount, so special case it here.                         \
2081              */                                                         \
2082             goto done;                                                  \
2083         }                                                               \
2084         assert(shift < ESIZE * 8);                                      \
2085         mask = mve_element_mask(env);                                   \
2086         /* ESIZE / 2 gives the MO_* value if ESIZE is in [1,2,4] */     \
2087         shiftmask = dup_const(ESIZE / 2, MASKFN(ESIZE * 8, shift));     \
2088         for (e = 0; e < 16 / 8; e++, mask >>= 8) {                      \
2089             uint64_t r = (SHIFTFN(m[H8(e)], shift) & shiftmask) |       \
2090                 (d[H8(e)] & ~shiftmask);                                \
2091             mergemask(&d[H8(e)], r, mask);                              \
2092         }                                                               \
2093 done:                                                                   \
2094         mve_advance_vpt(env);                                           \
2095     }
2096 
2097 #define DO_SHL(N, SHIFT) ((N) << (SHIFT))
2098 #define DO_SHR(N, SHIFT) ((N) >> (SHIFT))
2099 #define SHL_MASK(EBITS, SHIFT) MAKE_64BIT_MASK((SHIFT), (EBITS) - (SHIFT))
2100 #define SHR_MASK(EBITS, SHIFT) MAKE_64BIT_MASK(0, (EBITS) - (SHIFT))
2101 
2102 DO_2SHIFT_INSERT(vsrib, 1, DO_SHR, SHR_MASK)
2103 DO_2SHIFT_INSERT(vsrih, 2, DO_SHR, SHR_MASK)
2104 DO_2SHIFT_INSERT(vsriw, 4, DO_SHR, SHR_MASK)
2105 DO_2SHIFT_INSERT(vslib, 1, DO_SHL, SHL_MASK)
2106 DO_2SHIFT_INSERT(vslih, 2, DO_SHL, SHL_MASK)
2107 DO_2SHIFT_INSERT(vsliw, 4, DO_SHL, SHL_MASK)
2108 
2109 /*
2110  * Long shifts taking half-sized inputs from top or bottom of the input
2111  * vector and producing a double-width result. ESIZE, TYPE are for
2112  * the input, and LESIZE, LTYPE for the output.
2113  * Unlike the normal shift helpers, we do not handle negative shift counts,
2114  * because the long shift is strictly left-only.
2115  */
2116 #define DO_VSHLL(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE)                   \
2117     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,             \
2118                                 void *vm, uint32_t shift)               \
2119     {                                                                   \
2120         LTYPE *d = vd;                                                  \
2121         TYPE *m = vm;                                                   \
2122         uint16_t mask = mve_element_mask(env);                          \
2123         unsigned le;                                                    \
2124         assert(shift <= 16);                                            \
2125         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
2126             LTYPE r = (LTYPE)m[H##ESIZE(le * 2 + TOP)] << shift;        \
2127             mergemask(&d[H##LESIZE(le)], r, mask);                      \
2128         }                                                               \
2129         mve_advance_vpt(env);                                           \
2130     }
2131 
2132 #define DO_VSHLL_ALL(OP, TOP)                                \
2133     DO_VSHLL(OP##sb, TOP, 1, int8_t, 2, int16_t)             \
2134     DO_VSHLL(OP##ub, TOP, 1, uint8_t, 2, uint16_t)           \
2135     DO_VSHLL(OP##sh, TOP, 2, int16_t, 4, int32_t)            \
2136     DO_VSHLL(OP##uh, TOP, 2, uint16_t, 4, uint32_t)          \
2137 
2138 DO_VSHLL_ALL(vshllb, false)
2139 DO_VSHLL_ALL(vshllt, true)
2140 
2141 /*
2142  * Narrowing right shifts, taking a double sized input, shifting it
2143  * and putting the result in either the top or bottom half of the output.
2144  * ESIZE, TYPE are the output, and LESIZE, LTYPE the input.
2145  */
2146 #define DO_VSHRN(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)       \
2147     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
2148                                 void *vm, uint32_t shift)       \
2149     {                                                           \
2150         LTYPE *m = vm;                                          \
2151         TYPE *d = vd;                                           \
2152         uint16_t mask = mve_element_mask(env);                  \
2153         unsigned le;                                            \
2154         mask >>= ESIZE * TOP;                                   \
2155         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \
2156             TYPE r = FN(m[H##LESIZE(le)], shift);               \
2157             mergemask(&d[H##ESIZE(le * 2 + TOP)], r, mask);     \
2158         }                                                       \
2159         mve_advance_vpt(env);                                   \
2160     }
2161 
2162 #define DO_VSHRN_ALL(OP, FN)                                    \
2163     DO_VSHRN(OP##bb, false, 1, uint8_t, 2, uint16_t, FN)        \
2164     DO_VSHRN(OP##bh, false, 2, uint16_t, 4, uint32_t, FN)       \
2165     DO_VSHRN(OP##tb, true, 1, uint8_t, 2, uint16_t, FN)         \
2166     DO_VSHRN(OP##th, true, 2, uint16_t, 4, uint32_t, FN)
2167 
2168 static inline uint64_t do_urshr(uint64_t x, unsigned sh)
2169 {
2170     if (likely(sh < 64)) {
2171         return (x >> sh) + ((x >> (sh - 1)) & 1);
2172     } else if (sh == 64) {
2173         return x >> 63;
2174     } else {
2175         return 0;
2176     }
2177 }
2178 
2179 static inline int64_t do_srshr(int64_t x, unsigned sh)
2180 {
2181     if (likely(sh < 64)) {
2182         return (x >> sh) + ((x >> (sh - 1)) & 1);
2183     } else {
2184         /* Rounding the sign bit always produces 0. */
2185         return 0;
2186     }
2187 }
2188 
2189 DO_VSHRN_ALL(vshrn, DO_SHR)
2190 DO_VSHRN_ALL(vrshrn, do_urshr)
2191 
2192 static inline int32_t do_sat_bhs(int64_t val, int64_t min, int64_t max,
2193                                  bool *satp)
2194 {
2195     if (val > max) {
2196         *satp = true;
2197         return max;
2198     } else if (val < min) {
2199         *satp = true;
2200         return min;
2201     } else {
2202         return val;
2203     }
2204 }
2205 
2206 /* Saturating narrowing right shifts */
2207 #define DO_VSHRN_SAT(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)   \
2208     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd,     \
2209                                 void *vm, uint32_t shift)       \
2210     {                                                           \
2211         LTYPE *m = vm;                                          \
2212         TYPE *d = vd;                                           \
2213         uint16_t mask = mve_element_mask(env);                  \
2214         bool qc = false;                                        \
2215         unsigned le;                                            \
2216         mask >>= ESIZE * TOP;                                   \
2217         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) { \
2218             bool sat = false;                                   \
2219             TYPE r = FN(m[H##LESIZE(le)], shift, &sat);         \
2220             mergemask(&d[H##ESIZE(le * 2 + TOP)], r, mask);     \
2221             qc |= sat & mask & 1;                               \
2222         }                                                       \
2223         if (qc) {                                               \
2224             env->vfp.qc[0] = qc;                                \
2225         }                                                       \
2226         mve_advance_vpt(env);                                   \
2227     }
2228 
2229 #define DO_VSHRN_SAT_UB(BOP, TOP, FN)                           \
2230     DO_VSHRN_SAT(BOP, false, 1, uint8_t, 2, uint16_t, FN)       \
2231     DO_VSHRN_SAT(TOP, true, 1, uint8_t, 2, uint16_t, FN)
2232 
2233 #define DO_VSHRN_SAT_UH(BOP, TOP, FN)                           \
2234     DO_VSHRN_SAT(BOP, false, 2, uint16_t, 4, uint32_t, FN)      \
2235     DO_VSHRN_SAT(TOP, true, 2, uint16_t, 4, uint32_t, FN)
2236 
2237 #define DO_VSHRN_SAT_SB(BOP, TOP, FN)                           \
2238     DO_VSHRN_SAT(BOP, false, 1, int8_t, 2, int16_t, FN)         \
2239     DO_VSHRN_SAT(TOP, true, 1, int8_t, 2, int16_t, FN)
2240 
2241 #define DO_VSHRN_SAT_SH(BOP, TOP, FN)                           \
2242     DO_VSHRN_SAT(BOP, false, 2, int16_t, 4, int32_t, FN)        \
2243     DO_VSHRN_SAT(TOP, true, 2, int16_t, 4, int32_t, FN)
2244 
2245 #define DO_SHRN_SB(N, M, SATP)                                  \
2246     do_sat_bhs((int64_t)(N) >> (M), INT8_MIN, INT8_MAX, SATP)
2247 #define DO_SHRN_UB(N, M, SATP)                                  \
2248     do_sat_bhs((uint64_t)(N) >> (M), 0, UINT8_MAX, SATP)
2249 #define DO_SHRUN_B(N, M, SATP)                                  \
2250     do_sat_bhs((int64_t)(N) >> (M), 0, UINT8_MAX, SATP)
2251 
2252 #define DO_SHRN_SH(N, M, SATP)                                  \
2253     do_sat_bhs((int64_t)(N) >> (M), INT16_MIN, INT16_MAX, SATP)
2254 #define DO_SHRN_UH(N, M, SATP)                                  \
2255     do_sat_bhs((uint64_t)(N) >> (M), 0, UINT16_MAX, SATP)
2256 #define DO_SHRUN_H(N, M, SATP)                                  \
2257     do_sat_bhs((int64_t)(N) >> (M), 0, UINT16_MAX, SATP)
2258 
2259 #define DO_RSHRN_SB(N, M, SATP)                                 \
2260     do_sat_bhs(do_srshr(N, M), INT8_MIN, INT8_MAX, SATP)
2261 #define DO_RSHRN_UB(N, M, SATP)                                 \
2262     do_sat_bhs(do_urshr(N, M), 0, UINT8_MAX, SATP)
2263 #define DO_RSHRUN_B(N, M, SATP)                                 \
2264     do_sat_bhs(do_srshr(N, M), 0, UINT8_MAX, SATP)
2265 
2266 #define DO_RSHRN_SH(N, M, SATP)                                 \
2267     do_sat_bhs(do_srshr(N, M), INT16_MIN, INT16_MAX, SATP)
2268 #define DO_RSHRN_UH(N, M, SATP)                                 \
2269     do_sat_bhs(do_urshr(N, M), 0, UINT16_MAX, SATP)
2270 #define DO_RSHRUN_H(N, M, SATP)                                 \
2271     do_sat_bhs(do_srshr(N, M), 0, UINT16_MAX, SATP)
2272 
2273 DO_VSHRN_SAT_SB(vqshrnb_sb, vqshrnt_sb, DO_SHRN_SB)
2274 DO_VSHRN_SAT_SH(vqshrnb_sh, vqshrnt_sh, DO_SHRN_SH)
2275 DO_VSHRN_SAT_UB(vqshrnb_ub, vqshrnt_ub, DO_SHRN_UB)
2276 DO_VSHRN_SAT_UH(vqshrnb_uh, vqshrnt_uh, DO_SHRN_UH)
2277 DO_VSHRN_SAT_SB(vqshrunbb, vqshruntb, DO_SHRUN_B)
2278 DO_VSHRN_SAT_SH(vqshrunbh, vqshrunth, DO_SHRUN_H)
2279 
2280 DO_VSHRN_SAT_SB(vqrshrnb_sb, vqrshrnt_sb, DO_RSHRN_SB)
2281 DO_VSHRN_SAT_SH(vqrshrnb_sh, vqrshrnt_sh, DO_RSHRN_SH)
2282 DO_VSHRN_SAT_UB(vqrshrnb_ub, vqrshrnt_ub, DO_RSHRN_UB)
2283 DO_VSHRN_SAT_UH(vqrshrnb_uh, vqrshrnt_uh, DO_RSHRN_UH)
2284 DO_VSHRN_SAT_SB(vqrshrunbb, vqrshruntb, DO_RSHRUN_B)
2285 DO_VSHRN_SAT_SH(vqrshrunbh, vqrshrunth, DO_RSHRUN_H)
2286 
2287 #define DO_VMOVN(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE)                   \
2288     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \
2289     {                                                                   \
2290         LTYPE *m = vm;                                                  \
2291         TYPE *d = vd;                                                   \
2292         uint16_t mask = mve_element_mask(env);                          \
2293         unsigned le;                                                    \
2294         mask >>= ESIZE * TOP;                                           \
2295         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
2296             mergemask(&d[H##ESIZE(le * 2 + TOP)],                       \
2297                       m[H##LESIZE(le)], mask);                          \
2298         }                                                               \
2299         mve_advance_vpt(env);                                           \
2300     }
2301 
2302 DO_VMOVN(vmovnbb, false, 1, uint8_t, 2, uint16_t)
2303 DO_VMOVN(vmovnbh, false, 2, uint16_t, 4, uint32_t)
2304 DO_VMOVN(vmovntb, true, 1, uint8_t, 2, uint16_t)
2305 DO_VMOVN(vmovnth, true, 2, uint16_t, 4, uint32_t)
2306 
2307 #define DO_VMOVN_SAT(OP, TOP, ESIZE, TYPE, LESIZE, LTYPE, FN)           \
2308     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \
2309     {                                                                   \
2310         LTYPE *m = vm;                                                  \
2311         TYPE *d = vd;                                                   \
2312         uint16_t mask = mve_element_mask(env);                          \
2313         bool qc = false;                                                \
2314         unsigned le;                                                    \
2315         mask >>= ESIZE * TOP;                                           \
2316         for (le = 0; le < 16 / LESIZE; le++, mask >>= LESIZE) {         \
2317             bool sat = false;                                           \
2318             TYPE r = FN(m[H##LESIZE(le)], &sat);                        \
2319             mergemask(&d[H##ESIZE(le * 2 + TOP)], r, mask);             \
2320             qc |= sat & mask & 1;                                       \
2321         }                                                               \
2322         if (qc) {                                                       \
2323             env->vfp.qc[0] = qc;                                        \
2324         }                                                               \
2325         mve_advance_vpt(env);                                           \
2326     }
2327 
2328 #define DO_VMOVN_SAT_UB(BOP, TOP, FN)                           \
2329     DO_VMOVN_SAT(BOP, false, 1, uint8_t, 2, uint16_t, FN)       \
2330     DO_VMOVN_SAT(TOP, true, 1, uint8_t, 2, uint16_t, FN)
2331 
2332 #define DO_VMOVN_SAT_UH(BOP, TOP, FN)                           \
2333     DO_VMOVN_SAT(BOP, false, 2, uint16_t, 4, uint32_t, FN)      \
2334     DO_VMOVN_SAT(TOP, true, 2, uint16_t, 4, uint32_t, FN)
2335 
2336 #define DO_VMOVN_SAT_SB(BOP, TOP, FN)                           \
2337     DO_VMOVN_SAT(BOP, false, 1, int8_t, 2, int16_t, FN)         \
2338     DO_VMOVN_SAT(TOP, true, 1, int8_t, 2, int16_t, FN)
2339 
2340 #define DO_VMOVN_SAT_SH(BOP, TOP, FN)                           \
2341     DO_VMOVN_SAT(BOP, false, 2, int16_t, 4, int32_t, FN)        \
2342     DO_VMOVN_SAT(TOP, true, 2, int16_t, 4, int32_t, FN)
2343 
2344 #define DO_VQMOVN_SB(N, SATP)                           \
2345     do_sat_bhs((int64_t)(N), INT8_MIN, INT8_MAX, SATP)
2346 #define DO_VQMOVN_UB(N, SATP)                           \
2347     do_sat_bhs((uint64_t)(N), 0, UINT8_MAX, SATP)
2348 #define DO_VQMOVUN_B(N, SATP)                           \
2349     do_sat_bhs((int64_t)(N), 0, UINT8_MAX, SATP)
2350 
2351 #define DO_VQMOVN_SH(N, SATP)                           \
2352     do_sat_bhs((int64_t)(N), INT16_MIN, INT16_MAX, SATP)
2353 #define DO_VQMOVN_UH(N, SATP)                           \
2354     do_sat_bhs((uint64_t)(N), 0, UINT16_MAX, SATP)
2355 #define DO_VQMOVUN_H(N, SATP)                           \
2356     do_sat_bhs((int64_t)(N), 0, UINT16_MAX, SATP)
2357 
2358 DO_VMOVN_SAT_SB(vqmovnbsb, vqmovntsb, DO_VQMOVN_SB)
2359 DO_VMOVN_SAT_SH(vqmovnbsh, vqmovntsh, DO_VQMOVN_SH)
2360 DO_VMOVN_SAT_UB(vqmovnbub, vqmovntub, DO_VQMOVN_UB)
2361 DO_VMOVN_SAT_UH(vqmovnbuh, vqmovntuh, DO_VQMOVN_UH)
2362 DO_VMOVN_SAT_SB(vqmovunbb, vqmovuntb, DO_VQMOVUN_B)
2363 DO_VMOVN_SAT_SH(vqmovunbh, vqmovunth, DO_VQMOVUN_H)
2364 
2365 uint32_t HELPER(mve_vshlc)(CPUARMState *env, void *vd, uint32_t rdm,
2366                            uint32_t shift)
2367 {
2368     uint32_t *d = vd;
2369     uint16_t mask = mve_element_mask(env);
2370     unsigned e;
2371     uint32_t r;
2372 
2373     /*
2374      * For each 32-bit element, we shift it left, bringing in the
2375      * low 'shift' bits of rdm at the bottom. Bits shifted out at
2376      * the top become the new rdm, if the predicate mask permits.
2377      * The final rdm value is returned to update the register.
2378      * shift == 0 here means "shift by 32 bits".
2379      */
2380     if (shift == 0) {
2381         for (e = 0; e < 16 / 4; e++, mask >>= 4) {
2382             r = rdm;
2383             if (mask & 1) {
2384                 rdm = d[H4(e)];
2385             }
2386             mergemask(&d[H4(e)], r, mask);
2387         }
2388     } else {
2389         uint32_t shiftmask = MAKE_64BIT_MASK(0, shift);
2390 
2391         for (e = 0; e < 16 / 4; e++, mask >>= 4) {
2392             r = (d[H4(e)] << shift) | (rdm & shiftmask);
2393             if (mask & 1) {
2394                 rdm = d[H4(e)] >> (32 - shift);
2395             }
2396             mergemask(&d[H4(e)], r, mask);
2397         }
2398     }
2399     mve_advance_vpt(env);
2400     return rdm;
2401 }
2402 
2403 uint64_t HELPER(mve_sshrl)(CPUARMState *env, uint64_t n, uint32_t shift)
2404 {
2405     return do_sqrshl_d(n, -(int8_t)shift, false, NULL);
2406 }
2407 
2408 uint64_t HELPER(mve_ushll)(CPUARMState *env, uint64_t n, uint32_t shift)
2409 {
2410     return do_uqrshl_d(n, (int8_t)shift, false, NULL);
2411 }
2412 
2413 uint64_t HELPER(mve_sqshll)(CPUARMState *env, uint64_t n, uint32_t shift)
2414 {
2415     return do_sqrshl_d(n, (int8_t)shift, false, &env->QF);
2416 }
2417 
2418 uint64_t HELPER(mve_uqshll)(CPUARMState *env, uint64_t n, uint32_t shift)
2419 {
2420     return do_uqrshl_d(n, (int8_t)shift, false, &env->QF);
2421 }
2422 
2423 uint64_t HELPER(mve_sqrshrl)(CPUARMState *env, uint64_t n, uint32_t shift)
2424 {
2425     return do_sqrshl_d(n, -(int8_t)shift, true, &env->QF);
2426 }
2427 
2428 uint64_t HELPER(mve_uqrshll)(CPUARMState *env, uint64_t n, uint32_t shift)
2429 {
2430     return do_uqrshl_d(n, (int8_t)shift, true, &env->QF);
2431 }
2432 
2433 /* Operate on 64-bit values, but saturate at 48 bits */
2434 static inline int64_t do_sqrshl48_d(int64_t src, int64_t shift,
2435                                     bool round, uint32_t *sat)
2436 {
2437     int64_t val, extval;
2438 
2439     if (shift <= -48) {
2440         /* Rounding the sign bit always produces 0. */
2441         if (round) {
2442             return 0;
2443         }
2444         return src >> 63;
2445     } else if (shift < 0) {
2446         if (round) {
2447             src >>= -shift - 1;
2448             val = (src >> 1) + (src & 1);
2449         } else {
2450             val = src >> -shift;
2451         }
2452         extval = sextract64(val, 0, 48);
2453         if (!sat || val == extval) {
2454             return extval;
2455         }
2456     } else if (shift < 48) {
2457         extval = sextract64(src << shift, 0, 48);
2458         if (!sat || src == (extval >> shift)) {
2459             return extval;
2460         }
2461     } else if (!sat || src == 0) {
2462         return 0;
2463     }
2464 
2465     *sat = 1;
2466     return src >= 0 ? MAKE_64BIT_MASK(0, 47) : MAKE_64BIT_MASK(47, 17);
2467 }
2468 
2469 /* Operate on 64-bit values, but saturate at 48 bits */
2470 static inline uint64_t do_uqrshl48_d(uint64_t src, int64_t shift,
2471                                      bool round, uint32_t *sat)
2472 {
2473     uint64_t val, extval;
2474 
2475     if (shift <= -(48 + round)) {
2476         return 0;
2477     } else if (shift < 0) {
2478         if (round) {
2479             val = src >> (-shift - 1);
2480             val = (val >> 1) + (val & 1);
2481         } else {
2482             val = src >> -shift;
2483         }
2484         extval = extract64(val, 0, 48);
2485         if (!sat || val == extval) {
2486             return extval;
2487         }
2488     } else if (shift < 48) {
2489         extval = extract64(src << shift, 0, 48);
2490         if (!sat || src == (extval >> shift)) {
2491             return extval;
2492         }
2493     } else if (!sat || src == 0) {
2494         return 0;
2495     }
2496 
2497     *sat = 1;
2498     return MAKE_64BIT_MASK(0, 48);
2499 }
2500 
2501 uint64_t HELPER(mve_sqrshrl48)(CPUARMState *env, uint64_t n, uint32_t shift)
2502 {
2503     return do_sqrshl48_d(n, -(int8_t)shift, true, &env->QF);
2504 }
2505 
2506 uint64_t HELPER(mve_uqrshll48)(CPUARMState *env, uint64_t n, uint32_t shift)
2507 {
2508     return do_uqrshl48_d(n, (int8_t)shift, true, &env->QF);
2509 }
2510 
2511 uint32_t HELPER(mve_uqshl)(CPUARMState *env, uint32_t n, uint32_t shift)
2512 {
2513     return do_uqrshl_bhs(n, (int8_t)shift, 32, false, &env->QF);
2514 }
2515 
2516 uint32_t HELPER(mve_sqshl)(CPUARMState *env, uint32_t n, uint32_t shift)
2517 {
2518     return do_sqrshl_bhs(n, (int8_t)shift, 32, false, &env->QF);
2519 }
2520 
2521 uint32_t HELPER(mve_uqrshl)(CPUARMState *env, uint32_t n, uint32_t shift)
2522 {
2523     return do_uqrshl_bhs(n, (int8_t)shift, 32, true, &env->QF);
2524 }
2525 
2526 uint32_t HELPER(mve_sqrshr)(CPUARMState *env, uint32_t n, uint32_t shift)
2527 {
2528     return do_sqrshl_bhs(n, -(int8_t)shift, 32, true, &env->QF);
2529 }
2530 
2531 #define DO_VIDUP(OP, ESIZE, TYPE, FN)                           \
2532     uint32_t HELPER(mve_##OP)(CPUARMState *env, void *vd,       \
2533                            uint32_t offset, uint32_t imm)       \
2534     {                                                           \
2535         TYPE *d = vd;                                           \
2536         uint16_t mask = mve_element_mask(env);                  \
2537         unsigned e;                                             \
2538         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
2539             mergemask(&d[H##ESIZE(e)], offset, mask);           \
2540             offset = FN(offset, imm);                           \
2541         }                                                       \
2542         mve_advance_vpt(env);                                   \
2543         return offset;                                          \
2544     }
2545 
2546 #define DO_VIWDUP(OP, ESIZE, TYPE, FN)                          \
2547     uint32_t HELPER(mve_##OP)(CPUARMState *env, void *vd,       \
2548                               uint32_t offset, uint32_t wrap,   \
2549                               uint32_t imm)                     \
2550     {                                                           \
2551         TYPE *d = vd;                                           \
2552         uint16_t mask = mve_element_mask(env);                  \
2553         unsigned e;                                             \
2554         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
2555             mergemask(&d[H##ESIZE(e)], offset, mask);           \
2556             offset = FN(offset, wrap, imm);                     \
2557         }                                                       \
2558         mve_advance_vpt(env);                                   \
2559         return offset;                                          \
2560     }
2561 
2562 #define DO_VIDUP_ALL(OP, FN)                    \
2563     DO_VIDUP(OP##b, 1, int8_t, FN)              \
2564     DO_VIDUP(OP##h, 2, int16_t, FN)             \
2565     DO_VIDUP(OP##w, 4, int32_t, FN)
2566 
2567 #define DO_VIWDUP_ALL(OP, FN)                   \
2568     DO_VIWDUP(OP##b, 1, int8_t, FN)             \
2569     DO_VIWDUP(OP##h, 2, int16_t, FN)            \
2570     DO_VIWDUP(OP##w, 4, int32_t, FN)
2571 
2572 static uint32_t do_add_wrap(uint32_t offset, uint32_t wrap, uint32_t imm)
2573 {
2574     offset += imm;
2575     if (offset == wrap) {
2576         offset = 0;
2577     }
2578     return offset;
2579 }
2580 
2581 static uint32_t do_sub_wrap(uint32_t offset, uint32_t wrap, uint32_t imm)
2582 {
2583     if (offset == 0) {
2584         offset = wrap;
2585     }
2586     offset -= imm;
2587     return offset;
2588 }
2589 
2590 DO_VIDUP_ALL(vidup, DO_ADD)
2591 DO_VIWDUP_ALL(viwdup, do_add_wrap)
2592 DO_VIWDUP_ALL(vdwdup, do_sub_wrap)
2593 
2594 /*
2595  * Vector comparison.
2596  * P0 bits for non-executed beats (where eci_mask is 0) are unchanged.
2597  * P0 bits for predicated lanes in executed beats (where mask is 0) are 0.
2598  * P0 bits otherwise are updated with the results of the comparisons.
2599  * We must also keep unchanged the MASK fields at the top of v7m.vpr.
2600  */
2601 #define DO_VCMP(OP, ESIZE, TYPE, FN)                                    \
2602     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vn, void *vm)   \
2603     {                                                                   \
2604         TYPE *n = vn, *m = vm;                                          \
2605         uint16_t mask = mve_element_mask(env);                          \
2606         uint16_t eci_mask = mve_eci_mask(env);                          \
2607         uint16_t beatpred = 0;                                          \
2608         uint16_t emask = MAKE_64BIT_MASK(0, ESIZE);                     \
2609         unsigned e;                                                     \
2610         for (e = 0; e < 16 / ESIZE; e++) {                              \
2611             bool r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)]);                \
2612             /* Comparison sets 0/1 bits for each byte in the element */ \
2613             beatpred |= r * emask;                                      \
2614             emask <<= ESIZE;                                            \
2615         }                                                               \
2616         beatpred &= mask;                                               \
2617         env->v7m.vpr = (env->v7m.vpr & ~(uint32_t)eci_mask) |           \
2618             (beatpred & eci_mask);                                      \
2619         mve_advance_vpt(env);                                           \
2620     }
2621 
2622 #define DO_VCMP_SCALAR(OP, ESIZE, TYPE, FN)                             \
2623     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,             \
2624                                 uint32_t rm)                            \
2625     {                                                                   \
2626         TYPE *n = vn;                                                   \
2627         uint16_t mask = mve_element_mask(env);                          \
2628         uint16_t eci_mask = mve_eci_mask(env);                          \
2629         uint16_t beatpred = 0;                                          \
2630         uint16_t emask = MAKE_64BIT_MASK(0, ESIZE);                     \
2631         unsigned e;                                                     \
2632         for (e = 0; e < 16 / ESIZE; e++) {                              \
2633             bool r = FN(n[H##ESIZE(e)], (TYPE)rm);                      \
2634             /* Comparison sets 0/1 bits for each byte in the element */ \
2635             beatpred |= r * emask;                                      \
2636             emask <<= ESIZE;                                            \
2637         }                                                               \
2638         beatpred &= mask;                                               \
2639         env->v7m.vpr = (env->v7m.vpr & ~(uint32_t)eci_mask) |           \
2640             (beatpred & eci_mask);                                      \
2641         mve_advance_vpt(env);                                           \
2642     }
2643 
2644 #define DO_VCMP_S(OP, FN)                               \
2645     DO_VCMP(OP##b, 1, int8_t, FN)                       \
2646     DO_VCMP(OP##h, 2, int16_t, FN)                      \
2647     DO_VCMP(OP##w, 4, int32_t, FN)                      \
2648     DO_VCMP_SCALAR(OP##_scalarb, 1, int8_t, FN)         \
2649     DO_VCMP_SCALAR(OP##_scalarh, 2, int16_t, FN)        \
2650     DO_VCMP_SCALAR(OP##_scalarw, 4, int32_t, FN)
2651 
2652 #define DO_VCMP_U(OP, FN)                               \
2653     DO_VCMP(OP##b, 1, uint8_t, FN)                      \
2654     DO_VCMP(OP##h, 2, uint16_t, FN)                     \
2655     DO_VCMP(OP##w, 4, uint32_t, FN)                     \
2656     DO_VCMP_SCALAR(OP##_scalarb, 1, uint8_t, FN)        \
2657     DO_VCMP_SCALAR(OP##_scalarh, 2, uint16_t, FN)       \
2658     DO_VCMP_SCALAR(OP##_scalarw, 4, uint32_t, FN)
2659 
2660 #define DO_EQ(N, M) ((N) == (M))
2661 #define DO_NE(N, M) ((N) != (M))
2662 #define DO_EQ(N, M) ((N) == (M))
2663 #define DO_EQ(N, M) ((N) == (M))
2664 #define DO_GE(N, M) ((N) >= (M))
2665 #define DO_LT(N, M) ((N) < (M))
2666 #define DO_GT(N, M) ((N) > (M))
2667 #define DO_LE(N, M) ((N) <= (M))
2668 
2669 DO_VCMP_U(vcmpeq, DO_EQ)
2670 DO_VCMP_U(vcmpne, DO_NE)
2671 DO_VCMP_U(vcmpcs, DO_GE)
2672 DO_VCMP_U(vcmphi, DO_GT)
2673 DO_VCMP_S(vcmpge, DO_GE)
2674 DO_VCMP_S(vcmplt, DO_LT)
2675 DO_VCMP_S(vcmpgt, DO_GT)
2676 DO_VCMP_S(vcmple, DO_LE)
2677 
2678 void HELPER(mve_vpsel)(CPUARMState *env, void *vd, void *vn, void *vm)
2679 {
2680     /*
2681      * Qd[n] = VPR.P0[n] ? Qn[n] : Qm[n]
2682      * but note that whether bytes are written to Qd is still subject
2683      * to (all forms of) predication in the usual way.
2684      */
2685     uint64_t *d = vd, *n = vn, *m = vm;
2686     uint16_t mask = mve_element_mask(env);
2687     uint16_t p0 = FIELD_EX32(env->v7m.vpr, V7M_VPR, P0);
2688     unsigned e;
2689     for (e = 0; e < 16 / 8; e++, mask >>= 8, p0 >>= 8) {
2690         uint64_t r = m[H8(e)];
2691         mergemask(&r, n[H8(e)], p0);
2692         mergemask(&d[H8(e)], r, mask);
2693     }
2694     mve_advance_vpt(env);
2695 }
2696 
2697 void HELPER(mve_vpnot)(CPUARMState *env)
2698 {
2699     /*
2700      * P0 bits for unexecuted beats (where eci_mask is 0) are unchanged.
2701      * P0 bits for predicated lanes in executed bits (where mask is 0) are 0.
2702      * P0 bits otherwise are inverted.
2703      * (This is the same logic as VCMP.)
2704      * This insn is itself subject to predication and to beat-wise execution,
2705      * and after it executes VPT state advances in the usual way.
2706      */
2707     uint16_t mask = mve_element_mask(env);
2708     uint16_t eci_mask = mve_eci_mask(env);
2709     uint16_t beatpred = ~env->v7m.vpr & mask;
2710     env->v7m.vpr = (env->v7m.vpr & ~(uint32_t)eci_mask) | (beatpred & eci_mask);
2711     mve_advance_vpt(env);
2712 }
2713 
2714 /*
2715  * VCTP: P0 unexecuted bits unchanged, predicated bits zeroed,
2716  * otherwise set according to value of Rn. The calculation of
2717  * newmask here works in the same way as the calculation of the
2718  * ltpmask in mve_element_mask(), but we have pre-calculated
2719  * the masklen in the generated code.
2720  */
2721 void HELPER(mve_vctp)(CPUARMState *env, uint32_t masklen)
2722 {
2723     uint16_t mask = mve_element_mask(env);
2724     uint16_t eci_mask = mve_eci_mask(env);
2725     uint16_t newmask;
2726 
2727     assert(masklen <= 16);
2728     newmask = masklen ? MAKE_64BIT_MASK(0, masklen) : 0;
2729     newmask &= mask;
2730     env->v7m.vpr = (env->v7m.vpr & ~(uint32_t)eci_mask) | (newmask & eci_mask);
2731     mve_advance_vpt(env);
2732 }
2733 
2734 #define DO_1OP_SAT(OP, ESIZE, TYPE, FN)                                 \
2735     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \
2736     {                                                                   \
2737         TYPE *d = vd, *m = vm;                                          \
2738         uint16_t mask = mve_element_mask(env);                          \
2739         unsigned e;                                                     \
2740         bool qc = false;                                                \
2741         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
2742             bool sat = false;                                           \
2743             mergemask(&d[H##ESIZE(e)], FN(m[H##ESIZE(e)], &sat), mask); \
2744             qc |= sat & mask & 1;                                       \
2745         }                                                               \
2746         if (qc) {                                                       \
2747             env->vfp.qc[0] = qc;                                        \
2748         }                                                               \
2749         mve_advance_vpt(env);                                           \
2750     }
2751 
2752 #define DO_VQABS_B(N, SATP) \
2753     do_sat_bhs(DO_ABS((int64_t)N), INT8_MIN, INT8_MAX, SATP)
2754 #define DO_VQABS_H(N, SATP) \
2755     do_sat_bhs(DO_ABS((int64_t)N), INT16_MIN, INT16_MAX, SATP)
2756 #define DO_VQABS_W(N, SATP) \
2757     do_sat_bhs(DO_ABS((int64_t)N), INT32_MIN, INT32_MAX, SATP)
2758 
2759 #define DO_VQNEG_B(N, SATP) do_sat_bhs(-(int64_t)N, INT8_MIN, INT8_MAX, SATP)
2760 #define DO_VQNEG_H(N, SATP) do_sat_bhs(-(int64_t)N, INT16_MIN, INT16_MAX, SATP)
2761 #define DO_VQNEG_W(N, SATP) do_sat_bhs(-(int64_t)N, INT32_MIN, INT32_MAX, SATP)
2762 
2763 DO_1OP_SAT(vqabsb, 1, int8_t, DO_VQABS_B)
2764 DO_1OP_SAT(vqabsh, 2, int16_t, DO_VQABS_H)
2765 DO_1OP_SAT(vqabsw, 4, int32_t, DO_VQABS_W)
2766 
2767 DO_1OP_SAT(vqnegb, 1, int8_t, DO_VQNEG_B)
2768 DO_1OP_SAT(vqnegh, 2, int16_t, DO_VQNEG_H)
2769 DO_1OP_SAT(vqnegw, 4, int32_t, DO_VQNEG_W)
2770 
2771 /*
2772  * VMAXA, VMINA: vd is unsigned; vm is signed, and we take its
2773  * absolute value; we then do an unsigned comparison.
2774  */
2775 #define DO_VMAXMINA(OP, ESIZE, STYPE, UTYPE, FN)                        \
2776     void HELPER(mve_##OP)(CPUARMState *env, void *vd, void *vm)         \
2777     {                                                                   \
2778         UTYPE *d = vd;                                                  \
2779         STYPE *m = vm;                                                  \
2780         uint16_t mask = mve_element_mask(env);                          \
2781         unsigned e;                                                     \
2782         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
2783             UTYPE r = DO_ABS(m[H##ESIZE(e)]);                           \
2784             r = FN(d[H##ESIZE(e)], r);                                  \
2785             mergemask(&d[H##ESIZE(e)], r, mask);                        \
2786         }                                                               \
2787         mve_advance_vpt(env);                                           \
2788     }
2789 
2790 DO_VMAXMINA(vmaxab, 1, int8_t, uint8_t, DO_MAX)
2791 DO_VMAXMINA(vmaxah, 2, int16_t, uint16_t, DO_MAX)
2792 DO_VMAXMINA(vmaxaw, 4, int32_t, uint32_t, DO_MAX)
2793 DO_VMAXMINA(vminab, 1, int8_t, uint8_t, DO_MIN)
2794 DO_VMAXMINA(vminah, 2, int16_t, uint16_t, DO_MIN)
2795 DO_VMAXMINA(vminaw, 4, int32_t, uint32_t, DO_MIN)
2796 
2797 /*
2798  * 2-operand floating point. Note that if an element is partially
2799  * predicated we must do the FP operation to update the non-predicated
2800  * bytes, but we must be careful to avoid updating the FP exception
2801  * state unless byte 0 of the element was unpredicated.
2802  */
2803 #define DO_2OP_FP(OP, ESIZE, TYPE, FN)                                  \
2804     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
2805                                 void *vd, void *vn, void *vm)           \
2806     {                                                                   \
2807         TYPE *d = vd, *n = vn, *m = vm;                                 \
2808         TYPE r;                                                         \
2809         uint16_t mask = mve_element_mask(env);                          \
2810         unsigned e;                                                     \
2811         float_status *fpst;                                             \
2812         float_status scratch_fpst;                                      \
2813         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
2814             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
2815                 continue;                                               \
2816             }                                                           \
2817             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
2818                 &env->vfp.standard_fp_status;                           \
2819             if (!(mask & 1)) {                                          \
2820                 /* We need the result but without updating flags */     \
2821                 scratch_fpst = *fpst;                                   \
2822                 fpst = &scratch_fpst;                                   \
2823             }                                                           \
2824             r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], fpst);               \
2825             mergemask(&d[H##ESIZE(e)], r, mask);                        \
2826         }                                                               \
2827         mve_advance_vpt(env);                                           \
2828     }
2829 
2830 #define DO_2OP_FP_ALL(OP, FN)                  \
2831     DO_2OP_FP(OP##h, 2, float16, float16_##FN) \
2832     DO_2OP_FP(OP##s, 4, float32, float32_##FN)
2833 
2834 DO_2OP_FP_ALL(vfadd, add)
2835 DO_2OP_FP_ALL(vfsub, sub)
2836 DO_2OP_FP_ALL(vfmul, mul)
2837 
2838 static inline float16 float16_abd(float16 a, float16 b, float_status *s)
2839 {
2840     return float16_abs(float16_sub(a, b, s));
2841 }
2842 
2843 static inline float32 float32_abd(float32 a, float32 b, float_status *s)
2844 {
2845     return float32_abs(float32_sub(a, b, s));
2846 }
2847 
2848 DO_2OP_FP_ALL(vfabd, abd)
2849 DO_2OP_FP_ALL(vmaxnm, maxnum)
2850 DO_2OP_FP_ALL(vminnm, minnum)
2851 
2852 static inline float16 float16_maxnuma(float16 a, float16 b, float_status *s)
2853 {
2854     return float16_maxnum(float16_abs(a), float16_abs(b), s);
2855 }
2856 
2857 static inline float32 float32_maxnuma(float32 a, float32 b, float_status *s)
2858 {
2859     return float32_maxnum(float32_abs(a), float32_abs(b), s);
2860 }
2861 
2862 static inline float16 float16_minnuma(float16 a, float16 b, float_status *s)
2863 {
2864     return float16_minnum(float16_abs(a), float16_abs(b), s);
2865 }
2866 
2867 static inline float32 float32_minnuma(float32 a, float32 b, float_status *s)
2868 {
2869     return float32_minnum(float32_abs(a), float32_abs(b), s);
2870 }
2871 
2872 DO_2OP_FP_ALL(vmaxnma, maxnuma)
2873 DO_2OP_FP_ALL(vminnma, minnuma)
2874 
2875 #define DO_VCADD_FP(OP, ESIZE, TYPE, FN0, FN1)                          \
2876     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
2877                                 void *vd, void *vn, void *vm)           \
2878     {                                                                   \
2879         TYPE *d = vd, *n = vn, *m = vm;                                 \
2880         TYPE r[16 / ESIZE];                                             \
2881         uint16_t tm, mask = mve_element_mask(env);                      \
2882         unsigned e;                                                     \
2883         float_status *fpst;                                             \
2884         float_status scratch_fpst;                                      \
2885         /* Calculate all results first to avoid overwriting inputs */   \
2886         for (e = 0, tm = mask; e < 16 / ESIZE; e++, tm >>= ESIZE) {     \
2887             if ((tm & MAKE_64BIT_MASK(0, ESIZE)) == 0) {                \
2888                 r[e] = 0;                                               \
2889                 continue;                                               \
2890             }                                                           \
2891             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
2892                 &env->vfp.standard_fp_status;                           \
2893             if (!(tm & 1)) {                                            \
2894                 /* We need the result but without updating flags */     \
2895                 scratch_fpst = *fpst;                                   \
2896                 fpst = &scratch_fpst;                                   \
2897             }                                                           \
2898             if (!(e & 1)) {                                             \
2899                 r[e] = FN0(n[H##ESIZE(e)], m[H##ESIZE(e + 1)], fpst);   \
2900             } else {                                                    \
2901                 r[e] = FN1(n[H##ESIZE(e)], m[H##ESIZE(e - 1)], fpst);   \
2902             }                                                           \
2903         }                                                               \
2904         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
2905             mergemask(&d[H##ESIZE(e)], r[e], mask);                     \
2906         }                                                               \
2907         mve_advance_vpt(env);                                           \
2908     }
2909 
2910 DO_VCADD_FP(vfcadd90h, 2, float16, float16_sub, float16_add)
2911 DO_VCADD_FP(vfcadd90s, 4, float32, float32_sub, float32_add)
2912 DO_VCADD_FP(vfcadd270h, 2, float16, float16_add, float16_sub)
2913 DO_VCADD_FP(vfcadd270s, 4, float32, float32_add, float32_sub)
2914 
2915 #define DO_VFMA(OP, ESIZE, TYPE, CHS)                                   \
2916     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
2917                                 void *vd, void *vn, void *vm)           \
2918     {                                                                   \
2919         TYPE *d = vd, *n = vn, *m = vm;                                 \
2920         TYPE r;                                                         \
2921         uint16_t mask = mve_element_mask(env);                          \
2922         unsigned e;                                                     \
2923         float_status *fpst;                                             \
2924         float_status scratch_fpst;                                      \
2925         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
2926             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
2927                 continue;                                               \
2928             }                                                           \
2929             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
2930                 &env->vfp.standard_fp_status;                           \
2931             if (!(mask & 1)) {                                          \
2932                 /* We need the result but without updating flags */     \
2933                 scratch_fpst = *fpst;                                   \
2934                 fpst = &scratch_fpst;                                   \
2935             }                                                           \
2936             r = n[H##ESIZE(e)];                                         \
2937             if (CHS) {                                                  \
2938                 r = TYPE##_chs(r);                                      \
2939             }                                                           \
2940             r = TYPE##_muladd(r, m[H##ESIZE(e)], d[H##ESIZE(e)],        \
2941                               0, fpst);                                 \
2942             mergemask(&d[H##ESIZE(e)], r, mask);                        \
2943         }                                                               \
2944         mve_advance_vpt(env);                                           \
2945     }
2946 
2947 DO_VFMA(vfmah, 2, float16, false)
2948 DO_VFMA(vfmas, 4, float32, false)
2949 DO_VFMA(vfmsh, 2, float16, true)
2950 DO_VFMA(vfmss, 4, float32, true)
2951 
2952 #define DO_VCMLA(OP, ESIZE, TYPE, ROT, FN)                              \
2953     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
2954                                 void *vd, void *vn, void *vm)           \
2955     {                                                                   \
2956         TYPE *d = vd, *n = vn, *m = vm;                                 \
2957         TYPE r0, r1, e1, e2, e3, e4;                                    \
2958         uint16_t mask = mve_element_mask(env);                          \
2959         unsigned e;                                                     \
2960         float_status *fpst0, *fpst1;                                    \
2961         float_status scratch_fpst;                                      \
2962         /* We loop through pairs of elements at a time */               \
2963         for (e = 0; e < 16 / ESIZE; e += 2, mask >>= ESIZE * 2) {       \
2964             if ((mask & MAKE_64BIT_MASK(0, ESIZE * 2)) == 0) {          \
2965                 continue;                                               \
2966             }                                                           \
2967             fpst0 = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :   \
2968                 &env->vfp.standard_fp_status;                           \
2969             fpst1 = fpst0;                                              \
2970             if (!(mask & 1)) {                                          \
2971                 scratch_fpst = *fpst0;                                  \
2972                 fpst0 = &scratch_fpst;                                  \
2973             }                                                           \
2974             if (!(mask & (1 << ESIZE))) {                               \
2975                 scratch_fpst = *fpst1;                                  \
2976                 fpst1 = &scratch_fpst;                                  \
2977             }                                                           \
2978             switch (ROT) {                                              \
2979             case 0:                                                     \
2980                 e1 = m[H##ESIZE(e)];                                    \
2981                 e2 = n[H##ESIZE(e)];                                    \
2982                 e3 = m[H##ESIZE(e + 1)];                                \
2983                 e4 = n[H##ESIZE(e)];                                    \
2984                 break;                                                  \
2985             case 1:                                                     \
2986                 e1 = TYPE##_chs(m[H##ESIZE(e + 1)]);                    \
2987                 e2 = n[H##ESIZE(e + 1)];                                \
2988                 e3 = m[H##ESIZE(e)];                                    \
2989                 e4 = n[H##ESIZE(e + 1)];                                \
2990                 break;                                                  \
2991             case 2:                                                     \
2992                 e1 = TYPE##_chs(m[H##ESIZE(e)]);                        \
2993                 e2 = n[H##ESIZE(e)];                                    \
2994                 e3 = TYPE##_chs(m[H##ESIZE(e + 1)]);                    \
2995                 e4 = n[H##ESIZE(e)];                                    \
2996                 break;                                                  \
2997             case 3:                                                     \
2998                 e1 = m[H##ESIZE(e + 1)];                                \
2999                 e2 = n[H##ESIZE(e + 1)];                                \
3000                 e3 = TYPE##_chs(m[H##ESIZE(e)]);                        \
3001                 e4 = n[H##ESIZE(e + 1)];                                \
3002                 break;                                                  \
3003             default:                                                    \
3004                 g_assert_not_reached();                                 \
3005             }                                                           \
3006             r0 = FN(e2, e1, d[H##ESIZE(e)], fpst0);                     \
3007             r1 = FN(e4, e3, d[H##ESIZE(e + 1)], fpst1);                 \
3008             mergemask(&d[H##ESIZE(e)], r0, mask);                       \
3009             mergemask(&d[H##ESIZE(e + 1)], r1, mask >> ESIZE);          \
3010         }                                                               \
3011         mve_advance_vpt(env);                                           \
3012     }
3013 
3014 #define DO_VCMULH(N, M, D, S) float16_mul(N, M, S)
3015 #define DO_VCMULS(N, M, D, S) float32_mul(N, M, S)
3016 
3017 #define DO_VCMLAH(N, M, D, S) float16_muladd(N, M, D, 0, S)
3018 #define DO_VCMLAS(N, M, D, S) float32_muladd(N, M, D, 0, S)
3019 
3020 DO_VCMLA(vcmul0h, 2, float16, 0, DO_VCMULH)
3021 DO_VCMLA(vcmul0s, 4, float32, 0, DO_VCMULS)
3022 DO_VCMLA(vcmul90h, 2, float16, 1, DO_VCMULH)
3023 DO_VCMLA(vcmul90s, 4, float32, 1, DO_VCMULS)
3024 DO_VCMLA(vcmul180h, 2, float16, 2, DO_VCMULH)
3025 DO_VCMLA(vcmul180s, 4, float32, 2, DO_VCMULS)
3026 DO_VCMLA(vcmul270h, 2, float16, 3, DO_VCMULH)
3027 DO_VCMLA(vcmul270s, 4, float32, 3, DO_VCMULS)
3028 
3029 DO_VCMLA(vcmla0h, 2, float16, 0, DO_VCMLAH)
3030 DO_VCMLA(vcmla0s, 4, float32, 0, DO_VCMLAS)
3031 DO_VCMLA(vcmla90h, 2, float16, 1, DO_VCMLAH)
3032 DO_VCMLA(vcmla90s, 4, float32, 1, DO_VCMLAS)
3033 DO_VCMLA(vcmla180h, 2, float16, 2, DO_VCMLAH)
3034 DO_VCMLA(vcmla180s, 4, float32, 2, DO_VCMLAS)
3035 DO_VCMLA(vcmla270h, 2, float16, 3, DO_VCMLAH)
3036 DO_VCMLA(vcmla270s, 4, float32, 3, DO_VCMLAS)
3037 
3038 #define DO_2OP_FP_SCALAR(OP, ESIZE, TYPE, FN)                           \
3039     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
3040                                 void *vd, void *vn, uint32_t rm)        \
3041     {                                                                   \
3042         TYPE *d = vd, *n = vn;                                          \
3043         TYPE r, m = rm;                                                 \
3044         uint16_t mask = mve_element_mask(env);                          \
3045         unsigned e;                                                     \
3046         float_status *fpst;                                             \
3047         float_status scratch_fpst;                                      \
3048         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
3049             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
3050                 continue;                                               \
3051             }                                                           \
3052             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
3053                 &env->vfp.standard_fp_status;                           \
3054             if (!(mask & 1)) {                                          \
3055                 /* We need the result but without updating flags */     \
3056                 scratch_fpst = *fpst;                                   \
3057                 fpst = &scratch_fpst;                                   \
3058             }                                                           \
3059             r = FN(n[H##ESIZE(e)], m, fpst);                            \
3060             mergemask(&d[H##ESIZE(e)], r, mask);                        \
3061         }                                                               \
3062         mve_advance_vpt(env);                                           \
3063     }
3064 
3065 #define DO_2OP_FP_SCALAR_ALL(OP, FN)                    \
3066     DO_2OP_FP_SCALAR(OP##h, 2, float16, float16_##FN)   \
3067     DO_2OP_FP_SCALAR(OP##s, 4, float32, float32_##FN)
3068 
3069 DO_2OP_FP_SCALAR_ALL(vfadd_scalar, add)
3070 DO_2OP_FP_SCALAR_ALL(vfsub_scalar, sub)
3071 DO_2OP_FP_SCALAR_ALL(vfmul_scalar, mul)
3072 
3073 #define DO_2OP_FP_ACC_SCALAR(OP, ESIZE, TYPE, FN)                       \
3074     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
3075                                 void *vd, void *vn, uint32_t rm)        \
3076     {                                                                   \
3077         TYPE *d = vd, *n = vn;                                          \
3078         TYPE r, m = rm;                                                 \
3079         uint16_t mask = mve_element_mask(env);                          \
3080         unsigned e;                                                     \
3081         float_status *fpst;                                             \
3082         float_status scratch_fpst;                                      \
3083         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
3084             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
3085                 continue;                                               \
3086             }                                                           \
3087             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
3088                 &env->vfp.standard_fp_status;                           \
3089             if (!(mask & 1)) {                                          \
3090                 /* We need the result but without updating flags */     \
3091                 scratch_fpst = *fpst;                                   \
3092                 fpst = &scratch_fpst;                                   \
3093             }                                                           \
3094             r = FN(n[H##ESIZE(e)], m, d[H##ESIZE(e)], 0, fpst);         \
3095             mergemask(&d[H##ESIZE(e)], r, mask);                        \
3096         }                                                               \
3097         mve_advance_vpt(env);                                           \
3098     }
3099 
3100 /* VFMAS is vector * vector + scalar, so swap op2 and op3 */
3101 #define DO_VFMAS_SCALARH(N, M, D, F, S) float16_muladd(N, D, M, F, S)
3102 #define DO_VFMAS_SCALARS(N, M, D, F, S) float32_muladd(N, D, M, F, S)
3103 
3104 /* VFMA is vector * scalar + vector */
3105 DO_2OP_FP_ACC_SCALAR(vfma_scalarh, 2, float16, float16_muladd)
3106 DO_2OP_FP_ACC_SCALAR(vfma_scalars, 4, float32, float32_muladd)
3107 DO_2OP_FP_ACC_SCALAR(vfmas_scalarh, 2, float16, DO_VFMAS_SCALARH)
3108 DO_2OP_FP_ACC_SCALAR(vfmas_scalars, 4, float32, DO_VFMAS_SCALARS)
3109 
3110 /* Floating point max/min across vector. */
3111 #define DO_FP_VMAXMINV(OP, ESIZE, TYPE, ABS, FN)                \
3112     uint32_t HELPER(glue(mve_, OP))(CPUARMState *env, void *vm, \
3113                                     uint32_t ra_in)             \
3114     {                                                           \
3115         uint16_t mask = mve_element_mask(env);                  \
3116         unsigned e;                                             \
3117         TYPE *m = vm;                                           \
3118         TYPE ra = (TYPE)ra_in;                                  \
3119         float_status *fpst = (ESIZE == 2) ?                     \
3120             &env->vfp.standard_fp_status_f16 :                  \
3121             &env->vfp.standard_fp_status;                       \
3122         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {      \
3123             if (mask & 1) {                                     \
3124                 TYPE v = m[H##ESIZE(e)];                        \
3125                 if (TYPE##_is_signaling_nan(ra, fpst)) {        \
3126                     ra = TYPE##_silence_nan(ra, fpst);          \
3127                     float_raise(float_flag_invalid, fpst);      \
3128                 }                                               \
3129                 if (TYPE##_is_signaling_nan(v, fpst)) {         \
3130                     v = TYPE##_silence_nan(v, fpst);            \
3131                     float_raise(float_flag_invalid, fpst);      \
3132                 }                                               \
3133                 if (ABS) {                                      \
3134                     v = TYPE##_abs(v);                          \
3135                 }                                               \
3136                 ra = FN(ra, v, fpst);                           \
3137             }                                                   \
3138         }                                                       \
3139         mve_advance_vpt(env);                                   \
3140         return ra;                                              \
3141     }                                                           \
3142 
3143 #define NOP(X) (X)
3144 
3145 DO_FP_VMAXMINV(vmaxnmvh, 2, float16, false, float16_maxnum)
3146 DO_FP_VMAXMINV(vmaxnmvs, 4, float32, false, float32_maxnum)
3147 DO_FP_VMAXMINV(vminnmvh, 2, float16, false, float16_minnum)
3148 DO_FP_VMAXMINV(vminnmvs, 4, float32, false, float32_minnum)
3149 DO_FP_VMAXMINV(vmaxnmavh, 2, float16, true, float16_maxnum)
3150 DO_FP_VMAXMINV(vmaxnmavs, 4, float32, true, float32_maxnum)
3151 DO_FP_VMAXMINV(vminnmavh, 2, float16, true, float16_minnum)
3152 DO_FP_VMAXMINV(vminnmavs, 4, float32, true, float32_minnum)
3153 
3154 /* FP compares; note that all comparisons signal InvalidOp for QNaNs */
3155 #define DO_VCMP_FP(OP, ESIZE, TYPE, FN)                                 \
3156     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vn, void *vm)   \
3157     {                                                                   \
3158         TYPE *n = vn, *m = vm;                                          \
3159         uint16_t mask = mve_element_mask(env);                          \
3160         uint16_t eci_mask = mve_eci_mask(env);                          \
3161         uint16_t beatpred = 0;                                          \
3162         uint16_t emask = MAKE_64BIT_MASK(0, ESIZE);                     \
3163         unsigned e;                                                     \
3164         float_status *fpst;                                             \
3165         float_status scratch_fpst;                                      \
3166         bool r;                                                         \
3167         for (e = 0; e < 16 / ESIZE; e++, emask <<= ESIZE) {             \
3168             if ((mask & emask) == 0) {                                  \
3169                 continue;                                               \
3170             }                                                           \
3171             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
3172                 &env->vfp.standard_fp_status;                           \
3173             if (!(mask & (1 << (e * ESIZE)))) {                         \
3174                 /* We need the result but without updating flags */     \
3175                 scratch_fpst = *fpst;                                   \
3176                 fpst = &scratch_fpst;                                   \
3177             }                                                           \
3178             r = FN(n[H##ESIZE(e)], m[H##ESIZE(e)], fpst);               \
3179             /* Comparison sets 0/1 bits for each byte in the element */ \
3180             beatpred |= r * emask;                                      \
3181         }                                                               \
3182         beatpred &= mask;                                               \
3183         env->v7m.vpr = (env->v7m.vpr & ~(uint32_t)eci_mask) |           \
3184             (beatpred & eci_mask);                                      \
3185         mve_advance_vpt(env);                                           \
3186     }
3187 
3188 #define DO_VCMP_FP_SCALAR(OP, ESIZE, TYPE, FN)                          \
3189     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vn,             \
3190                                 uint32_t rm)                            \
3191     {                                                                   \
3192         TYPE *n = vn;                                                   \
3193         uint16_t mask = mve_element_mask(env);                          \
3194         uint16_t eci_mask = mve_eci_mask(env);                          \
3195         uint16_t beatpred = 0;                                          \
3196         uint16_t emask = MAKE_64BIT_MASK(0, ESIZE);                     \
3197         unsigned e;                                                     \
3198         float_status *fpst;                                             \
3199         float_status scratch_fpst;                                      \
3200         bool r;                                                         \
3201         for (e = 0; e < 16 / ESIZE; e++, emask <<= ESIZE) {             \
3202             if ((mask & emask) == 0) {                                  \
3203                 continue;                                               \
3204             }                                                           \
3205             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
3206                 &env->vfp.standard_fp_status;                           \
3207             if (!(mask & (1 << (e * ESIZE)))) {                         \
3208                 /* We need the result but without updating flags */     \
3209                 scratch_fpst = *fpst;                                   \
3210                 fpst = &scratch_fpst;                                   \
3211             }                                                           \
3212             r = FN(n[H##ESIZE(e)], (TYPE)rm, fpst);                     \
3213             /* Comparison sets 0/1 bits for each byte in the element */ \
3214             beatpred |= r * emask;                                      \
3215         }                                                               \
3216         beatpred &= mask;                                               \
3217         env->v7m.vpr = (env->v7m.vpr & ~(uint32_t)eci_mask) |           \
3218             (beatpred & eci_mask);                                      \
3219         mve_advance_vpt(env);                                           \
3220     }
3221 
3222 #define DO_VCMP_FP_BOTH(VOP, SOP, ESIZE, TYPE, FN)      \
3223     DO_VCMP_FP(VOP, ESIZE, TYPE, FN)                    \
3224     DO_VCMP_FP_SCALAR(SOP, ESIZE, TYPE, FN)
3225 
3226 /*
3227  * Some care is needed here to get the correct result for the unordered case.
3228  * Architecturally EQ, GE and GT are defined to be false for unordered, but
3229  * the NE, LT and LE comparisons are defined as simple logical inverses of
3230  * EQ, GE and GT and so they must return true for unordered. The softfloat
3231  * comparison functions float*_{eq,le,lt} all return false for unordered.
3232  */
3233 #define DO_GE16(X, Y, S) float16_le(Y, X, S)
3234 #define DO_GE32(X, Y, S) float32_le(Y, X, S)
3235 #define DO_GT16(X, Y, S) float16_lt(Y, X, S)
3236 #define DO_GT32(X, Y, S) float32_lt(Y, X, S)
3237 
3238 DO_VCMP_FP_BOTH(vfcmpeqh, vfcmpeq_scalarh, 2, float16, float16_eq)
3239 DO_VCMP_FP_BOTH(vfcmpeqs, vfcmpeq_scalars, 4, float32, float32_eq)
3240 
3241 DO_VCMP_FP_BOTH(vfcmpneh, vfcmpne_scalarh, 2, float16, !float16_eq)
3242 DO_VCMP_FP_BOTH(vfcmpnes, vfcmpne_scalars, 4, float32, !float32_eq)
3243 
3244 DO_VCMP_FP_BOTH(vfcmpgeh, vfcmpge_scalarh, 2, float16, DO_GE16)
3245 DO_VCMP_FP_BOTH(vfcmpges, vfcmpge_scalars, 4, float32, DO_GE32)
3246 
3247 DO_VCMP_FP_BOTH(vfcmplth, vfcmplt_scalarh, 2, float16, !DO_GE16)
3248 DO_VCMP_FP_BOTH(vfcmplts, vfcmplt_scalars, 4, float32, !DO_GE32)
3249 
3250 DO_VCMP_FP_BOTH(vfcmpgth, vfcmpgt_scalarh, 2, float16, DO_GT16)
3251 DO_VCMP_FP_BOTH(vfcmpgts, vfcmpgt_scalars, 4, float32, DO_GT32)
3252 
3253 DO_VCMP_FP_BOTH(vfcmpleh, vfcmple_scalarh, 2, float16, !DO_GT16)
3254 DO_VCMP_FP_BOTH(vfcmples, vfcmple_scalars, 4, float32, !DO_GT32)
3255 
3256 #define DO_VCVT_FIXED(OP, ESIZE, TYPE, FN)                              \
3257     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vm,   \
3258                                 uint32_t shift)                         \
3259     {                                                                   \
3260         TYPE *d = vd, *m = vm;                                          \
3261         TYPE r;                                                         \
3262         uint16_t mask = mve_element_mask(env);                          \
3263         unsigned e;                                                     \
3264         float_status *fpst;                                             \
3265         float_status scratch_fpst;                                      \
3266         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
3267             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
3268                 continue;                                               \
3269             }                                                           \
3270             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
3271                 &env->vfp.standard_fp_status;                           \
3272             if (!(mask & 1)) {                                          \
3273                 /* We need the result but without updating flags */     \
3274                 scratch_fpst = *fpst;                                   \
3275                 fpst = &scratch_fpst;                                   \
3276             }                                                           \
3277             r = FN(m[H##ESIZE(e)], shift, fpst);                        \
3278             mergemask(&d[H##ESIZE(e)], r, mask);                        \
3279         }                                                               \
3280         mve_advance_vpt(env);                                           \
3281     }
3282 
3283 DO_VCVT_FIXED(vcvt_sh, 2, int16_t, helper_vfp_shtoh)
3284 DO_VCVT_FIXED(vcvt_uh, 2, uint16_t, helper_vfp_uhtoh)
3285 DO_VCVT_FIXED(vcvt_hs, 2, int16_t, helper_vfp_toshh_round_to_zero)
3286 DO_VCVT_FIXED(vcvt_hu, 2, uint16_t, helper_vfp_touhh_round_to_zero)
3287 DO_VCVT_FIXED(vcvt_sf, 4, int32_t, helper_vfp_sltos)
3288 DO_VCVT_FIXED(vcvt_uf, 4, uint32_t, helper_vfp_ultos)
3289 DO_VCVT_FIXED(vcvt_fs, 4, int32_t, helper_vfp_tosls_round_to_zero)
3290 DO_VCVT_FIXED(vcvt_fu, 4, uint32_t, helper_vfp_touls_round_to_zero)
3291 
3292 /* VCVT with specified rmode */
3293 #define DO_VCVT_RMODE(OP, ESIZE, TYPE, FN)                              \
3294     void HELPER(glue(mve_, OP))(CPUARMState *env,                       \
3295                                 void *vd, void *vm, uint32_t rmode)     \
3296     {                                                                   \
3297         TYPE *d = vd, *m = vm;                                          \
3298         TYPE r;                                                         \
3299         uint16_t mask = mve_element_mask(env);                          \
3300         unsigned e;                                                     \
3301         float_status *fpst;                                             \
3302         float_status scratch_fpst;                                      \
3303         float_status *base_fpst = (ESIZE == 2) ?                        \
3304             &env->vfp.standard_fp_status_f16 :                          \
3305             &env->vfp.standard_fp_status;                               \
3306         uint32_t prev_rmode = get_float_rounding_mode(base_fpst);       \
3307         set_float_rounding_mode(rmode, base_fpst);                      \
3308         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
3309             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
3310                 continue;                                               \
3311             }                                                           \
3312             fpst = base_fpst;                                           \
3313             if (!(mask & 1)) {                                          \
3314                 /* We need the result but without updating flags */     \
3315                 scratch_fpst = *fpst;                                   \
3316                 fpst = &scratch_fpst;                                   \
3317             }                                                           \
3318             r = FN(m[H##ESIZE(e)], 0, fpst);                            \
3319             mergemask(&d[H##ESIZE(e)], r, mask);                        \
3320         }                                                               \
3321         set_float_rounding_mode(prev_rmode, base_fpst);                 \
3322         mve_advance_vpt(env);                                           \
3323     }
3324 
3325 DO_VCVT_RMODE(vcvt_rm_sh, 2, uint16_t, helper_vfp_toshh)
3326 DO_VCVT_RMODE(vcvt_rm_uh, 2, uint16_t, helper_vfp_touhh)
3327 DO_VCVT_RMODE(vcvt_rm_ss, 4, uint32_t, helper_vfp_tosls)
3328 DO_VCVT_RMODE(vcvt_rm_us, 4, uint32_t, helper_vfp_touls)
3329 
3330 #define DO_VRINT_RM_H(M, F, S) helper_rinth(M, S)
3331 #define DO_VRINT_RM_S(M, F, S) helper_rints(M, S)
3332 
3333 DO_VCVT_RMODE(vrint_rm_h, 2, uint16_t, DO_VRINT_RM_H)
3334 DO_VCVT_RMODE(vrint_rm_s, 4, uint32_t, DO_VRINT_RM_S)
3335 
3336 /*
3337  * VCVT between halfprec and singleprec. As usual for halfprec
3338  * conversions, FZ16 is ignored and AHP is observed.
3339  */
3340 static void do_vcvt_sh(CPUARMState *env, void *vd, void *vm, int top)
3341 {
3342     uint16_t *d = vd;
3343     uint32_t *m = vm;
3344     uint16_t r;
3345     uint16_t mask = mve_element_mask(env);
3346     bool ieee = !(env->vfp.fpcr & FPCR_AHP);
3347     unsigned e;
3348     float_status *fpst;
3349     float_status scratch_fpst;
3350     float_status *base_fpst = &env->vfp.standard_fp_status;
3351     bool old_fz = get_flush_to_zero(base_fpst);
3352     set_flush_to_zero(false, base_fpst);
3353     for (e = 0; e < 16 / 4; e++, mask >>= 4) {
3354         if ((mask & MAKE_64BIT_MASK(0, 4)) == 0) {
3355             continue;
3356         }
3357         fpst = base_fpst;
3358         if (!(mask & 1)) {
3359             /* We need the result but without updating flags */
3360             scratch_fpst = *fpst;
3361             fpst = &scratch_fpst;
3362         }
3363         r = float32_to_float16(m[H4(e)], ieee, fpst);
3364         mergemask(&d[H2(e * 2 + top)], r, mask >> (top * 2));
3365     }
3366     set_flush_to_zero(old_fz, base_fpst);
3367     mve_advance_vpt(env);
3368 }
3369 
3370 static void do_vcvt_hs(CPUARMState *env, void *vd, void *vm, int top)
3371 {
3372     uint32_t *d = vd;
3373     uint16_t *m = vm;
3374     uint32_t r;
3375     uint16_t mask = mve_element_mask(env);
3376     bool ieee = !(env->vfp.fpcr & FPCR_AHP);
3377     unsigned e;
3378     float_status *fpst;
3379     float_status scratch_fpst;
3380     float_status *base_fpst = &env->vfp.standard_fp_status;
3381     bool old_fiz = get_flush_inputs_to_zero(base_fpst);
3382     set_flush_inputs_to_zero(false, base_fpst);
3383     for (e = 0; e < 16 / 4; e++, mask >>= 4) {
3384         if ((mask & MAKE_64BIT_MASK(0, 4)) == 0) {
3385             continue;
3386         }
3387         fpst = base_fpst;
3388         if (!(mask & (1 << (top * 2)))) {
3389             /* We need the result but without updating flags */
3390             scratch_fpst = *fpst;
3391             fpst = &scratch_fpst;
3392         }
3393         r = float16_to_float32(m[H2(e * 2 + top)], ieee, fpst);
3394         mergemask(&d[H4(e)], r, mask);
3395     }
3396     set_flush_inputs_to_zero(old_fiz, base_fpst);
3397     mve_advance_vpt(env);
3398 }
3399 
3400 void HELPER(mve_vcvtb_sh)(CPUARMState *env, void *vd, void *vm)
3401 {
3402     do_vcvt_sh(env, vd, vm, 0);
3403 }
3404 void HELPER(mve_vcvtt_sh)(CPUARMState *env, void *vd, void *vm)
3405 {
3406     do_vcvt_sh(env, vd, vm, 1);
3407 }
3408 void HELPER(mve_vcvtb_hs)(CPUARMState *env, void *vd, void *vm)
3409 {
3410     do_vcvt_hs(env, vd, vm, 0);
3411 }
3412 void HELPER(mve_vcvtt_hs)(CPUARMState *env, void *vd, void *vm)
3413 {
3414     do_vcvt_hs(env, vd, vm, 1);
3415 }
3416 
3417 #define DO_1OP_FP(OP, ESIZE, TYPE, FN)                                  \
3418     void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vm)   \
3419     {                                                                   \
3420         TYPE *d = vd, *m = vm;                                          \
3421         TYPE r;                                                         \
3422         uint16_t mask = mve_element_mask(env);                          \
3423         unsigned e;                                                     \
3424         float_status *fpst;                                             \
3425         float_status scratch_fpst;                                      \
3426         for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) {              \
3427             if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) {              \
3428                 continue;                                               \
3429             }                                                           \
3430             fpst = (ESIZE == 2) ? &env->vfp.standard_fp_status_f16 :    \
3431                 &env->vfp.standard_fp_status;                           \
3432             if (!(mask & 1)) {                                          \
3433                 /* We need the result but without updating flags */     \
3434                 scratch_fpst = *fpst;                                   \
3435                 fpst = &scratch_fpst;                                   \
3436             }                                                           \
3437             r = FN(m[H##ESIZE(e)], fpst);                               \
3438             mergemask(&d[H##ESIZE(e)], r, mask);                        \
3439         }                                                               \
3440         mve_advance_vpt(env);                                           \
3441     }
3442 
3443 DO_1OP_FP(vrintx_h, 2, float16, float16_round_to_int)
3444 DO_1OP_FP(vrintx_s, 4, float32, float32_round_to_int)
3445