1gen = [ 2 decodetree.process('sve.decode', extra_args: '--decode=disas_sve'), 3 decodetree.process('neon-shared.decode', extra_args: '--static-decode=disas_neon_shared'), 4 decodetree.process('neon-dp.decode', extra_args: '--static-decode=disas_neon_dp'), 5 decodetree.process('neon-ls.decode', extra_args: '--static-decode=disas_neon_ls'), 6 decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'), 7 decodetree.process('vfp-uncond.decode', extra_args: '--static-decode=disas_vfp_uncond'), 8 decodetree.process('m-nocp.decode', extra_args: '--static-decode=disas_m_nocp'), 9 decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'), 10 decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'), 11 decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'), 12 decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']), 13] 14 15arm_ss = ss.source_set() 16arm_ss.add(gen) 17arm_ss.add(files( 18 'cpu.c', 19 'crypto_helper.c', 20 'debug_helper.c', 21 'gdbstub.c', 22 'helper.c', 23 'iwmmxt_helper.c', 24 'm_helper.c', 25 'neon_helper.c', 26 'op_helper.c', 27 'tlb_helper.c', 28 'translate.c', 29 'vec_helper.c', 30 'vfp_helper.c', 31 'cpu_tcg.c', 32)) 33arm_ss.add(zlib) 34 35arm_ss.add(when: 'CONFIG_TCG', if_true: files('arm-semi.c')) 36 37kvm_ss = ss.source_set() 38kvm_ss.add(when: 'TARGET_AARCH64', if_true: files('kvm64.c'), if_false: files('kvm32.c')) 39arm_ss.add_all(when: 'CONFIG_KVM', if_true: kvm_ss) 40arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c')) 41 42arm_ss.add(when: 'TARGET_AARCH64', if_true: files( 43 'cpu64.c', 44 'gdbstub64.c', 45 'helper-a64.c', 46 'mte_helper.c', 47 'pauth_helper.c', 48 'sve_helper.c', 49 'translate-a64.c', 50 'translate-sve.c', 51)) 52 53arm_softmmu_ss = ss.source_set() 54arm_softmmu_ss.add(files( 55 'arch_dump.c', 56 'arm-powerctl.c', 57 'machine.c', 58 'monitor.c', 59 'psci.c', 60)) 61 62target_arch += {'arm': arm_ss} 63target_softmmu_arch += {'arm': arm_softmmu_ss} 64