1 /* 2 * ARM implementation of KVM hooks 3 * 4 * Copyright Christoffer Dall 2009-2010 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 * 9 */ 10 11 #include "qemu/osdep.h" 12 #include <sys/ioctl.h> 13 14 #include <linux/kvm.h> 15 16 #include "qemu-common.h" 17 #include "qemu/timer.h" 18 #include "qemu/error-report.h" 19 #include "sysemu/sysemu.h" 20 #include "sysemu/kvm.h" 21 #include "kvm_arm.h" 22 #include "cpu.h" 23 #include "trace.h" 24 #include "internals.h" 25 #include "hw/arm/arm.h" 26 #include "hw/pci/pci.h" 27 #include "exec/memattrs.h" 28 #include "exec/address-spaces.h" 29 #include "hw/boards.h" 30 #include "qemu/log.h" 31 32 const KVMCapabilityInfo kvm_arch_required_capabilities[] = { 33 KVM_CAP_LAST_INFO 34 }; 35 36 static bool cap_has_mp_state; 37 38 static ARMHostCPUFeatures arm_host_cpu_features; 39 40 int kvm_arm_vcpu_init(CPUState *cs) 41 { 42 ARMCPU *cpu = ARM_CPU(cs); 43 struct kvm_vcpu_init init; 44 45 init.target = cpu->kvm_target; 46 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features)); 47 48 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); 49 } 50 51 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, 52 int *fdarray, 53 struct kvm_vcpu_init *init) 54 { 55 int ret, kvmfd = -1, vmfd = -1, cpufd = -1; 56 57 kvmfd = qemu_open("/dev/kvm", O_RDWR); 58 if (kvmfd < 0) { 59 goto err; 60 } 61 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0); 62 if (vmfd < 0) { 63 goto err; 64 } 65 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0); 66 if (cpufd < 0) { 67 goto err; 68 } 69 70 if (!init) { 71 /* Caller doesn't want the VCPU to be initialized, so skip it */ 72 goto finish; 73 } 74 75 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init); 76 if (ret >= 0) { 77 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init); 78 if (ret < 0) { 79 goto err; 80 } 81 } else if (cpus_to_try) { 82 /* Old kernel which doesn't know about the 83 * PREFERRED_TARGET ioctl: we know it will only support 84 * creating one kind of guest CPU which is its preferred 85 * CPU type. 86 */ 87 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) { 88 init->target = *cpus_to_try++; 89 memset(init->features, 0, sizeof(init->features)); 90 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init); 91 if (ret >= 0) { 92 break; 93 } 94 } 95 if (ret < 0) { 96 goto err; 97 } 98 } else { 99 /* Treat a NULL cpus_to_try argument the same as an empty 100 * list, which means we will fail the call since this must 101 * be an old kernel which doesn't support PREFERRED_TARGET. 102 */ 103 goto err; 104 } 105 106 finish: 107 fdarray[0] = kvmfd; 108 fdarray[1] = vmfd; 109 fdarray[2] = cpufd; 110 111 return true; 112 113 err: 114 if (cpufd >= 0) { 115 close(cpufd); 116 } 117 if (vmfd >= 0) { 118 close(vmfd); 119 } 120 if (kvmfd >= 0) { 121 close(kvmfd); 122 } 123 124 return false; 125 } 126 127 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray) 128 { 129 int i; 130 131 for (i = 2; i >= 0; i--) { 132 close(fdarray[i]); 133 } 134 } 135 136 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) 137 { 138 CPUARMState *env = &cpu->env; 139 140 if (!arm_host_cpu_features.dtb_compatible) { 141 if (!kvm_enabled() || 142 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) { 143 /* We can't report this error yet, so flag that we need to 144 * in arm_cpu_realizefn(). 145 */ 146 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; 147 cpu->host_cpu_probe_failed = true; 148 return; 149 } 150 } 151 152 cpu->kvm_target = arm_host_cpu_features.target; 153 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible; 154 env->features = arm_host_cpu_features.features; 155 } 156 157 int kvm_arch_init(MachineState *ms, KVMState *s) 158 { 159 /* For ARM interrupt delivery is always asynchronous, 160 * whether we are using an in-kernel VGIC or not. 161 */ 162 kvm_async_interrupts_allowed = true; 163 164 /* 165 * PSCI wakes up secondary cores, so we always need to 166 * have vCPUs waiting in kernel space 167 */ 168 kvm_halt_in_kernel_allowed = true; 169 170 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE); 171 172 return 0; 173 } 174 175 unsigned long kvm_arch_vcpu_id(CPUState *cpu) 176 { 177 return cpu->cpu_index; 178 } 179 180 /* We track all the KVM devices which need their memory addresses 181 * passing to the kernel in a list of these structures. 182 * When board init is complete we run through the list and 183 * tell the kernel the base addresses of the memory regions. 184 * We use a MemoryListener to track mapping and unmapping of 185 * the regions during board creation, so the board models don't 186 * need to do anything special for the KVM case. 187 */ 188 typedef struct KVMDevice { 189 struct kvm_arm_device_addr kda; 190 struct kvm_device_attr kdattr; 191 MemoryRegion *mr; 192 QSLIST_ENTRY(KVMDevice) entries; 193 int dev_fd; 194 } KVMDevice; 195 196 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head; 197 198 static void kvm_arm_devlistener_add(MemoryListener *listener, 199 MemoryRegionSection *section) 200 { 201 KVMDevice *kd; 202 203 QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 204 if (section->mr == kd->mr) { 205 kd->kda.addr = section->offset_within_address_space; 206 } 207 } 208 } 209 210 static void kvm_arm_devlistener_del(MemoryListener *listener, 211 MemoryRegionSection *section) 212 { 213 KVMDevice *kd; 214 215 QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 216 if (section->mr == kd->mr) { 217 kd->kda.addr = -1; 218 } 219 } 220 } 221 222 static MemoryListener devlistener = { 223 .region_add = kvm_arm_devlistener_add, 224 .region_del = kvm_arm_devlistener_del, 225 }; 226 227 static void kvm_arm_set_device_addr(KVMDevice *kd) 228 { 229 struct kvm_device_attr *attr = &kd->kdattr; 230 int ret; 231 232 /* If the device control API is available and we have a device fd on the 233 * KVMDevice struct, let's use the newer API 234 */ 235 if (kd->dev_fd >= 0) { 236 uint64_t addr = kd->kda.addr; 237 attr->addr = (uintptr_t)&addr; 238 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr); 239 } else { 240 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda); 241 } 242 243 if (ret < 0) { 244 fprintf(stderr, "Failed to set device address: %s\n", 245 strerror(-ret)); 246 abort(); 247 } 248 } 249 250 static void kvm_arm_machine_init_done(Notifier *notifier, void *data) 251 { 252 KVMDevice *kd, *tkd; 253 254 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) { 255 if (kd->kda.addr != -1) { 256 kvm_arm_set_device_addr(kd); 257 } 258 memory_region_unref(kd->mr); 259 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries); 260 g_free(kd); 261 } 262 memory_listener_unregister(&devlistener); 263 } 264 265 static Notifier notify = { 266 .notify = kvm_arm_machine_init_done, 267 }; 268 269 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group, 270 uint64_t attr, int dev_fd) 271 { 272 KVMDevice *kd; 273 274 if (!kvm_irqchip_in_kernel()) { 275 return; 276 } 277 278 if (QSLIST_EMPTY(&kvm_devices_head)) { 279 memory_listener_register(&devlistener, &address_space_memory); 280 qemu_add_machine_init_done_notifier(¬ify); 281 } 282 kd = g_new0(KVMDevice, 1); 283 kd->mr = mr; 284 kd->kda.id = devid; 285 kd->kda.addr = -1; 286 kd->kdattr.flags = 0; 287 kd->kdattr.group = group; 288 kd->kdattr.attr = attr; 289 kd->dev_fd = dev_fd; 290 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries); 291 memory_region_ref(kd->mr); 292 } 293 294 static int compare_u64(const void *a, const void *b) 295 { 296 if (*(uint64_t *)a > *(uint64_t *)b) { 297 return 1; 298 } 299 if (*(uint64_t *)a < *(uint64_t *)b) { 300 return -1; 301 } 302 return 0; 303 } 304 305 /* Initialize the CPUState's cpreg list according to the kernel's 306 * definition of what CPU registers it knows about (and throw away 307 * the previous TCG-created cpreg list). 308 */ 309 int kvm_arm_init_cpreg_list(ARMCPU *cpu) 310 { 311 struct kvm_reg_list rl; 312 struct kvm_reg_list *rlp; 313 int i, ret, arraylen; 314 CPUState *cs = CPU(cpu); 315 316 rl.n = 0; 317 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl); 318 if (ret != -E2BIG) { 319 return ret; 320 } 321 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t)); 322 rlp->n = rl.n; 323 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp); 324 if (ret) { 325 goto out; 326 } 327 /* Sort the list we get back from the kernel, since cpreg_tuples 328 * must be in strictly ascending order. 329 */ 330 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64); 331 332 for (i = 0, arraylen = 0; i < rlp->n; i++) { 333 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) { 334 continue; 335 } 336 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) { 337 case KVM_REG_SIZE_U32: 338 case KVM_REG_SIZE_U64: 339 break; 340 default: 341 fprintf(stderr, "Can't handle size of register in kernel list\n"); 342 ret = -EINVAL; 343 goto out; 344 } 345 346 arraylen++; 347 } 348 349 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen); 350 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen); 351 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes, 352 arraylen); 353 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values, 354 arraylen); 355 cpu->cpreg_array_len = arraylen; 356 cpu->cpreg_vmstate_array_len = arraylen; 357 358 for (i = 0, arraylen = 0; i < rlp->n; i++) { 359 uint64_t regidx = rlp->reg[i]; 360 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) { 361 continue; 362 } 363 cpu->cpreg_indexes[arraylen] = regidx; 364 arraylen++; 365 } 366 assert(cpu->cpreg_array_len == arraylen); 367 368 if (!write_kvmstate_to_list(cpu)) { 369 /* Shouldn't happen unless kernel is inconsistent about 370 * what registers exist. 371 */ 372 fprintf(stderr, "Initial read of kernel register state failed\n"); 373 ret = -EINVAL; 374 goto out; 375 } 376 377 out: 378 g_free(rlp); 379 return ret; 380 } 381 382 bool write_kvmstate_to_list(ARMCPU *cpu) 383 { 384 CPUState *cs = CPU(cpu); 385 int i; 386 bool ok = true; 387 388 for (i = 0; i < cpu->cpreg_array_len; i++) { 389 struct kvm_one_reg r; 390 uint64_t regidx = cpu->cpreg_indexes[i]; 391 uint32_t v32; 392 int ret; 393 394 r.id = regidx; 395 396 switch (regidx & KVM_REG_SIZE_MASK) { 397 case KVM_REG_SIZE_U32: 398 r.addr = (uintptr_t)&v32; 399 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 400 if (!ret) { 401 cpu->cpreg_values[i] = v32; 402 } 403 break; 404 case KVM_REG_SIZE_U64: 405 r.addr = (uintptr_t)(cpu->cpreg_values + i); 406 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 407 break; 408 default: 409 abort(); 410 } 411 if (ret) { 412 ok = false; 413 } 414 } 415 return ok; 416 } 417 418 bool write_list_to_kvmstate(ARMCPU *cpu, int level) 419 { 420 CPUState *cs = CPU(cpu); 421 int i; 422 bool ok = true; 423 424 for (i = 0; i < cpu->cpreg_array_len; i++) { 425 struct kvm_one_reg r; 426 uint64_t regidx = cpu->cpreg_indexes[i]; 427 uint32_t v32; 428 int ret; 429 430 if (kvm_arm_cpreg_level(regidx) > level) { 431 continue; 432 } 433 434 r.id = regidx; 435 switch (regidx & KVM_REG_SIZE_MASK) { 436 case KVM_REG_SIZE_U32: 437 v32 = cpu->cpreg_values[i]; 438 r.addr = (uintptr_t)&v32; 439 break; 440 case KVM_REG_SIZE_U64: 441 r.addr = (uintptr_t)(cpu->cpreg_values + i); 442 break; 443 default: 444 abort(); 445 } 446 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r); 447 if (ret) { 448 /* We might fail for "unknown register" and also for 449 * "you tried to set a register which is constant with 450 * a different value from what it actually contains". 451 */ 452 ok = false; 453 } 454 } 455 return ok; 456 } 457 458 void kvm_arm_reset_vcpu(ARMCPU *cpu) 459 { 460 int ret; 461 462 /* Re-init VCPU so that all registers are set to 463 * their respective reset values. 464 */ 465 ret = kvm_arm_vcpu_init(CPU(cpu)); 466 if (ret < 0) { 467 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret)); 468 abort(); 469 } 470 if (!write_kvmstate_to_list(cpu)) { 471 fprintf(stderr, "write_kvmstate_to_list failed\n"); 472 abort(); 473 } 474 } 475 476 /* 477 * Update KVM's MP_STATE based on what QEMU thinks it is 478 */ 479 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu) 480 { 481 if (cap_has_mp_state) { 482 struct kvm_mp_state mp_state = { 483 .mp_state = (cpu->power_state == PSCI_OFF) ? 484 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE 485 }; 486 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); 487 if (ret) { 488 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n", 489 __func__, ret, strerror(-ret)); 490 return -1; 491 } 492 } 493 494 return 0; 495 } 496 497 /* 498 * Sync the KVM MP_STATE into QEMU 499 */ 500 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu) 501 { 502 if (cap_has_mp_state) { 503 struct kvm_mp_state mp_state; 504 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state); 505 if (ret) { 506 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n", 507 __func__, ret, strerror(-ret)); 508 abort(); 509 } 510 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ? 511 PSCI_OFF : PSCI_ON; 512 } 513 514 return 0; 515 } 516 517 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) 518 { 519 } 520 521 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) 522 { 523 ARMCPU *cpu; 524 uint32_t switched_level; 525 526 if (kvm_irqchip_in_kernel()) { 527 /* 528 * We only need to sync timer states with user-space interrupt 529 * controllers, so return early and save cycles if we don't. 530 */ 531 return MEMTXATTRS_UNSPECIFIED; 532 } 533 534 cpu = ARM_CPU(cs); 535 536 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */ 537 if (run->s.regs.device_irq_level != cpu->device_irq_level) { 538 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level; 539 540 qemu_mutex_lock_iothread(); 541 542 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) { 543 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT], 544 !!(run->s.regs.device_irq_level & 545 KVM_ARM_DEV_EL1_VTIMER)); 546 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER; 547 } 548 549 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) { 550 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS], 551 !!(run->s.regs.device_irq_level & 552 KVM_ARM_DEV_EL1_PTIMER)); 553 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER; 554 } 555 556 if (switched_level & KVM_ARM_DEV_PMU) { 557 qemu_set_irq(cpu->pmu_interrupt, 558 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU)); 559 switched_level &= ~KVM_ARM_DEV_PMU; 560 } 561 562 if (switched_level) { 563 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", 564 __func__, switched_level); 565 } 566 567 /* We also mark unknown levels as processed to not waste cycles */ 568 cpu->device_irq_level = run->s.regs.device_irq_level; 569 qemu_mutex_unlock_iothread(); 570 } 571 572 return MEMTXATTRS_UNSPECIFIED; 573 } 574 575 576 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) 577 { 578 int ret = 0; 579 580 switch (run->exit_reason) { 581 case KVM_EXIT_DEBUG: 582 if (kvm_arm_handle_debug(cs, &run->debug.arch)) { 583 ret = EXCP_DEBUG; 584 } /* otherwise return to guest */ 585 break; 586 default: 587 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", 588 __func__, run->exit_reason); 589 break; 590 } 591 return ret; 592 } 593 594 bool kvm_arch_stop_on_emulation_error(CPUState *cs) 595 { 596 return true; 597 } 598 599 int kvm_arch_process_async_events(CPUState *cs) 600 { 601 return 0; 602 } 603 604 /* The #ifdef protections are until 32bit headers are imported and can 605 * be removed once both 32 and 64 bit reach feature parity. 606 */ 607 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) 608 { 609 #ifdef KVM_GUESTDBG_USE_SW_BP 610 if (kvm_sw_breakpoints_active(cs)) { 611 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; 612 } 613 #endif 614 #ifdef KVM_GUESTDBG_USE_HW 615 if (kvm_arm_hw_debug_active(cs)) { 616 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW; 617 kvm_arm_copy_hw_debug_data(&dbg->arch); 618 } 619 #endif 620 } 621 622 void kvm_arch_init_irq_routing(KVMState *s) 623 { 624 } 625 626 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s) 627 { 628 if (machine_kernel_irqchip_split(ms)) { 629 perror("-machine kernel_irqchip=split is not supported on ARM."); 630 exit(1); 631 } 632 633 /* If we can create the VGIC using the newer device control API, we 634 * let the device do this when it initializes itself, otherwise we 635 * fall back to the old API */ 636 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL); 637 } 638 639 int kvm_arm_vgic_probe(void) 640 { 641 if (kvm_create_device(kvm_state, 642 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) { 643 return 3; 644 } else if (kvm_create_device(kvm_state, 645 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) { 646 return 2; 647 } else { 648 return 0; 649 } 650 } 651 652 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, 653 uint64_t address, uint32_t data, PCIDevice *dev) 654 { 655 AddressSpace *as = pci_device_iommu_address_space(dev); 656 hwaddr xlat, len, doorbell_gpa; 657 MemoryRegionSection mrs; 658 MemoryRegion *mr; 659 int ret = 1; 660 661 if (as == &address_space_memory) { 662 return 0; 663 } 664 665 /* MSI doorbell address is translated by an IOMMU */ 666 667 rcu_read_lock(); 668 mr = address_space_translate(as, address, &xlat, &len, true, 669 MEMTXATTRS_UNSPECIFIED); 670 if (!mr) { 671 goto unlock; 672 } 673 mrs = memory_region_find(mr, xlat, 1); 674 if (!mrs.mr) { 675 goto unlock; 676 } 677 678 doorbell_gpa = mrs.offset_within_address_space; 679 memory_region_unref(mrs.mr); 680 681 route->u.msi.address_lo = doorbell_gpa; 682 route->u.msi.address_hi = doorbell_gpa >> 32; 683 684 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa); 685 686 ret = 0; 687 688 unlock: 689 rcu_read_unlock(); 690 return ret; 691 } 692 693 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, 694 int vector, PCIDevice *dev) 695 { 696 return 0; 697 } 698 699 int kvm_arch_release_virq_post(int virq) 700 { 701 return 0; 702 } 703 704 int kvm_arch_msi_data_to_gsi(uint32_t data) 705 { 706 return (data - 32) & 0xffff; 707 } 708