xref: /openbmc/qemu/target/arm/kvm.c (revision 3ae8a100)
1 /*
2  * ARM implementation of KVM hooks
3  *
4  * Copyright Christoffer Dall 2009-2010
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
7  * See the COPYING file in the top-level directory.
8  *
9  */
10 
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
13 
14 #include <linux/kvm.h>
15 
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "sysemu/sysemu.h"
20 #include "sysemu/kvm.h"
21 #include "kvm_arm.h"
22 #include "cpu.h"
23 #include "trace.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
26 #include "hw/pci/pci.h"
27 #include "exec/memattrs.h"
28 #include "exec/address-spaces.h"
29 #include "hw/boards.h"
30 #include "qemu/log.h"
31 
32 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
33     KVM_CAP_LAST_INFO
34 };
35 
36 static bool cap_has_mp_state;
37 
38 static ARMHostCPUFeatures arm_host_cpu_features;
39 
40 int kvm_arm_vcpu_init(CPUState *cs)
41 {
42     ARMCPU *cpu = ARM_CPU(cs);
43     struct kvm_vcpu_init init;
44 
45     init.target = cpu->kvm_target;
46     memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
47 
48     return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
49 }
50 
51 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
52                                       int *fdarray,
53                                       struct kvm_vcpu_init *init)
54 {
55     int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
56 
57     kvmfd = qemu_open("/dev/kvm", O_RDWR);
58     if (kvmfd < 0) {
59         goto err;
60     }
61     vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
62     if (vmfd < 0) {
63         goto err;
64     }
65     cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
66     if (cpufd < 0) {
67         goto err;
68     }
69 
70     if (!init) {
71         /* Caller doesn't want the VCPU to be initialized, so skip it */
72         goto finish;
73     }
74 
75     ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
76     if (ret >= 0) {
77         ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
78         if (ret < 0) {
79             goto err;
80         }
81     } else if (cpus_to_try) {
82         /* Old kernel which doesn't know about the
83          * PREFERRED_TARGET ioctl: we know it will only support
84          * creating one kind of guest CPU which is its preferred
85          * CPU type.
86          */
87         while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
88             init->target = *cpus_to_try++;
89             memset(init->features, 0, sizeof(init->features));
90             ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
91             if (ret >= 0) {
92                 break;
93             }
94         }
95         if (ret < 0) {
96             goto err;
97         }
98     } else {
99         /* Treat a NULL cpus_to_try argument the same as an empty
100          * list, which means we will fail the call since this must
101          * be an old kernel which doesn't support PREFERRED_TARGET.
102          */
103         goto err;
104     }
105 
106 finish:
107     fdarray[0] = kvmfd;
108     fdarray[1] = vmfd;
109     fdarray[2] = cpufd;
110 
111     return true;
112 
113 err:
114     if (cpufd >= 0) {
115         close(cpufd);
116     }
117     if (vmfd >= 0) {
118         close(vmfd);
119     }
120     if (kvmfd >= 0) {
121         close(kvmfd);
122     }
123 
124     return false;
125 }
126 
127 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
128 {
129     int i;
130 
131     for (i = 2; i >= 0; i--) {
132         close(fdarray[i]);
133     }
134 }
135 
136 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
137 {
138     CPUARMState *env = &cpu->env;
139 
140     if (!arm_host_cpu_features.dtb_compatible) {
141         if (!kvm_enabled() ||
142             !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
143             /* We can't report this error yet, so flag that we need to
144              * in arm_cpu_realizefn().
145              */
146             cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
147             cpu->host_cpu_probe_failed = true;
148             return;
149         }
150     }
151 
152     cpu->kvm_target = arm_host_cpu_features.target;
153     cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
154     env->features = arm_host_cpu_features.features;
155 }
156 
157 int kvm_arch_init(MachineState *ms, KVMState *s)
158 {
159     /* For ARM interrupt delivery is always asynchronous,
160      * whether we are using an in-kernel VGIC or not.
161      */
162     kvm_async_interrupts_allowed = true;
163 
164     /*
165      * PSCI wakes up secondary cores, so we always need to
166      * have vCPUs waiting in kernel space
167      */
168     kvm_halt_in_kernel_allowed = true;
169 
170     cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
171 
172     return 0;
173 }
174 
175 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
176 {
177     return cpu->cpu_index;
178 }
179 
180 /* We track all the KVM devices which need their memory addresses
181  * passing to the kernel in a list of these structures.
182  * When board init is complete we run through the list and
183  * tell the kernel the base addresses of the memory regions.
184  * We use a MemoryListener to track mapping and unmapping of
185  * the regions during board creation, so the board models don't
186  * need to do anything special for the KVM case.
187  */
188 typedef struct KVMDevice {
189     struct kvm_arm_device_addr kda;
190     struct kvm_device_attr kdattr;
191     MemoryRegion *mr;
192     QSLIST_ENTRY(KVMDevice) entries;
193     int dev_fd;
194 } KVMDevice;
195 
196 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
197 
198 static void kvm_arm_devlistener_add(MemoryListener *listener,
199                                     MemoryRegionSection *section)
200 {
201     KVMDevice *kd;
202 
203     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
204         if (section->mr == kd->mr) {
205             kd->kda.addr = section->offset_within_address_space;
206         }
207     }
208 }
209 
210 static void kvm_arm_devlistener_del(MemoryListener *listener,
211                                     MemoryRegionSection *section)
212 {
213     KVMDevice *kd;
214 
215     QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
216         if (section->mr == kd->mr) {
217             kd->kda.addr = -1;
218         }
219     }
220 }
221 
222 static MemoryListener devlistener = {
223     .region_add = kvm_arm_devlistener_add,
224     .region_del = kvm_arm_devlistener_del,
225 };
226 
227 static void kvm_arm_set_device_addr(KVMDevice *kd)
228 {
229     struct kvm_device_attr *attr = &kd->kdattr;
230     int ret;
231 
232     /* If the device control API is available and we have a device fd on the
233      * KVMDevice struct, let's use the newer API
234      */
235     if (kd->dev_fd >= 0) {
236         uint64_t addr = kd->kda.addr;
237         attr->addr = (uintptr_t)&addr;
238         ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
239     } else {
240         ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
241     }
242 
243     if (ret < 0) {
244         fprintf(stderr, "Failed to set device address: %s\n",
245                 strerror(-ret));
246         abort();
247     }
248 }
249 
250 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
251 {
252     KVMDevice *kd, *tkd;
253 
254     QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
255         if (kd->kda.addr != -1) {
256             kvm_arm_set_device_addr(kd);
257         }
258         memory_region_unref(kd->mr);
259         g_free(kd);
260     }
261     memory_listener_unregister(&devlistener);
262 }
263 
264 static Notifier notify = {
265     .notify = kvm_arm_machine_init_done,
266 };
267 
268 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
269                              uint64_t attr, int dev_fd)
270 {
271     KVMDevice *kd;
272 
273     if (!kvm_irqchip_in_kernel()) {
274         return;
275     }
276 
277     if (QSLIST_EMPTY(&kvm_devices_head)) {
278         memory_listener_register(&devlistener, &address_space_memory);
279         qemu_add_machine_init_done_notifier(&notify);
280     }
281     kd = g_new0(KVMDevice, 1);
282     kd->mr = mr;
283     kd->kda.id = devid;
284     kd->kda.addr = -1;
285     kd->kdattr.flags = 0;
286     kd->kdattr.group = group;
287     kd->kdattr.attr = attr;
288     kd->dev_fd = dev_fd;
289     QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
290     memory_region_ref(kd->mr);
291 }
292 
293 static int compare_u64(const void *a, const void *b)
294 {
295     if (*(uint64_t *)a > *(uint64_t *)b) {
296         return 1;
297     }
298     if (*(uint64_t *)a < *(uint64_t *)b) {
299         return -1;
300     }
301     return 0;
302 }
303 
304 /* Initialize the CPUState's cpreg list according to the kernel's
305  * definition of what CPU registers it knows about (and throw away
306  * the previous TCG-created cpreg list).
307  */
308 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
309 {
310     struct kvm_reg_list rl;
311     struct kvm_reg_list *rlp;
312     int i, ret, arraylen;
313     CPUState *cs = CPU(cpu);
314 
315     rl.n = 0;
316     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
317     if (ret != -E2BIG) {
318         return ret;
319     }
320     rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
321     rlp->n = rl.n;
322     ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
323     if (ret) {
324         goto out;
325     }
326     /* Sort the list we get back from the kernel, since cpreg_tuples
327      * must be in strictly ascending order.
328      */
329     qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
330 
331     for (i = 0, arraylen = 0; i < rlp->n; i++) {
332         if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
333             continue;
334         }
335         switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
336         case KVM_REG_SIZE_U32:
337         case KVM_REG_SIZE_U64:
338             break;
339         default:
340             fprintf(stderr, "Can't handle size of register in kernel list\n");
341             ret = -EINVAL;
342             goto out;
343         }
344 
345         arraylen++;
346     }
347 
348     cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
349     cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
350     cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
351                                          arraylen);
352     cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
353                                         arraylen);
354     cpu->cpreg_array_len = arraylen;
355     cpu->cpreg_vmstate_array_len = arraylen;
356 
357     for (i = 0, arraylen = 0; i < rlp->n; i++) {
358         uint64_t regidx = rlp->reg[i];
359         if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
360             continue;
361         }
362         cpu->cpreg_indexes[arraylen] = regidx;
363         arraylen++;
364     }
365     assert(cpu->cpreg_array_len == arraylen);
366 
367     if (!write_kvmstate_to_list(cpu)) {
368         /* Shouldn't happen unless kernel is inconsistent about
369          * what registers exist.
370          */
371         fprintf(stderr, "Initial read of kernel register state failed\n");
372         ret = -EINVAL;
373         goto out;
374     }
375 
376 out:
377     g_free(rlp);
378     return ret;
379 }
380 
381 bool write_kvmstate_to_list(ARMCPU *cpu)
382 {
383     CPUState *cs = CPU(cpu);
384     int i;
385     bool ok = true;
386 
387     for (i = 0; i < cpu->cpreg_array_len; i++) {
388         struct kvm_one_reg r;
389         uint64_t regidx = cpu->cpreg_indexes[i];
390         uint32_t v32;
391         int ret;
392 
393         r.id = regidx;
394 
395         switch (regidx & KVM_REG_SIZE_MASK) {
396         case KVM_REG_SIZE_U32:
397             r.addr = (uintptr_t)&v32;
398             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
399             if (!ret) {
400                 cpu->cpreg_values[i] = v32;
401             }
402             break;
403         case KVM_REG_SIZE_U64:
404             r.addr = (uintptr_t)(cpu->cpreg_values + i);
405             ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
406             break;
407         default:
408             abort();
409         }
410         if (ret) {
411             ok = false;
412         }
413     }
414     return ok;
415 }
416 
417 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
418 {
419     CPUState *cs = CPU(cpu);
420     int i;
421     bool ok = true;
422 
423     for (i = 0; i < cpu->cpreg_array_len; i++) {
424         struct kvm_one_reg r;
425         uint64_t regidx = cpu->cpreg_indexes[i];
426         uint32_t v32;
427         int ret;
428 
429         if (kvm_arm_cpreg_level(regidx) > level) {
430             continue;
431         }
432 
433         r.id = regidx;
434         switch (regidx & KVM_REG_SIZE_MASK) {
435         case KVM_REG_SIZE_U32:
436             v32 = cpu->cpreg_values[i];
437             r.addr = (uintptr_t)&v32;
438             break;
439         case KVM_REG_SIZE_U64:
440             r.addr = (uintptr_t)(cpu->cpreg_values + i);
441             break;
442         default:
443             abort();
444         }
445         ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
446         if (ret) {
447             /* We might fail for "unknown register" and also for
448              * "you tried to set a register which is constant with
449              * a different value from what it actually contains".
450              */
451             ok = false;
452         }
453     }
454     return ok;
455 }
456 
457 void kvm_arm_reset_vcpu(ARMCPU *cpu)
458 {
459     int ret;
460 
461     /* Re-init VCPU so that all registers are set to
462      * their respective reset values.
463      */
464     ret = kvm_arm_vcpu_init(CPU(cpu));
465     if (ret < 0) {
466         fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
467         abort();
468     }
469     if (!write_kvmstate_to_list(cpu)) {
470         fprintf(stderr, "write_kvmstate_to_list failed\n");
471         abort();
472     }
473 }
474 
475 /*
476  * Update KVM's MP_STATE based on what QEMU thinks it is
477  */
478 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
479 {
480     if (cap_has_mp_state) {
481         struct kvm_mp_state mp_state = {
482             .mp_state = (cpu->power_state == PSCI_OFF) ?
483             KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
484         };
485         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
486         if (ret) {
487             fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
488                     __func__, ret, strerror(-ret));
489             return -1;
490         }
491     }
492 
493     return 0;
494 }
495 
496 /*
497  * Sync the KVM MP_STATE into QEMU
498  */
499 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
500 {
501     if (cap_has_mp_state) {
502         struct kvm_mp_state mp_state;
503         int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
504         if (ret) {
505             fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
506                     __func__, ret, strerror(-ret));
507             abort();
508         }
509         cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
510             PSCI_OFF : PSCI_ON;
511     }
512 
513     return 0;
514 }
515 
516 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
517 {
518 }
519 
520 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
521 {
522     ARMCPU *cpu;
523     uint32_t switched_level;
524 
525     if (kvm_irqchip_in_kernel()) {
526         /*
527          * We only need to sync timer states with user-space interrupt
528          * controllers, so return early and save cycles if we don't.
529          */
530         return MEMTXATTRS_UNSPECIFIED;
531     }
532 
533     cpu = ARM_CPU(cs);
534 
535     /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
536     if (run->s.regs.device_irq_level != cpu->device_irq_level) {
537         switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
538 
539         qemu_mutex_lock_iothread();
540 
541         if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
542             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
543                          !!(run->s.regs.device_irq_level &
544                             KVM_ARM_DEV_EL1_VTIMER));
545             switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
546         }
547 
548         if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
549             qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
550                          !!(run->s.regs.device_irq_level &
551                             KVM_ARM_DEV_EL1_PTIMER));
552             switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
553         }
554 
555         if (switched_level & KVM_ARM_DEV_PMU) {
556             qemu_set_irq(cpu->pmu_interrupt,
557                          !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
558             switched_level &= ~KVM_ARM_DEV_PMU;
559         }
560 
561         if (switched_level) {
562             qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
563                           __func__, switched_level);
564         }
565 
566         /* We also mark unknown levels as processed to not waste cycles */
567         cpu->device_irq_level = run->s.regs.device_irq_level;
568         qemu_mutex_unlock_iothread();
569     }
570 
571     return MEMTXATTRS_UNSPECIFIED;
572 }
573 
574 
575 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
576 {
577     int ret = 0;
578 
579     switch (run->exit_reason) {
580     case KVM_EXIT_DEBUG:
581         if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
582             ret = EXCP_DEBUG;
583         } /* otherwise return to guest */
584         break;
585     default:
586         qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
587                       __func__, run->exit_reason);
588         break;
589     }
590     return ret;
591 }
592 
593 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
594 {
595     return true;
596 }
597 
598 int kvm_arch_process_async_events(CPUState *cs)
599 {
600     return 0;
601 }
602 
603 /* The #ifdef protections are until 32bit headers are imported and can
604  * be removed once both 32 and 64 bit reach feature parity.
605  */
606 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
607 {
608 #ifdef KVM_GUESTDBG_USE_SW_BP
609     if (kvm_sw_breakpoints_active(cs)) {
610         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
611     }
612 #endif
613 #ifdef KVM_GUESTDBG_USE_HW
614     if (kvm_arm_hw_debug_active(cs)) {
615         dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
616         kvm_arm_copy_hw_debug_data(&dbg->arch);
617     }
618 #endif
619 }
620 
621 void kvm_arch_init_irq_routing(KVMState *s)
622 {
623 }
624 
625 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s)
626 {
627      if (machine_kernel_irqchip_split(ms)) {
628          perror("-machine kernel_irqchip=split is not supported on ARM.");
629          exit(1);
630     }
631 
632     /* If we can create the VGIC using the newer device control API, we
633      * let the device do this when it initializes itself, otherwise we
634      * fall back to the old API */
635     return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
636 }
637 
638 int kvm_arm_vgic_probe(void)
639 {
640     if (kvm_create_device(kvm_state,
641                           KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
642         return 3;
643     } else if (kvm_create_device(kvm_state,
644                                  KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
645         return 2;
646     } else {
647         return 0;
648     }
649 }
650 
651 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
652                              uint64_t address, uint32_t data, PCIDevice *dev)
653 {
654     AddressSpace *as = pci_device_iommu_address_space(dev);
655     hwaddr xlat, len, doorbell_gpa;
656     MemoryRegionSection mrs;
657     MemoryRegion *mr;
658     int ret = 1;
659 
660     if (as == &address_space_memory) {
661         return 0;
662     }
663 
664     /* MSI doorbell address is translated by an IOMMU */
665 
666     rcu_read_lock();
667     mr = address_space_translate(as, address, &xlat, &len, true,
668                                  MEMTXATTRS_UNSPECIFIED);
669     if (!mr) {
670         goto unlock;
671     }
672     mrs = memory_region_find(mr, xlat, 1);
673     if (!mrs.mr) {
674         goto unlock;
675     }
676 
677     doorbell_gpa = mrs.offset_within_address_space;
678     memory_region_unref(mrs.mr);
679 
680     route->u.msi.address_lo = doorbell_gpa;
681     route->u.msi.address_hi = doorbell_gpa >> 32;
682 
683     trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
684 
685     ret = 0;
686 
687 unlock:
688     rcu_read_unlock();
689     return ret;
690 }
691 
692 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
693                                 int vector, PCIDevice *dev)
694 {
695     return 0;
696 }
697 
698 int kvm_arch_release_virq_post(int virq)
699 {
700     return 0;
701 }
702 
703 int kvm_arch_msi_data_to_gsi(uint32_t data)
704 {
705     return (data - 32) & 0xffff;
706 }
707