1 /* 2 * QEMU Alpha CPU 3 * 4 * Copyright (c) 2007 Jocelyn Mayer 5 * Copyright (c) 2012 SUSE LINUX Products GmbH 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, see 19 * <http://www.gnu.org/licenses/lgpl-2.1.html> 20 */ 21 22 #include "qemu/osdep.h" 23 #include "qapi/error.h" 24 #include "qemu/qemu-print.h" 25 #include "cpu.h" 26 #include "exec/exec-all.h" 27 #include "fpu/softfloat.h" 28 29 30 static void alpha_cpu_set_pc(CPUState *cs, vaddr value) 31 { 32 CPUAlphaState *env = cpu_env(cs); 33 env->pc = value; 34 } 35 36 static vaddr alpha_cpu_get_pc(CPUState *cs) 37 { 38 CPUAlphaState *env = cpu_env(cs); 39 return env->pc; 40 } 41 42 static void alpha_cpu_synchronize_from_tb(CPUState *cs, 43 const TranslationBlock *tb) 44 { 45 /* The program counter is always up to date with CF_PCREL. */ 46 if (!(tb_cflags(tb) & CF_PCREL)) { 47 CPUAlphaState *env = cpu_env(cs); 48 env->pc = tb->pc; 49 } 50 } 51 52 static void alpha_restore_state_to_opc(CPUState *cs, 53 const TranslationBlock *tb, 54 const uint64_t *data) 55 { 56 CPUAlphaState *env = cpu_env(cs); 57 58 if (tb_cflags(tb) & CF_PCREL) { 59 env->pc = (env->pc & TARGET_PAGE_MASK) | data[0]; 60 } else { 61 env->pc = data[0]; 62 } 63 } 64 65 static bool alpha_cpu_has_work(CPUState *cs) 66 { 67 /* Here we are checking to see if the CPU should wake up from HALT. 68 We will have gotten into this state only for WTINT from PALmode. */ 69 /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU 70 asleep even if (some) interrupts have been asserted. For now, 71 assume that if a CPU really wants to stay asleep, it will mask 72 interrupts at the chipset level, which will prevent these bits 73 from being set in the first place. */ 74 return cs->interrupt_request & (CPU_INTERRUPT_HARD 75 | CPU_INTERRUPT_TIMER 76 | CPU_INTERRUPT_SMP 77 | CPU_INTERRUPT_MCHK); 78 } 79 80 static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch) 81 { 82 return alpha_env_mmu_index(cpu_env(cs)); 83 } 84 85 static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) 86 { 87 info->mach = bfd_mach_alpha_ev6; 88 info->print_insn = print_insn_alpha; 89 } 90 91 static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) 92 { 93 CPUState *cs = CPU(dev); 94 AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev); 95 Error *local_err = NULL; 96 97 #ifndef CONFIG_USER_ONLY 98 /* Use pc-relative instructions in system-mode */ 99 cs->tcg_cflags |= CF_PCREL; 100 #endif 101 102 cpu_exec_realizefn(cs, &local_err); 103 if (local_err != NULL) { 104 error_propagate(errp, local_err); 105 return; 106 } 107 108 qemu_init_vcpu(cs); 109 110 acc->parent_realize(dev, errp); 111 } 112 113 /* Models */ 114 typedef struct AlphaCPUAlias { 115 const char *alias; 116 const char *typename; 117 } AlphaCPUAlias; 118 119 static const AlphaCPUAlias alpha_cpu_aliases[] = { 120 { "21064", ALPHA_CPU_TYPE_NAME("ev4") }, 121 { "21164", ALPHA_CPU_TYPE_NAME("ev5") }, 122 { "21164a", ALPHA_CPU_TYPE_NAME("ev56") }, 123 { "21164pc", ALPHA_CPU_TYPE_NAME("pca56") }, 124 { "21264", ALPHA_CPU_TYPE_NAME("ev6") }, 125 { "21264a", ALPHA_CPU_TYPE_NAME("ev67") }, 126 }; 127 128 static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model) 129 { 130 ObjectClass *oc; 131 char *typename; 132 int i; 133 134 oc = object_class_by_name(cpu_model); 135 if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL) { 136 return oc; 137 } 138 139 for (i = 0; i < ARRAY_SIZE(alpha_cpu_aliases); i++) { 140 if (strcmp(cpu_model, alpha_cpu_aliases[i].alias) == 0) { 141 oc = object_class_by_name(alpha_cpu_aliases[i].typename); 142 assert(oc != NULL && !object_class_is_abstract(oc)); 143 return oc; 144 } 145 } 146 147 typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model); 148 oc = object_class_by_name(typename); 149 g_free(typename); 150 151 return oc; 152 } 153 154 static void ev4_cpu_initfn(Object *obj) 155 { 156 cpu_env(CPU(obj))->implver = IMPLVER_2106x; 157 } 158 159 static void ev5_cpu_initfn(Object *obj) 160 { 161 cpu_env(CPU(obj))->implver = IMPLVER_21164; 162 } 163 164 static void ev56_cpu_initfn(Object *obj) 165 { 166 cpu_env(CPU(obj))->amask |= AMASK_BWX; 167 } 168 169 static void pca56_cpu_initfn(Object *obj) 170 { 171 cpu_env(CPU(obj))->amask |= AMASK_MVI; 172 } 173 174 static void ev6_cpu_initfn(Object *obj) 175 { 176 CPUAlphaState *env = cpu_env(CPU(obj)); 177 178 env->implver = IMPLVER_21264; 179 env->amask = AMASK_BWX | AMASK_FIX | AMASK_MVI | AMASK_TRAP; 180 } 181 182 static void ev67_cpu_initfn(Object *obj) 183 { 184 cpu_env(CPU(obj))->amask |= AMASK_CIX | AMASK_PREFETCH; 185 } 186 187 static void alpha_cpu_initfn(Object *obj) 188 { 189 CPUAlphaState *env = cpu_env(CPU(obj)); 190 191 /* TODO all this should be done in reset, not init */ 192 193 env->lock_addr = -1; 194 195 /* 196 * TODO: this is incorrect. The Alpha Architecture Handbook version 4 197 * describes NaN propagation in section 4.7.10.4. We should prefer 198 * the operand in Fb (whether it is a QNaN or an SNaN), then the 199 * operand in Fa. That is float_2nan_prop_ba. 200 */ 201 set_float_2nan_prop_rule(float_2nan_prop_x87, &env->fp_status); 202 #if defined(CONFIG_USER_ONLY) 203 env->flags = ENV_FLAG_PS_USER | ENV_FLAG_FEN; 204 cpu_alpha_store_fpcr(env, (uint64_t)(FPCR_INVD | FPCR_DZED | FPCR_OVFD 205 | FPCR_UNFD | FPCR_INED | FPCR_DNOD 206 | FPCR_DYN_NORMAL) << 32); 207 #else 208 env->flags = ENV_FLAG_PAL_MODE | ENV_FLAG_FEN; 209 #endif 210 } 211 212 #ifndef CONFIG_USER_ONLY 213 #include "hw/core/sysemu-cpu-ops.h" 214 215 static const struct SysemuCPUOps alpha_sysemu_ops = { 216 .get_phys_page_debug = alpha_cpu_get_phys_page_debug, 217 }; 218 #endif 219 220 #include "hw/core/tcg-cpu-ops.h" 221 222 static const TCGCPUOps alpha_tcg_ops = { 223 .initialize = alpha_translate_init, 224 .synchronize_from_tb = alpha_cpu_synchronize_from_tb, 225 .restore_state_to_opc = alpha_restore_state_to_opc, 226 227 #ifdef CONFIG_USER_ONLY 228 .record_sigsegv = alpha_cpu_record_sigsegv, 229 .record_sigbus = alpha_cpu_record_sigbus, 230 #else 231 .tlb_fill = alpha_cpu_tlb_fill, 232 .cpu_exec_interrupt = alpha_cpu_exec_interrupt, 233 .cpu_exec_halt = alpha_cpu_has_work, 234 .do_interrupt = alpha_cpu_do_interrupt, 235 .do_transaction_failed = alpha_cpu_do_transaction_failed, 236 .do_unaligned_access = alpha_cpu_do_unaligned_access, 237 #endif /* !CONFIG_USER_ONLY */ 238 }; 239 240 static void alpha_cpu_class_init(ObjectClass *oc, void *data) 241 { 242 DeviceClass *dc = DEVICE_CLASS(oc); 243 CPUClass *cc = CPU_CLASS(oc); 244 AlphaCPUClass *acc = ALPHA_CPU_CLASS(oc); 245 246 device_class_set_parent_realize(dc, alpha_cpu_realizefn, 247 &acc->parent_realize); 248 249 cc->class_by_name = alpha_cpu_class_by_name; 250 cc->has_work = alpha_cpu_has_work; 251 cc->mmu_index = alpha_cpu_mmu_index; 252 cc->dump_state = alpha_cpu_dump_state; 253 cc->set_pc = alpha_cpu_set_pc; 254 cc->get_pc = alpha_cpu_get_pc; 255 cc->gdb_read_register = alpha_cpu_gdb_read_register; 256 cc->gdb_write_register = alpha_cpu_gdb_write_register; 257 #ifndef CONFIG_USER_ONLY 258 dc->vmsd = &vmstate_alpha_cpu; 259 cc->sysemu_ops = &alpha_sysemu_ops; 260 #endif 261 cc->disas_set_info = alpha_cpu_disas_set_info; 262 263 cc->tcg_ops = &alpha_tcg_ops; 264 cc->gdb_num_core_regs = 67; 265 } 266 267 #define DEFINE_ALPHA_CPU_TYPE(base_type, cpu_model, initfn) \ 268 { \ 269 .parent = base_type, \ 270 .instance_init = initfn, \ 271 .name = ALPHA_CPU_TYPE_NAME(cpu_model), \ 272 } 273 274 static const TypeInfo alpha_cpu_type_infos[] = { 275 { 276 .name = TYPE_ALPHA_CPU, 277 .parent = TYPE_CPU, 278 .instance_size = sizeof(AlphaCPU), 279 .instance_align = __alignof(AlphaCPU), 280 .instance_init = alpha_cpu_initfn, 281 .abstract = true, 282 .class_size = sizeof(AlphaCPUClass), 283 .class_init = alpha_cpu_class_init, 284 }, 285 DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev4", ev4_cpu_initfn), 286 DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev5", ev5_cpu_initfn), 287 DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev5"), "ev56", ev56_cpu_initfn), 288 DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev56"), "pca56", 289 pca56_cpu_initfn), 290 DEFINE_ALPHA_CPU_TYPE(TYPE_ALPHA_CPU, "ev6", ev6_cpu_initfn), 291 DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev6"), "ev67", ev67_cpu_initfn), 292 DEFINE_ALPHA_CPU_TYPE(ALPHA_CPU_TYPE_NAME("ev67"), "ev68", NULL), 293 }; 294 295 DEFINE_TYPES(alpha_cpu_type_infos) 296