xref: /openbmc/qemu/system/memory.c (revision 639ec3fb)
1 /*
2  * Physical memory management
3  *
4  * Copyright 2011 Red Hat, Inc. and/or its affiliates
5  *
6  * Authors:
7  *  Avi Kivity <avi@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2.  See
10  * the COPYING file in the top-level directory.
11  *
12  * Contributions after 2012-01-13 are licensed under the terms of the
13  * GNU GPL, version 2 or (at your option) any later version.
14  */
15 
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27 
28 #include "exec/memory-internal.h"
29 #include "exec/ram_addr.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/runstate.h"
32 #include "sysemu/tcg.h"
33 #include "qemu/accel.h"
34 #include "hw/boards.h"
35 #include "migration/vmstate.h"
36 #include "exec/address-spaces.h"
37 
38 //#define DEBUG_UNASSIGNED
39 
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 unsigned int global_dirty_tracking;
44 
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46     = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47 
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49     = QTAILQ_HEAD_INITIALIZER(address_spaces);
50 
51 static GHashTable *flat_views;
52 
53 typedef struct AddrRange AddrRange;
54 
55 /*
56  * Note that signed integers are needed for negative offsetting in aliases
57  * (large MemoryRegion::alias_offset).
58  */
59 struct AddrRange {
60     Int128 start;
61     Int128 size;
62 };
63 
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66     return (AddrRange) { start, size };
67 }
68 
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71     return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73 
74 static Int128 addrrange_end(AddrRange r)
75 {
76     return int128_add(r.start, r.size);
77 }
78 
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81     int128_addto(&range.start, delta);
82     return range;
83 }
84 
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87     return int128_ge(addr, range.start)
88         && int128_lt(addr, addrrange_end(range));
89 }
90 
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93     return addrrange_contains(r1, r2.start)
94         || addrrange_contains(r2, r1.start);
95 }
96 
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99     Int128 start = int128_max(r1.start, r2.start);
100     Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101     return addrrange_make(start, int128_sub(end, start));
102 }
103 
104 enum ListenerDirection { Forward, Reverse };
105 
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
107     do {                                                                \
108         MemoryListener *_listener;                                      \
109                                                                         \
110         switch (_direction) {                                           \
111         case Forward:                                                   \
112             QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
113                 if (_listener->_callback) {                             \
114                     _listener->_callback(_listener, ##_args);           \
115                 }                                                       \
116             }                                                           \
117             break;                                                      \
118         case Reverse:                                                   \
119             QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120                 if (_listener->_callback) {                             \
121                     _listener->_callback(_listener, ##_args);           \
122                 }                                                       \
123             }                                                           \
124             break;                                                      \
125         default:                                                        \
126             abort();                                                    \
127         }                                                               \
128     } while (0)
129 
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131     do {                                                                \
132         MemoryListener *_listener;                                      \
133                                                                         \
134         switch (_direction) {                                           \
135         case Forward:                                                   \
136             QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) {     \
137                 if (_listener->_callback) {                             \
138                     _listener->_callback(_listener, _section, ##_args); \
139                 }                                                       \
140             }                                                           \
141             break;                                                      \
142         case Reverse:                                                   \
143             QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144                 if (_listener->_callback) {                             \
145                     _listener->_callback(_listener, _section, ##_args); \
146                 }                                                       \
147             }                                                           \
148             break;                                                      \
149         default:                                                        \
150             abort();                                                    \
151         }                                                               \
152     } while (0)
153 
154 /* No need to ref/unref .mr, the FlatRange keeps it alive.  */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
156     do {                                                                \
157         MemoryRegionSection mrs = section_from_flat_range(fr,           \
158                 address_space_to_flatview(as));                         \
159         MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
160     } while(0)
161 
162 struct CoalescedMemoryRange {
163     AddrRange addr;
164     QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166 
167 struct MemoryRegionIoeventfd {
168     AddrRange addr;
169     bool match_data;
170     uint64_t data;
171     EventNotifier *e;
172 };
173 
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175                                            MemoryRegionIoeventfd *b)
176 {
177     if (int128_lt(a->addr.start, b->addr.start)) {
178         return true;
179     } else if (int128_gt(a->addr.start, b->addr.start)) {
180         return false;
181     } else if (int128_lt(a->addr.size, b->addr.size)) {
182         return true;
183     } else if (int128_gt(a->addr.size, b->addr.size)) {
184         return false;
185     } else if (a->match_data < b->match_data) {
186         return true;
187     } else  if (a->match_data > b->match_data) {
188         return false;
189     } else if (a->match_data) {
190         if (a->data < b->data) {
191             return true;
192         } else if (a->data > b->data) {
193             return false;
194         }
195     }
196     if (a->e < b->e) {
197         return true;
198     } else if (a->e > b->e) {
199         return false;
200     }
201     return false;
202 }
203 
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205                                           MemoryRegionIoeventfd *b)
206 {
207     if (int128_eq(a->addr.start, b->addr.start) &&
208         (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209          (int128_eq(a->addr.size, b->addr.size) &&
210           (a->match_data == b->match_data) &&
211           ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212           (a->e == b->e))))
213         return true;
214 
215     return false;
216 }
217 
218 /* Range of memory in the global map.  Addresses are absolute. */
219 struct FlatRange {
220     MemoryRegion *mr;
221     hwaddr offset_in_region;
222     AddrRange addr;
223     uint8_t dirty_log_mask;
224     bool romd_mode;
225     bool readonly;
226     bool nonvolatile;
227     bool unmergeable;
228 };
229 
230 #define FOR_EACH_FLAT_RANGE(var, view)          \
231     for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232 
233 static inline MemoryRegionSection
234 section_from_flat_range(FlatRange *fr, FlatView *fv)
235 {
236     return (MemoryRegionSection) {
237         .mr = fr->mr,
238         .fv = fv,
239         .offset_within_region = fr->offset_in_region,
240         .size = fr->addr.size,
241         .offset_within_address_space = int128_get64(fr->addr.start),
242         .readonly = fr->readonly,
243         .nonvolatile = fr->nonvolatile,
244         .unmergeable = fr->unmergeable,
245     };
246 }
247 
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250     return a->mr == b->mr
251         && addrrange_equal(a->addr, b->addr)
252         && a->offset_in_region == b->offset_in_region
253         && a->romd_mode == b->romd_mode
254         && a->readonly == b->readonly
255         && a->nonvolatile == b->nonvolatile
256         && a->unmergeable == b->unmergeable;
257 }
258 
259 static FlatView *flatview_new(MemoryRegion *mr_root)
260 {
261     FlatView *view;
262 
263     view = g_new0(FlatView, 1);
264     view->ref = 1;
265     view->root = mr_root;
266     memory_region_ref(mr_root);
267     trace_flatview_new(view, mr_root);
268 
269     return view;
270 }
271 
272 /* Insert a range into a given position.  Caller is responsible for maintaining
273  * sorting order.
274  */
275 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
276 {
277     if (view->nr == view->nr_allocated) {
278         view->nr_allocated = MAX(2 * view->nr, 10);
279         view->ranges = g_realloc(view->ranges,
280                                     view->nr_allocated * sizeof(*view->ranges));
281     }
282     memmove(view->ranges + pos + 1, view->ranges + pos,
283             (view->nr - pos) * sizeof(FlatRange));
284     view->ranges[pos] = *range;
285     memory_region_ref(range->mr);
286     ++view->nr;
287 }
288 
289 static void flatview_destroy(FlatView *view)
290 {
291     int i;
292 
293     trace_flatview_destroy(view, view->root);
294     if (view->dispatch) {
295         address_space_dispatch_free(view->dispatch);
296     }
297     for (i = 0; i < view->nr; i++) {
298         memory_region_unref(view->ranges[i].mr);
299     }
300     g_free(view->ranges);
301     memory_region_unref(view->root);
302     g_free(view);
303 }
304 
305 static bool flatview_ref(FlatView *view)
306 {
307     return qatomic_fetch_inc_nonzero(&view->ref) > 0;
308 }
309 
310 void flatview_unref(FlatView *view)
311 {
312     if (qatomic_fetch_dec(&view->ref) == 1) {
313         trace_flatview_destroy_rcu(view, view->root);
314         assert(view->root);
315         call_rcu(view, flatview_destroy, rcu);
316     }
317 }
318 
319 static bool can_merge(FlatRange *r1, FlatRange *r2)
320 {
321     return int128_eq(addrrange_end(r1->addr), r2->addr.start)
322         && r1->mr == r2->mr
323         && int128_eq(int128_add(int128_make64(r1->offset_in_region),
324                                 r1->addr.size),
325                      int128_make64(r2->offset_in_region))
326         && r1->dirty_log_mask == r2->dirty_log_mask
327         && r1->romd_mode == r2->romd_mode
328         && r1->readonly == r2->readonly
329         && r1->nonvolatile == r2->nonvolatile
330         && !r1->unmergeable && !r2->unmergeable;
331 }
332 
333 /* Attempt to simplify a view by merging adjacent ranges */
334 static void flatview_simplify(FlatView *view)
335 {
336     unsigned i, j, k;
337 
338     i = 0;
339     while (i < view->nr) {
340         j = i + 1;
341         while (j < view->nr
342                && can_merge(&view->ranges[j-1], &view->ranges[j])) {
343             int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
344             ++j;
345         }
346         ++i;
347         for (k = i; k < j; k++) {
348             memory_region_unref(view->ranges[k].mr);
349         }
350         memmove(&view->ranges[i], &view->ranges[j],
351                 (view->nr - j) * sizeof(view->ranges[j]));
352         view->nr -= j - i;
353     }
354 }
355 
356 static bool memory_region_big_endian(MemoryRegion *mr)
357 {
358 #if TARGET_BIG_ENDIAN
359     return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
360 #else
361     return mr->ops->endianness == DEVICE_BIG_ENDIAN;
362 #endif
363 }
364 
365 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
366 {
367     if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
368         switch (op & MO_SIZE) {
369         case MO_8:
370             break;
371         case MO_16:
372             *data = bswap16(*data);
373             break;
374         case MO_32:
375             *data = bswap32(*data);
376             break;
377         case MO_64:
378             *data = bswap64(*data);
379             break;
380         default:
381             g_assert_not_reached();
382         }
383     }
384 }
385 
386 static inline void memory_region_shift_read_access(uint64_t *value,
387                                                    signed shift,
388                                                    uint64_t mask,
389                                                    uint64_t tmp)
390 {
391     if (shift >= 0) {
392         *value |= (tmp & mask) << shift;
393     } else {
394         *value |= (tmp & mask) >> -shift;
395     }
396 }
397 
398 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
399                                                         signed shift,
400                                                         uint64_t mask)
401 {
402     uint64_t tmp;
403 
404     if (shift >= 0) {
405         tmp = (*value >> shift) & mask;
406     } else {
407         tmp = (*value << -shift) & mask;
408     }
409 
410     return tmp;
411 }
412 
413 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
414 {
415     MemoryRegion *root;
416     hwaddr abs_addr = offset;
417 
418     abs_addr += mr->addr;
419     for (root = mr; root->container; ) {
420         root = root->container;
421         abs_addr += root->addr;
422     }
423 
424     return abs_addr;
425 }
426 
427 static int get_cpu_index(void)
428 {
429     if (current_cpu) {
430         return current_cpu->cpu_index;
431     }
432     return -1;
433 }
434 
435 static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
436                                                 hwaddr addr,
437                                                 uint64_t *value,
438                                                 unsigned size,
439                                                 signed shift,
440                                                 uint64_t mask,
441                                                 MemTxAttrs attrs)
442 {
443     uint64_t tmp;
444 
445     tmp = mr->ops->read(mr->opaque, addr, size);
446     if (mr->subpage) {
447         trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
448     } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
449         hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
450         trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
451                                      memory_region_name(mr));
452     }
453     memory_region_shift_read_access(value, shift, mask, tmp);
454     return MEMTX_OK;
455 }
456 
457 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
458                                                           hwaddr addr,
459                                                           uint64_t *value,
460                                                           unsigned size,
461                                                           signed shift,
462                                                           uint64_t mask,
463                                                           MemTxAttrs attrs)
464 {
465     uint64_t tmp = 0;
466     MemTxResult r;
467 
468     r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
469     if (mr->subpage) {
470         trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
471     } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
472         hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473         trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
474                                      memory_region_name(mr));
475     }
476     memory_region_shift_read_access(value, shift, mask, tmp);
477     return r;
478 }
479 
480 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
481                                                 hwaddr addr,
482                                                 uint64_t *value,
483                                                 unsigned size,
484                                                 signed shift,
485                                                 uint64_t mask,
486                                                 MemTxAttrs attrs)
487 {
488     uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
489 
490     if (mr->subpage) {
491         trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492     } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
493         hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
494         trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
495                                       memory_region_name(mr));
496     }
497     mr->ops->write(mr->opaque, addr, tmp, size);
498     return MEMTX_OK;
499 }
500 
501 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
502                                                            hwaddr addr,
503                                                            uint64_t *value,
504                                                            unsigned size,
505                                                            signed shift,
506                                                            uint64_t mask,
507                                                            MemTxAttrs attrs)
508 {
509     uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
510 
511     if (mr->subpage) {
512         trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
513     } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
514         hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
515         trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
516                                       memory_region_name(mr));
517     }
518     return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
519 }
520 
521 static MemTxResult access_with_adjusted_size(hwaddr addr,
522                                       uint64_t *value,
523                                       unsigned size,
524                                       unsigned access_size_min,
525                                       unsigned access_size_max,
526                                       MemTxResult (*access_fn)
527                                                   (MemoryRegion *mr,
528                                                    hwaddr addr,
529                                                    uint64_t *value,
530                                                    unsigned size,
531                                                    signed shift,
532                                                    uint64_t mask,
533                                                    MemTxAttrs attrs),
534                                       MemoryRegion *mr,
535                                       MemTxAttrs attrs)
536 {
537     uint64_t access_mask;
538     unsigned access_size;
539     unsigned i;
540     MemTxResult r = MEMTX_OK;
541     bool reentrancy_guard_applied = false;
542 
543     if (!access_size_min) {
544         access_size_min = 1;
545     }
546     if (!access_size_max) {
547         access_size_max = 4;
548     }
549 
550     /* Do not allow more than one simultaneous access to a device's IO Regions */
551     if (mr->dev && !mr->disable_reentrancy_guard &&
552         !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
553         if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
554             warn_report_once("Blocked re-entrant IO on MemoryRegion: "
555                              "%s at addr: 0x%" HWADDR_PRIX,
556                              memory_region_name(mr), addr);
557             return MEMTX_ACCESS_ERROR;
558         }
559         mr->dev->mem_reentrancy_guard.engaged_in_io = true;
560         reentrancy_guard_applied = true;
561     }
562 
563     /* FIXME: support unaligned access? */
564     access_size = MAX(MIN(size, access_size_max), access_size_min);
565     access_mask = MAKE_64BIT_MASK(0, access_size * 8);
566     if (memory_region_big_endian(mr)) {
567         for (i = 0; i < size; i += access_size) {
568             r |= access_fn(mr, addr + i, value, access_size,
569                         (size - access_size - i) * 8, access_mask, attrs);
570         }
571     } else {
572         for (i = 0; i < size; i += access_size) {
573             r |= access_fn(mr, addr + i, value, access_size, i * 8,
574                         access_mask, attrs);
575         }
576     }
577     if (mr->dev && reentrancy_guard_applied) {
578         mr->dev->mem_reentrancy_guard.engaged_in_io = false;
579     }
580     return r;
581 }
582 
583 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
584 {
585     AddressSpace *as;
586 
587     while (mr->container) {
588         mr = mr->container;
589     }
590     QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
591         if (mr == as->root) {
592             return as;
593         }
594     }
595     return NULL;
596 }
597 
598 /* Render a memory region into the global view.  Ranges in @view obscure
599  * ranges in @mr.
600  */
601 static void render_memory_region(FlatView *view,
602                                  MemoryRegion *mr,
603                                  Int128 base,
604                                  AddrRange clip,
605                                  bool readonly,
606                                  bool nonvolatile,
607                                  bool unmergeable)
608 {
609     MemoryRegion *subregion;
610     unsigned i;
611     hwaddr offset_in_region;
612     Int128 remain;
613     Int128 now;
614     FlatRange fr;
615     AddrRange tmp;
616 
617     if (!mr->enabled) {
618         return;
619     }
620 
621     int128_addto(&base, int128_make64(mr->addr));
622     readonly |= mr->readonly;
623     nonvolatile |= mr->nonvolatile;
624     unmergeable |= mr->unmergeable;
625 
626     tmp = addrrange_make(base, mr->size);
627 
628     if (!addrrange_intersects(tmp, clip)) {
629         return;
630     }
631 
632     clip = addrrange_intersection(tmp, clip);
633 
634     if (mr->alias) {
635         int128_subfrom(&base, int128_make64(mr->alias->addr));
636         int128_subfrom(&base, int128_make64(mr->alias_offset));
637         render_memory_region(view, mr->alias, base, clip,
638                              readonly, nonvolatile, unmergeable);
639         return;
640     }
641 
642     /* Render subregions in priority order. */
643     QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
644         render_memory_region(view, subregion, base, clip,
645                              readonly, nonvolatile, unmergeable);
646     }
647 
648     if (!mr->terminates) {
649         return;
650     }
651 
652     offset_in_region = int128_get64(int128_sub(clip.start, base));
653     base = clip.start;
654     remain = clip.size;
655 
656     fr.mr = mr;
657     fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
658     fr.romd_mode = mr->romd_mode;
659     fr.readonly = readonly;
660     fr.nonvolatile = nonvolatile;
661     fr.unmergeable = unmergeable;
662 
663     /* Render the region itself into any gaps left by the current view. */
664     for (i = 0; i < view->nr && int128_nz(remain); ++i) {
665         if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
666             continue;
667         }
668         if (int128_lt(base, view->ranges[i].addr.start)) {
669             now = int128_min(remain,
670                              int128_sub(view->ranges[i].addr.start, base));
671             fr.offset_in_region = offset_in_region;
672             fr.addr = addrrange_make(base, now);
673             flatview_insert(view, i, &fr);
674             ++i;
675             int128_addto(&base, now);
676             offset_in_region += int128_get64(now);
677             int128_subfrom(&remain, now);
678         }
679         now = int128_sub(int128_min(int128_add(base, remain),
680                                     addrrange_end(view->ranges[i].addr)),
681                          base);
682         int128_addto(&base, now);
683         offset_in_region += int128_get64(now);
684         int128_subfrom(&remain, now);
685     }
686     if (int128_nz(remain)) {
687         fr.offset_in_region = offset_in_region;
688         fr.addr = addrrange_make(base, remain);
689         flatview_insert(view, i, &fr);
690     }
691 }
692 
693 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
694 {
695     FlatRange *fr;
696 
697     assert(fv);
698     assert(cb);
699 
700     FOR_EACH_FLAT_RANGE(fr, fv) {
701         if (cb(fr->addr.start, fr->addr.size, fr->mr,
702                fr->offset_in_region, opaque)) {
703             break;
704         }
705     }
706 }
707 
708 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
709 {
710     while (mr->enabled) {
711         if (mr->alias) {
712             if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
713                 /* The alias is included in its entirety.  Use it as
714                  * the "real" root, so that we can share more FlatViews.
715                  */
716                 mr = mr->alias;
717                 continue;
718             }
719         } else if (!mr->terminates) {
720             unsigned int found = 0;
721             MemoryRegion *child, *next = NULL;
722             QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
723                 if (child->enabled) {
724                     if (++found > 1) {
725                         next = NULL;
726                         break;
727                     }
728                     if (!child->addr && int128_ge(mr->size, child->size)) {
729                         /* A child is included in its entirety.  If it's the only
730                          * enabled one, use it in the hope of finding an alias down the
731                          * way. This will also let us share FlatViews.
732                          */
733                         next = child;
734                     }
735                 }
736             }
737             if (found == 0) {
738                 return NULL;
739             }
740             if (next) {
741                 mr = next;
742                 continue;
743             }
744         }
745 
746         return mr;
747     }
748 
749     return NULL;
750 }
751 
752 /* Render a memory topology into a list of disjoint absolute ranges. */
753 static FlatView *generate_memory_topology(MemoryRegion *mr)
754 {
755     int i;
756     FlatView *view;
757 
758     view = flatview_new(mr);
759 
760     if (mr) {
761         render_memory_region(view, mr, int128_zero(),
762                              addrrange_make(int128_zero(), int128_2_64()),
763                              false, false, false);
764     }
765     flatview_simplify(view);
766 
767     view->dispatch = address_space_dispatch_new(view);
768     for (i = 0; i < view->nr; i++) {
769         MemoryRegionSection mrs =
770             section_from_flat_range(&view->ranges[i], view);
771         flatview_add_to_dispatch(view, &mrs);
772     }
773     address_space_dispatch_compact(view->dispatch);
774     g_hash_table_replace(flat_views, mr, view);
775 
776     return view;
777 }
778 
779 static void address_space_add_del_ioeventfds(AddressSpace *as,
780                                              MemoryRegionIoeventfd *fds_new,
781                                              unsigned fds_new_nb,
782                                              MemoryRegionIoeventfd *fds_old,
783                                              unsigned fds_old_nb)
784 {
785     unsigned iold, inew;
786     MemoryRegionIoeventfd *fd;
787     MemoryRegionSection section;
788 
789     /* Generate a symmetric difference of the old and new fd sets, adding
790      * and deleting as necessary.
791      */
792 
793     iold = inew = 0;
794     while (iold < fds_old_nb || inew < fds_new_nb) {
795         if (iold < fds_old_nb
796             && (inew == fds_new_nb
797                 || memory_region_ioeventfd_before(&fds_old[iold],
798                                                   &fds_new[inew]))) {
799             fd = &fds_old[iold];
800             section = (MemoryRegionSection) {
801                 .fv = address_space_to_flatview(as),
802                 .offset_within_address_space = int128_get64(fd->addr.start),
803                 .size = fd->addr.size,
804             };
805             MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
806                                  fd->match_data, fd->data, fd->e);
807             ++iold;
808         } else if (inew < fds_new_nb
809                    && (iold == fds_old_nb
810                        || memory_region_ioeventfd_before(&fds_new[inew],
811                                                          &fds_old[iold]))) {
812             fd = &fds_new[inew];
813             section = (MemoryRegionSection) {
814                 .fv = address_space_to_flatview(as),
815                 .offset_within_address_space = int128_get64(fd->addr.start),
816                 .size = fd->addr.size,
817             };
818             MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
819                                  fd->match_data, fd->data, fd->e);
820             ++inew;
821         } else {
822             ++iold;
823             ++inew;
824         }
825     }
826 }
827 
828 FlatView *address_space_get_flatview(AddressSpace *as)
829 {
830     FlatView *view;
831 
832     RCU_READ_LOCK_GUARD();
833     do {
834         view = address_space_to_flatview(as);
835         /* If somebody has replaced as->current_map concurrently,
836          * flatview_ref returns false.
837          */
838     } while (!flatview_ref(view));
839     return view;
840 }
841 
842 static void address_space_update_ioeventfds(AddressSpace *as)
843 {
844     FlatView *view;
845     FlatRange *fr;
846     unsigned ioeventfd_nb = 0;
847     unsigned ioeventfd_max;
848     MemoryRegionIoeventfd *ioeventfds;
849     AddrRange tmp;
850     unsigned i;
851 
852     if (!as->ioeventfd_notifiers) {
853         return;
854     }
855 
856     /*
857      * It is likely that the number of ioeventfds hasn't changed much, so use
858      * the previous size as the starting value, with some headroom to avoid
859      * gratuitous reallocations.
860      */
861     ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
862     ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
863 
864     view = address_space_get_flatview(as);
865     FOR_EACH_FLAT_RANGE(fr, view) {
866         for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
867             tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
868                                   int128_sub(fr->addr.start,
869                                              int128_make64(fr->offset_in_region)));
870             if (addrrange_intersects(fr->addr, tmp)) {
871                 ++ioeventfd_nb;
872                 if (ioeventfd_nb > ioeventfd_max) {
873                     ioeventfd_max = MAX(ioeventfd_max * 2, 4);
874                     ioeventfds = g_realloc(ioeventfds,
875                             ioeventfd_max * sizeof(*ioeventfds));
876                 }
877                 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
878                 ioeventfds[ioeventfd_nb-1].addr = tmp;
879             }
880         }
881     }
882 
883     address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
884                                      as->ioeventfds, as->ioeventfd_nb);
885 
886     g_free(as->ioeventfds);
887     as->ioeventfds = ioeventfds;
888     as->ioeventfd_nb = ioeventfd_nb;
889     flatview_unref(view);
890 }
891 
892 /*
893  * Notify the memory listeners about the coalesced IO change events of
894  * range `cmr'.  Only the part that has intersection of the specified
895  * FlatRange will be sent.
896  */
897 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
898                                            CoalescedMemoryRange *cmr, bool add)
899 {
900     AddrRange tmp;
901 
902     tmp = addrrange_shift(cmr->addr,
903                           int128_sub(fr->addr.start,
904                                      int128_make64(fr->offset_in_region)));
905     if (!addrrange_intersects(tmp, fr->addr)) {
906         return;
907     }
908     tmp = addrrange_intersection(tmp, fr->addr);
909 
910     if (add) {
911         MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
912                                       int128_get64(tmp.start),
913                                       int128_get64(tmp.size));
914     } else {
915         MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
916                                       int128_get64(tmp.start),
917                                       int128_get64(tmp.size));
918     }
919 }
920 
921 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
922 {
923     CoalescedMemoryRange *cmr;
924 
925     QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
926         flat_range_coalesced_io_notify(fr, as, cmr, false);
927     }
928 }
929 
930 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
931 {
932     MemoryRegion *mr = fr->mr;
933     CoalescedMemoryRange *cmr;
934 
935     if (QTAILQ_EMPTY(&mr->coalesced)) {
936         return;
937     }
938 
939     QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
940         flat_range_coalesced_io_notify(fr, as, cmr, true);
941     }
942 }
943 
944 static void address_space_update_topology_pass(AddressSpace *as,
945                                                const FlatView *old_view,
946                                                const FlatView *new_view,
947                                                bool adding)
948 {
949     unsigned iold, inew;
950     FlatRange *frold, *frnew;
951 
952     /* Generate a symmetric difference of the old and new memory maps.
953      * Kill ranges in the old map, and instantiate ranges in the new map.
954      */
955     iold = inew = 0;
956     while (iold < old_view->nr || inew < new_view->nr) {
957         if (iold < old_view->nr) {
958             frold = &old_view->ranges[iold];
959         } else {
960             frold = NULL;
961         }
962         if (inew < new_view->nr) {
963             frnew = &new_view->ranges[inew];
964         } else {
965             frnew = NULL;
966         }
967 
968         if (frold
969             && (!frnew
970                 || int128_lt(frold->addr.start, frnew->addr.start)
971                 || (int128_eq(frold->addr.start, frnew->addr.start)
972                     && !flatrange_equal(frold, frnew)))) {
973             /* In old but not in new, or in both but attributes changed. */
974 
975             if (!adding) {
976                 flat_range_coalesced_io_del(frold, as);
977                 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
978             }
979 
980             ++iold;
981         } else if (frold && frnew && flatrange_equal(frold, frnew)) {
982             /* In both and unchanged (except logging may have changed) */
983 
984             if (adding) {
985                 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
986                 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
987                     MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
988                                                   frold->dirty_log_mask,
989                                                   frnew->dirty_log_mask);
990                 }
991                 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
992                     MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
993                                                   frold->dirty_log_mask,
994                                                   frnew->dirty_log_mask);
995                 }
996             }
997 
998             ++iold;
999             ++inew;
1000         } else {
1001             /* In new */
1002 
1003             if (adding) {
1004                 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
1005                 flat_range_coalesced_io_add(frnew, as);
1006             }
1007 
1008             ++inew;
1009         }
1010     }
1011 }
1012 
1013 static void flatviews_init(void)
1014 {
1015     static FlatView *empty_view;
1016 
1017     if (flat_views) {
1018         return;
1019     }
1020 
1021     flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1022                                        (GDestroyNotify) flatview_unref);
1023     if (!empty_view) {
1024         empty_view = generate_memory_topology(NULL);
1025         /* We keep it alive forever in the global variable.  */
1026         flatview_ref(empty_view);
1027     } else {
1028         g_hash_table_replace(flat_views, NULL, empty_view);
1029         flatview_ref(empty_view);
1030     }
1031 }
1032 
1033 static void flatviews_reset(void)
1034 {
1035     AddressSpace *as;
1036 
1037     if (flat_views) {
1038         g_hash_table_unref(flat_views);
1039         flat_views = NULL;
1040     }
1041     flatviews_init();
1042 
1043     /* Render unique FVs */
1044     QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1045         MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1046 
1047         if (g_hash_table_lookup(flat_views, physmr)) {
1048             continue;
1049         }
1050 
1051         generate_memory_topology(physmr);
1052     }
1053 }
1054 
1055 static void address_space_set_flatview(AddressSpace *as)
1056 {
1057     FlatView *old_view = address_space_to_flatview(as);
1058     MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1059     FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1060 
1061     assert(new_view);
1062 
1063     if (old_view == new_view) {
1064         return;
1065     }
1066 
1067     if (old_view) {
1068         flatview_ref(old_view);
1069     }
1070 
1071     flatview_ref(new_view);
1072 
1073     if (!QTAILQ_EMPTY(&as->listeners)) {
1074         FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1075 
1076         if (!old_view2) {
1077             old_view2 = &tmpview;
1078         }
1079         address_space_update_topology_pass(as, old_view2, new_view, false);
1080         address_space_update_topology_pass(as, old_view2, new_view, true);
1081     }
1082 
1083     /* Writes are protected by the BQL.  */
1084     qatomic_rcu_set(&as->current_map, new_view);
1085     if (old_view) {
1086         flatview_unref(old_view);
1087     }
1088 
1089     /* Note that all the old MemoryRegions are still alive up to this
1090      * point.  This relieves most MemoryListeners from the need to
1091      * ref/unref the MemoryRegions they get---unless they use them
1092      * outside the iothread mutex, in which case precise reference
1093      * counting is necessary.
1094      */
1095     if (old_view) {
1096         flatview_unref(old_view);
1097     }
1098 }
1099 
1100 static void address_space_update_topology(AddressSpace *as)
1101 {
1102     MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1103 
1104     flatviews_init();
1105     if (!g_hash_table_lookup(flat_views, physmr)) {
1106         generate_memory_topology(physmr);
1107     }
1108     address_space_set_flatview(as);
1109 }
1110 
1111 void memory_region_transaction_begin(void)
1112 {
1113     qemu_flush_coalesced_mmio_buffer();
1114     ++memory_region_transaction_depth;
1115 }
1116 
1117 void memory_region_transaction_commit(void)
1118 {
1119     AddressSpace *as;
1120 
1121     assert(memory_region_transaction_depth);
1122     assert(bql_locked());
1123 
1124     --memory_region_transaction_depth;
1125     if (!memory_region_transaction_depth) {
1126         if (memory_region_update_pending) {
1127             flatviews_reset();
1128 
1129             MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1130 
1131             QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1132                 address_space_set_flatview(as);
1133                 address_space_update_ioeventfds(as);
1134             }
1135             memory_region_update_pending = false;
1136             ioeventfd_update_pending = false;
1137             MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1138         } else if (ioeventfd_update_pending) {
1139             QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1140                 address_space_update_ioeventfds(as);
1141             }
1142             ioeventfd_update_pending = false;
1143         }
1144    }
1145 }
1146 
1147 static void memory_region_destructor_none(MemoryRegion *mr)
1148 {
1149 }
1150 
1151 static void memory_region_destructor_ram(MemoryRegion *mr)
1152 {
1153     qemu_ram_free(mr->ram_block);
1154 }
1155 
1156 static bool memory_region_need_escape(char c)
1157 {
1158     return c == '/' || c == '[' || c == '\\' || c == ']';
1159 }
1160 
1161 static char *memory_region_escape_name(const char *name)
1162 {
1163     const char *p;
1164     char *escaped, *q;
1165     uint8_t c;
1166     size_t bytes = 0;
1167 
1168     for (p = name; *p; p++) {
1169         bytes += memory_region_need_escape(*p) ? 4 : 1;
1170     }
1171     if (bytes == p - name) {
1172        return g_memdup(name, bytes + 1);
1173     }
1174 
1175     escaped = g_malloc(bytes + 1);
1176     for (p = name, q = escaped; *p; p++) {
1177         c = *p;
1178         if (unlikely(memory_region_need_escape(c))) {
1179             *q++ = '\\';
1180             *q++ = 'x';
1181             *q++ = "0123456789abcdef"[c >> 4];
1182             c = "0123456789abcdef"[c & 15];
1183         }
1184         *q++ = c;
1185     }
1186     *q = 0;
1187     return escaped;
1188 }
1189 
1190 static void memory_region_do_init(MemoryRegion *mr,
1191                                   Object *owner,
1192                                   const char *name,
1193                                   uint64_t size)
1194 {
1195     mr->size = int128_make64(size);
1196     if (size == UINT64_MAX) {
1197         mr->size = int128_2_64();
1198     }
1199     mr->name = g_strdup(name);
1200     mr->owner = owner;
1201     mr->dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
1202     mr->ram_block = NULL;
1203 
1204     if (name) {
1205         char *escaped_name = memory_region_escape_name(name);
1206         char *name_array = g_strdup_printf("%s[*]", escaped_name);
1207 
1208         if (!owner) {
1209             owner = container_get(qdev_get_machine(), "/unattached");
1210         }
1211 
1212         object_property_add_child(owner, name_array, OBJECT(mr));
1213         object_unref(OBJECT(mr));
1214         g_free(name_array);
1215         g_free(escaped_name);
1216     }
1217 }
1218 
1219 void memory_region_init(MemoryRegion *mr,
1220                         Object *owner,
1221                         const char *name,
1222                         uint64_t size)
1223 {
1224     object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1225     memory_region_do_init(mr, owner, name, size);
1226 }
1227 
1228 static void memory_region_get_container(Object *obj, Visitor *v,
1229                                         const char *name, void *opaque,
1230                                         Error **errp)
1231 {
1232     MemoryRegion *mr = MEMORY_REGION(obj);
1233     char *path = (char *)"";
1234 
1235     if (mr->container) {
1236         path = object_get_canonical_path(OBJECT(mr->container));
1237     }
1238     visit_type_str(v, name, &path, errp);
1239     if (mr->container) {
1240         g_free(path);
1241     }
1242 }
1243 
1244 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1245                                                const char *part)
1246 {
1247     MemoryRegion *mr = MEMORY_REGION(obj);
1248 
1249     return OBJECT(mr->container);
1250 }
1251 
1252 static void memory_region_get_priority(Object *obj, Visitor *v,
1253                                        const char *name, void *opaque,
1254                                        Error **errp)
1255 {
1256     MemoryRegion *mr = MEMORY_REGION(obj);
1257     int32_t value = mr->priority;
1258 
1259     visit_type_int32(v, name, &value, errp);
1260 }
1261 
1262 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1263                                    void *opaque, Error **errp)
1264 {
1265     MemoryRegion *mr = MEMORY_REGION(obj);
1266     uint64_t value = memory_region_size(mr);
1267 
1268     visit_type_uint64(v, name, &value, errp);
1269 }
1270 
1271 static void memory_region_initfn(Object *obj)
1272 {
1273     MemoryRegion *mr = MEMORY_REGION(obj);
1274     ObjectProperty *op;
1275 
1276     mr->ops = &unassigned_mem_ops;
1277     mr->enabled = true;
1278     mr->romd_mode = true;
1279     mr->destructor = memory_region_destructor_none;
1280     QTAILQ_INIT(&mr->subregions);
1281     QTAILQ_INIT(&mr->coalesced);
1282 
1283     op = object_property_add(OBJECT(mr), "container",
1284                              "link<" TYPE_MEMORY_REGION ">",
1285                              memory_region_get_container,
1286                              NULL, /* memory_region_set_container */
1287                              NULL, NULL);
1288     op->resolve = memory_region_resolve_container;
1289 
1290     object_property_add_uint64_ptr(OBJECT(mr), "addr",
1291                                    &mr->addr, OBJ_PROP_FLAG_READ);
1292     object_property_add(OBJECT(mr), "priority", "uint32",
1293                         memory_region_get_priority,
1294                         NULL, /* memory_region_set_priority */
1295                         NULL, NULL);
1296     object_property_add(OBJECT(mr), "size", "uint64",
1297                         memory_region_get_size,
1298                         NULL, /* memory_region_set_size, */
1299                         NULL, NULL);
1300 }
1301 
1302 static void iommu_memory_region_initfn(Object *obj)
1303 {
1304     MemoryRegion *mr = MEMORY_REGION(obj);
1305 
1306     mr->is_iommu = true;
1307 }
1308 
1309 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1310                                     unsigned size)
1311 {
1312 #ifdef DEBUG_UNASSIGNED
1313     printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
1314 #endif
1315     return 0;
1316 }
1317 
1318 static void unassigned_mem_write(void *opaque, hwaddr addr,
1319                                  uint64_t val, unsigned size)
1320 {
1321 #ifdef DEBUG_UNASSIGNED
1322     printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1323 #endif
1324 }
1325 
1326 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1327                                    unsigned size, bool is_write,
1328                                    MemTxAttrs attrs)
1329 {
1330     return false;
1331 }
1332 
1333 const MemoryRegionOps unassigned_mem_ops = {
1334     .valid.accepts = unassigned_mem_accepts,
1335     .endianness = DEVICE_NATIVE_ENDIAN,
1336 };
1337 
1338 static uint64_t memory_region_ram_device_read(void *opaque,
1339                                               hwaddr addr, unsigned size)
1340 {
1341     MemoryRegion *mr = opaque;
1342     uint64_t data = ldn_he_p(mr->ram_block->host + addr, size);
1343 
1344     trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1345 
1346     return data;
1347 }
1348 
1349 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1350                                            uint64_t data, unsigned size)
1351 {
1352     MemoryRegion *mr = opaque;
1353 
1354     trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1355 
1356     stn_he_p(mr->ram_block->host + addr, size, data);
1357 }
1358 
1359 static const MemoryRegionOps ram_device_mem_ops = {
1360     .read = memory_region_ram_device_read,
1361     .write = memory_region_ram_device_write,
1362     .endianness = DEVICE_HOST_ENDIAN,
1363     .valid = {
1364         .min_access_size = 1,
1365         .max_access_size = 8,
1366         .unaligned = true,
1367     },
1368     .impl = {
1369         .min_access_size = 1,
1370         .max_access_size = 8,
1371         .unaligned = true,
1372     },
1373 };
1374 
1375 bool memory_region_access_valid(MemoryRegion *mr,
1376                                 hwaddr addr,
1377                                 unsigned size,
1378                                 bool is_write,
1379                                 MemTxAttrs attrs)
1380 {
1381     if (mr->ops->valid.accepts
1382         && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1383         qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1384                       ", size %u, region '%s', reason: rejected\n",
1385                       is_write ? "write" : "read",
1386                       addr, size, memory_region_name(mr));
1387         return false;
1388     }
1389 
1390     if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1391         qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1392                       ", size %u, region '%s', reason: unaligned\n",
1393                       is_write ? "write" : "read",
1394                       addr, size, memory_region_name(mr));
1395         return false;
1396     }
1397 
1398     /* Treat zero as compatibility all valid */
1399     if (!mr->ops->valid.max_access_size) {
1400         return true;
1401     }
1402 
1403     if (size > mr->ops->valid.max_access_size
1404         || size < mr->ops->valid.min_access_size) {
1405         qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1406                       ", size %u, region '%s', reason: invalid size "
1407                       "(min:%u max:%u)\n",
1408                       is_write ? "write" : "read",
1409                       addr, size, memory_region_name(mr),
1410                       mr->ops->valid.min_access_size,
1411                       mr->ops->valid.max_access_size);
1412         return false;
1413     }
1414     return true;
1415 }
1416 
1417 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1418                                                 hwaddr addr,
1419                                                 uint64_t *pval,
1420                                                 unsigned size,
1421                                                 MemTxAttrs attrs)
1422 {
1423     *pval = 0;
1424 
1425     if (mr->ops->read) {
1426         return access_with_adjusted_size(addr, pval, size,
1427                                          mr->ops->impl.min_access_size,
1428                                          mr->ops->impl.max_access_size,
1429                                          memory_region_read_accessor,
1430                                          mr, attrs);
1431     } else {
1432         return access_with_adjusted_size(addr, pval, size,
1433                                          mr->ops->impl.min_access_size,
1434                                          mr->ops->impl.max_access_size,
1435                                          memory_region_read_with_attrs_accessor,
1436                                          mr, attrs);
1437     }
1438 }
1439 
1440 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1441                                         hwaddr addr,
1442                                         uint64_t *pval,
1443                                         MemOp op,
1444                                         MemTxAttrs attrs)
1445 {
1446     unsigned size = memop_size(op);
1447     MemTxResult r;
1448 
1449     if (mr->alias) {
1450         return memory_region_dispatch_read(mr->alias,
1451                                            mr->alias_offset + addr,
1452                                            pval, op, attrs);
1453     }
1454     if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1455         *pval = unassigned_mem_read(mr, addr, size);
1456         return MEMTX_DECODE_ERROR;
1457     }
1458 
1459     r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1460     adjust_endianness(mr, pval, op);
1461     return r;
1462 }
1463 
1464 /* Return true if an eventfd was signalled */
1465 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1466                                                     hwaddr addr,
1467                                                     uint64_t data,
1468                                                     unsigned size,
1469                                                     MemTxAttrs attrs)
1470 {
1471     MemoryRegionIoeventfd ioeventfd = {
1472         .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1473         .data = data,
1474     };
1475     unsigned i;
1476 
1477     for (i = 0; i < mr->ioeventfd_nb; i++) {
1478         ioeventfd.match_data = mr->ioeventfds[i].match_data;
1479         ioeventfd.e = mr->ioeventfds[i].e;
1480 
1481         if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1482             event_notifier_set(ioeventfd.e);
1483             return true;
1484         }
1485     }
1486 
1487     return false;
1488 }
1489 
1490 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1491                                          hwaddr addr,
1492                                          uint64_t data,
1493                                          MemOp op,
1494                                          MemTxAttrs attrs)
1495 {
1496     unsigned size = memop_size(op);
1497 
1498     if (mr->alias) {
1499         return memory_region_dispatch_write(mr->alias,
1500                                             mr->alias_offset + addr,
1501                                             data, op, attrs);
1502     }
1503     if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1504         unassigned_mem_write(mr, addr, data, size);
1505         return MEMTX_DECODE_ERROR;
1506     }
1507 
1508     adjust_endianness(mr, &data, op);
1509 
1510     /*
1511      * FIXME: it's not clear why under KVM the write would be processed
1512      * directly, instead of going through eventfd.  This probably should
1513      * test "tcg_enabled() || qtest_enabled()", or should just go away.
1514      */
1515     if (!kvm_enabled() &&
1516         memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1517         return MEMTX_OK;
1518     }
1519 
1520     if (mr->ops->write) {
1521         return access_with_adjusted_size(addr, &data, size,
1522                                          mr->ops->impl.min_access_size,
1523                                          mr->ops->impl.max_access_size,
1524                                          memory_region_write_accessor, mr,
1525                                          attrs);
1526     } else {
1527         return
1528             access_with_adjusted_size(addr, &data, size,
1529                                       mr->ops->impl.min_access_size,
1530                                       mr->ops->impl.max_access_size,
1531                                       memory_region_write_with_attrs_accessor,
1532                                       mr, attrs);
1533     }
1534 }
1535 
1536 void memory_region_init_io(MemoryRegion *mr,
1537                            Object *owner,
1538                            const MemoryRegionOps *ops,
1539                            void *opaque,
1540                            const char *name,
1541                            uint64_t size)
1542 {
1543     memory_region_init(mr, owner, name, size);
1544     mr->ops = ops ? ops : &unassigned_mem_ops;
1545     mr->opaque = opaque;
1546     mr->terminates = true;
1547 }
1548 
1549 bool memory_region_init_ram_nomigrate(MemoryRegion *mr,
1550                                       Object *owner,
1551                                       const char *name,
1552                                       uint64_t size,
1553                                       Error **errp)
1554 {
1555     return memory_region_init_ram_flags_nomigrate(mr, owner, name,
1556                                                   size, 0, errp);
1557 }
1558 
1559 bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1560                                             Object *owner,
1561                                             const char *name,
1562                                             uint64_t size,
1563                                             uint32_t ram_flags,
1564                                             Error **errp)
1565 {
1566     Error *err = NULL;
1567     memory_region_init(mr, owner, name, size);
1568     mr->ram = true;
1569     mr->terminates = true;
1570     mr->destructor = memory_region_destructor_ram;
1571     mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1572     if (err) {
1573         mr->size = int128_zero();
1574         object_unparent(OBJECT(mr));
1575         error_propagate(errp, err);
1576         return false;
1577     }
1578     return true;
1579 }
1580 
1581 bool memory_region_init_resizeable_ram(MemoryRegion *mr,
1582                                        Object *owner,
1583                                        const char *name,
1584                                        uint64_t size,
1585                                        uint64_t max_size,
1586                                        void (*resized)(const char*,
1587                                                        uint64_t length,
1588                                                        void *host),
1589                                        Error **errp)
1590 {
1591     Error *err = NULL;
1592     memory_region_init(mr, owner, name, size);
1593     mr->ram = true;
1594     mr->terminates = true;
1595     mr->destructor = memory_region_destructor_ram;
1596     mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1597                                               mr, &err);
1598     if (err) {
1599         mr->size = int128_zero();
1600         object_unparent(OBJECT(mr));
1601         error_propagate(errp, err);
1602         return false;
1603     }
1604     return true;
1605 }
1606 
1607 #ifdef CONFIG_POSIX
1608 bool memory_region_init_ram_from_file(MemoryRegion *mr,
1609                                       Object *owner,
1610                                       const char *name,
1611                                       uint64_t size,
1612                                       uint64_t align,
1613                                       uint32_t ram_flags,
1614                                       const char *path,
1615                                       ram_addr_t offset,
1616                                       Error **errp)
1617 {
1618     Error *err = NULL;
1619     memory_region_init(mr, owner, name, size);
1620     mr->ram = true;
1621     mr->readonly = !!(ram_flags & RAM_READONLY);
1622     mr->terminates = true;
1623     mr->destructor = memory_region_destructor_ram;
1624     mr->align = align;
1625     mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1626                                              offset, &err);
1627     if (err) {
1628         mr->size = int128_zero();
1629         object_unparent(OBJECT(mr));
1630         error_propagate(errp, err);
1631         return false;
1632     }
1633     return true;
1634 }
1635 
1636 bool memory_region_init_ram_from_fd(MemoryRegion *mr,
1637                                     Object *owner,
1638                                     const char *name,
1639                                     uint64_t size,
1640                                     uint32_t ram_flags,
1641                                     int fd,
1642                                     ram_addr_t offset,
1643                                     Error **errp)
1644 {
1645     Error *err = NULL;
1646     memory_region_init(mr, owner, name, size);
1647     mr->ram = true;
1648     mr->readonly = !!(ram_flags & RAM_READONLY);
1649     mr->terminates = true;
1650     mr->destructor = memory_region_destructor_ram;
1651     mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1652                                            &err);
1653     if (err) {
1654         mr->size = int128_zero();
1655         object_unparent(OBJECT(mr));
1656         error_propagate(errp, err);
1657         return false;
1658     }
1659     return true;
1660 }
1661 #endif
1662 
1663 void memory_region_init_ram_ptr(MemoryRegion *mr,
1664                                 Object *owner,
1665                                 const char *name,
1666                                 uint64_t size,
1667                                 void *ptr)
1668 {
1669     memory_region_init(mr, owner, name, size);
1670     mr->ram = true;
1671     mr->terminates = true;
1672     mr->destructor = memory_region_destructor_ram;
1673 
1674     /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1675     assert(ptr != NULL);
1676     mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1677 }
1678 
1679 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1680                                        Object *owner,
1681                                        const char *name,
1682                                        uint64_t size,
1683                                        void *ptr)
1684 {
1685     memory_region_init(mr, owner, name, size);
1686     mr->ram = true;
1687     mr->terminates = true;
1688     mr->ram_device = true;
1689     mr->ops = &ram_device_mem_ops;
1690     mr->opaque = mr;
1691     mr->destructor = memory_region_destructor_ram;
1692 
1693     /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1694     assert(ptr != NULL);
1695     mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1696 }
1697 
1698 void memory_region_init_alias(MemoryRegion *mr,
1699                               Object *owner,
1700                               const char *name,
1701                               MemoryRegion *orig,
1702                               hwaddr offset,
1703                               uint64_t size)
1704 {
1705     memory_region_init(mr, owner, name, size);
1706     mr->alias = orig;
1707     mr->alias_offset = offset;
1708 }
1709 
1710 bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
1711                                       Object *owner,
1712                                       const char *name,
1713                                       uint64_t size,
1714                                       Error **errp)
1715 {
1716     if (!memory_region_init_ram_flags_nomigrate(mr, owner, name,
1717                                                 size, 0, errp)) {
1718          return false;
1719     }
1720     mr->readonly = true;
1721 
1722     return true;
1723 }
1724 
1725 bool memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1726                                              Object *owner,
1727                                              const MemoryRegionOps *ops,
1728                                              void *opaque,
1729                                              const char *name,
1730                                              uint64_t size,
1731                                              Error **errp)
1732 {
1733     Error *err = NULL;
1734     assert(ops);
1735     memory_region_init(mr, owner, name, size);
1736     mr->ops = ops;
1737     mr->opaque = opaque;
1738     mr->terminates = true;
1739     mr->rom_device = true;
1740     mr->destructor = memory_region_destructor_ram;
1741     mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1742     if (err) {
1743         mr->size = int128_zero();
1744         object_unparent(OBJECT(mr));
1745         error_propagate(errp, err);
1746         return false;
1747     }
1748     return true;
1749 }
1750 
1751 void memory_region_init_iommu(void *_iommu_mr,
1752                               size_t instance_size,
1753                               const char *mrtypename,
1754                               Object *owner,
1755                               const char *name,
1756                               uint64_t size)
1757 {
1758     struct IOMMUMemoryRegion *iommu_mr;
1759     struct MemoryRegion *mr;
1760 
1761     object_initialize(_iommu_mr, instance_size, mrtypename);
1762     mr = MEMORY_REGION(_iommu_mr);
1763     memory_region_do_init(mr, owner, name, size);
1764     iommu_mr = IOMMU_MEMORY_REGION(mr);
1765     mr->terminates = true;  /* then re-forwards */
1766     QLIST_INIT(&iommu_mr->iommu_notify);
1767     iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1768 }
1769 
1770 static void memory_region_finalize(Object *obj)
1771 {
1772     MemoryRegion *mr = MEMORY_REGION(obj);
1773 
1774     assert(!mr->container);
1775 
1776     /* We know the region is not visible in any address space (it
1777      * does not have a container and cannot be a root either because
1778      * it has no references, so we can blindly clear mr->enabled.
1779      * memory_region_set_enabled instead could trigger a transaction
1780      * and cause an infinite loop.
1781      */
1782     mr->enabled = false;
1783     memory_region_transaction_begin();
1784     while (!QTAILQ_EMPTY(&mr->subregions)) {
1785         MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1786         memory_region_del_subregion(mr, subregion);
1787     }
1788     memory_region_transaction_commit();
1789 
1790     mr->destructor(mr);
1791     memory_region_clear_coalescing(mr);
1792     g_free((char *)mr->name);
1793     g_free(mr->ioeventfds);
1794 }
1795 
1796 Object *memory_region_owner(MemoryRegion *mr)
1797 {
1798     Object *obj = OBJECT(mr);
1799     return obj->parent;
1800 }
1801 
1802 void memory_region_ref(MemoryRegion *mr)
1803 {
1804     /* MMIO callbacks most likely will access data that belongs
1805      * to the owner, hence the need to ref/unref the owner whenever
1806      * the memory region is in use.
1807      *
1808      * The memory region is a child of its owner.  As long as the
1809      * owner doesn't call unparent itself on the memory region,
1810      * ref-ing the owner will also keep the memory region alive.
1811      * Memory regions without an owner are supposed to never go away;
1812      * we do not ref/unref them because it slows down DMA sensibly.
1813      */
1814     if (mr && mr->owner) {
1815         object_ref(mr->owner);
1816     }
1817 }
1818 
1819 void memory_region_unref(MemoryRegion *mr)
1820 {
1821     if (mr && mr->owner) {
1822         object_unref(mr->owner);
1823     }
1824 }
1825 
1826 uint64_t memory_region_size(MemoryRegion *mr)
1827 {
1828     if (int128_eq(mr->size, int128_2_64())) {
1829         return UINT64_MAX;
1830     }
1831     return int128_get64(mr->size);
1832 }
1833 
1834 const char *memory_region_name(const MemoryRegion *mr)
1835 {
1836     if (!mr->name) {
1837         ((MemoryRegion *)mr)->name =
1838             g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1839     }
1840     return mr->name;
1841 }
1842 
1843 bool memory_region_is_ram_device(MemoryRegion *mr)
1844 {
1845     return mr->ram_device;
1846 }
1847 
1848 bool memory_region_is_protected(MemoryRegion *mr)
1849 {
1850     return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1851 }
1852 
1853 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1854 {
1855     uint8_t mask = mr->dirty_log_mask;
1856     RAMBlock *rb = mr->ram_block;
1857 
1858     if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1859                              memory_region_is_iommu(mr))) {
1860         mask |= (1 << DIRTY_MEMORY_MIGRATION);
1861     }
1862 
1863     if (tcg_enabled() && rb) {
1864         /* TCG only cares about dirty memory logging for RAM, not IOMMU.  */
1865         mask |= (1 << DIRTY_MEMORY_CODE);
1866     }
1867     return mask;
1868 }
1869 
1870 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1871 {
1872     return memory_region_get_dirty_log_mask(mr) & (1 << client);
1873 }
1874 
1875 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1876                                                    Error **errp)
1877 {
1878     IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1879     IOMMUNotifier *iommu_notifier;
1880     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1881     int ret = 0;
1882 
1883     IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1884         flags |= iommu_notifier->notifier_flags;
1885     }
1886 
1887     if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1888         ret = imrc->notify_flag_changed(iommu_mr,
1889                                         iommu_mr->iommu_notify_flags,
1890                                         flags, errp);
1891     }
1892 
1893     if (!ret) {
1894         iommu_mr->iommu_notify_flags = flags;
1895     }
1896     return ret;
1897 }
1898 
1899 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1900                                            uint64_t page_size_mask,
1901                                            Error **errp)
1902 {
1903     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1904     int ret = 0;
1905 
1906     if (imrc->iommu_set_page_size_mask) {
1907         ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1908     }
1909     return ret;
1910 }
1911 
1912 int memory_region_iommu_set_iova_ranges(IOMMUMemoryRegion *iommu_mr,
1913                                         GList *iova_ranges,
1914                                         Error **errp)
1915 {
1916     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1917     int ret = 0;
1918 
1919     if (imrc->iommu_set_iova_ranges) {
1920         ret = imrc->iommu_set_iova_ranges(iommu_mr, iova_ranges, errp);
1921     }
1922     return ret;
1923 }
1924 
1925 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1926                                           IOMMUNotifier *n, Error **errp)
1927 {
1928     IOMMUMemoryRegion *iommu_mr;
1929     int ret;
1930 
1931     if (mr->alias) {
1932         return memory_region_register_iommu_notifier(mr->alias, n, errp);
1933     }
1934 
1935     /* We need to register for at least one bitfield */
1936     iommu_mr = IOMMU_MEMORY_REGION(mr);
1937     assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1938     assert(n->start <= n->end);
1939     assert(n->iommu_idx >= 0 &&
1940            n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1941 
1942     QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1943     ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1944     if (ret) {
1945         QLIST_REMOVE(n, node);
1946     }
1947     return ret;
1948 }
1949 
1950 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1951 {
1952     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1953 
1954     if (imrc->get_min_page_size) {
1955         return imrc->get_min_page_size(iommu_mr);
1956     }
1957     return TARGET_PAGE_SIZE;
1958 }
1959 
1960 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1961 {
1962     MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1963     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1964     hwaddr addr, granularity;
1965     IOMMUTLBEntry iotlb;
1966 
1967     /* If the IOMMU has its own replay callback, override */
1968     if (imrc->replay) {
1969         imrc->replay(iommu_mr, n);
1970         return;
1971     }
1972 
1973     granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1974 
1975     for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1976         iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1977         if (iotlb.perm != IOMMU_NONE) {
1978             n->notify(n, &iotlb);
1979         }
1980 
1981         /* if (2^64 - MR size) < granularity, it's possible to get an
1982          * infinite loop here.  This should catch such a wraparound */
1983         if ((addr + granularity) < addr) {
1984             break;
1985         }
1986     }
1987 }
1988 
1989 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1990                                              IOMMUNotifier *n)
1991 {
1992     IOMMUMemoryRegion *iommu_mr;
1993 
1994     if (mr->alias) {
1995         memory_region_unregister_iommu_notifier(mr->alias, n);
1996         return;
1997     }
1998     QLIST_REMOVE(n, node);
1999     iommu_mr = IOMMU_MEMORY_REGION(mr);
2000     memory_region_update_iommu_notify_flags(iommu_mr, NULL);
2001 }
2002 
2003 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
2004                                     IOMMUTLBEvent *event)
2005 {
2006     IOMMUTLBEntry *entry = &event->entry;
2007     hwaddr entry_end = entry->iova + entry->addr_mask;
2008     IOMMUTLBEntry tmp = *entry;
2009 
2010     if (event->type == IOMMU_NOTIFIER_UNMAP) {
2011         assert(entry->perm == IOMMU_NONE);
2012     }
2013 
2014     /*
2015      * Skip the notification if the notification does not overlap
2016      * with registered range.
2017      */
2018     if (notifier->start > entry_end || notifier->end < entry->iova) {
2019         return;
2020     }
2021 
2022     if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2023         /* Crop (iova, addr_mask) to range */
2024         tmp.iova = MAX(tmp.iova, notifier->start);
2025         tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2026     } else {
2027         assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2028     }
2029 
2030     if (event->type & notifier->notifier_flags) {
2031         notifier->notify(notifier, &tmp);
2032     }
2033 }
2034 
2035 void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
2036 {
2037     IOMMUTLBEvent event;
2038 
2039     event.type = IOMMU_NOTIFIER_UNMAP;
2040     event.entry.target_as = &address_space_memory;
2041     event.entry.iova = notifier->start;
2042     event.entry.perm = IOMMU_NONE;
2043     event.entry.addr_mask = notifier->end - notifier->start;
2044 
2045     memory_region_notify_iommu_one(notifier, &event);
2046 }
2047 
2048 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2049                                 int iommu_idx,
2050                                 IOMMUTLBEvent event)
2051 {
2052     IOMMUNotifier *iommu_notifier;
2053 
2054     assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2055 
2056     IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2057         if (iommu_notifier->iommu_idx == iommu_idx) {
2058             memory_region_notify_iommu_one(iommu_notifier, &event);
2059         }
2060     }
2061 }
2062 
2063 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2064                                  enum IOMMUMemoryRegionAttr attr,
2065                                  void *data)
2066 {
2067     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2068 
2069     if (!imrc->get_attr) {
2070         return -EINVAL;
2071     }
2072 
2073     return imrc->get_attr(iommu_mr, attr, data);
2074 }
2075 
2076 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2077                                        MemTxAttrs attrs)
2078 {
2079     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2080 
2081     if (!imrc->attrs_to_index) {
2082         return 0;
2083     }
2084 
2085     return imrc->attrs_to_index(iommu_mr, attrs);
2086 }
2087 
2088 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2089 {
2090     IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2091 
2092     if (!imrc->num_indexes) {
2093         return 1;
2094     }
2095 
2096     return imrc->num_indexes(iommu_mr);
2097 }
2098 
2099 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2100 {
2101     if (!memory_region_is_ram(mr)) {
2102         return NULL;
2103     }
2104     return mr->rdm;
2105 }
2106 
2107 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2108                                            RamDiscardManager *rdm)
2109 {
2110     g_assert(memory_region_is_ram(mr));
2111     g_assert(!rdm || !mr->rdm);
2112     mr->rdm = rdm;
2113 }
2114 
2115 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2116                                                  const MemoryRegion *mr)
2117 {
2118     RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2119 
2120     g_assert(rdmc->get_min_granularity);
2121     return rdmc->get_min_granularity(rdm, mr);
2122 }
2123 
2124 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2125                                       const MemoryRegionSection *section)
2126 {
2127     RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2128 
2129     g_assert(rdmc->is_populated);
2130     return rdmc->is_populated(rdm, section);
2131 }
2132 
2133 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2134                                          MemoryRegionSection *section,
2135                                          ReplayRamPopulate replay_fn,
2136                                          void *opaque)
2137 {
2138     RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2139 
2140     g_assert(rdmc->replay_populated);
2141     return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2142 }
2143 
2144 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2145                                           MemoryRegionSection *section,
2146                                           ReplayRamDiscard replay_fn,
2147                                           void *opaque)
2148 {
2149     RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2150 
2151     g_assert(rdmc->replay_discarded);
2152     rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2153 }
2154 
2155 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2156                                            RamDiscardListener *rdl,
2157                                            MemoryRegionSection *section)
2158 {
2159     RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2160 
2161     g_assert(rdmc->register_listener);
2162     rdmc->register_listener(rdm, rdl, section);
2163 }
2164 
2165 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2166                                              RamDiscardListener *rdl)
2167 {
2168     RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2169 
2170     g_assert(rdmc->unregister_listener);
2171     rdmc->unregister_listener(rdm, rdl);
2172 }
2173 
2174 /* Called with rcu_read_lock held.  */
2175 bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2176                           ram_addr_t *ram_addr, bool *read_only,
2177                           bool *mr_has_discard_manager)
2178 {
2179     MemoryRegion *mr;
2180     hwaddr xlat;
2181     hwaddr len = iotlb->addr_mask + 1;
2182     bool writable = iotlb->perm & IOMMU_WO;
2183 
2184     if (mr_has_discard_manager) {
2185         *mr_has_discard_manager = false;
2186     }
2187     /*
2188      * The IOMMU TLB entry we have just covers translation through
2189      * this IOMMU to its immediate target.  We need to translate
2190      * it the rest of the way through to memory.
2191      */
2192     mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2193                                  &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2194     if (!memory_region_is_ram(mr)) {
2195         error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2196         return false;
2197     } else if (memory_region_has_ram_discard_manager(mr)) {
2198         RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2199         MemoryRegionSection tmp = {
2200             .mr = mr,
2201             .offset_within_region = xlat,
2202             .size = int128_make64(len),
2203         };
2204         if (mr_has_discard_manager) {
2205             *mr_has_discard_manager = true;
2206         }
2207         /*
2208          * Malicious VMs can map memory into the IOMMU, which is expected
2209          * to remain discarded. vfio will pin all pages, populating memory.
2210          * Disallow that. vmstate priorities make sure any RamDiscardManager
2211          * were already restored before IOMMUs are restored.
2212          */
2213         if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2214             error_report("iommu map to discarded memory (e.g., unplugged via"
2215                          " virtio-mem): %" HWADDR_PRIx "",
2216                          iotlb->translated_addr);
2217             return false;
2218         }
2219     }
2220 
2221     /*
2222      * Translation truncates length to the IOMMU page size,
2223      * check that it did not truncate too much.
2224      */
2225     if (len & iotlb->addr_mask) {
2226         error_report("iommu has granularity incompatible with target AS");
2227         return false;
2228     }
2229 
2230     if (vaddr) {
2231         *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2232     }
2233 
2234     if (ram_addr) {
2235         *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2236     }
2237 
2238     if (read_only) {
2239         *read_only = !writable || mr->readonly;
2240     }
2241 
2242     return true;
2243 }
2244 
2245 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2246 {
2247     uint8_t mask = 1 << client;
2248     uint8_t old_logging;
2249 
2250     assert(client == DIRTY_MEMORY_VGA);
2251     old_logging = mr->vga_logging_count;
2252     mr->vga_logging_count += log ? 1 : -1;
2253     if (!!old_logging == !!mr->vga_logging_count) {
2254         return;
2255     }
2256 
2257     memory_region_transaction_begin();
2258     mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2259     memory_region_update_pending |= mr->enabled;
2260     memory_region_transaction_commit();
2261 }
2262 
2263 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2264                              hwaddr size)
2265 {
2266     assert(mr->ram_block);
2267     cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2268                                         size,
2269                                         memory_region_get_dirty_log_mask(mr));
2270 }
2271 
2272 /*
2273  * If memory region `mr' is NULL, do global sync.  Otherwise, sync
2274  * dirty bitmap for the specified memory region.
2275  */
2276 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr, bool last_stage)
2277 {
2278     MemoryListener *listener;
2279     AddressSpace *as;
2280     FlatView *view;
2281     FlatRange *fr;
2282 
2283     /* If the same address space has multiple log_sync listeners, we
2284      * visit that address space's FlatView multiple times.  But because
2285      * log_sync listeners are rare, it's still cheaper than walking each
2286      * address space once.
2287      */
2288     QTAILQ_FOREACH(listener, &memory_listeners, link) {
2289         if (listener->log_sync) {
2290             as = listener->address_space;
2291             view = address_space_get_flatview(as);
2292             FOR_EACH_FLAT_RANGE(fr, view) {
2293                 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2294                     MemoryRegionSection mrs = section_from_flat_range(fr, view);
2295                     listener->log_sync(listener, &mrs);
2296                 }
2297             }
2298             flatview_unref(view);
2299             trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2300         } else if (listener->log_sync_global) {
2301             /*
2302              * No matter whether MR is specified, what we can do here
2303              * is to do a global sync, because we are not capable to
2304              * sync in a finer granularity.
2305              */
2306             listener->log_sync_global(listener, last_stage);
2307             trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2308         }
2309     }
2310 }
2311 
2312 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2313                                       hwaddr len)
2314 {
2315     MemoryRegionSection mrs;
2316     MemoryListener *listener;
2317     AddressSpace *as;
2318     FlatView *view;
2319     FlatRange *fr;
2320     hwaddr sec_start, sec_end, sec_size;
2321 
2322     QTAILQ_FOREACH(listener, &memory_listeners, link) {
2323         if (!listener->log_clear) {
2324             continue;
2325         }
2326         as = listener->address_space;
2327         view = address_space_get_flatview(as);
2328         FOR_EACH_FLAT_RANGE(fr, view) {
2329             if (!fr->dirty_log_mask || fr->mr != mr) {
2330                 /*
2331                  * Clear dirty bitmap operation only applies to those
2332                  * regions whose dirty logging is at least enabled
2333                  */
2334                 continue;
2335             }
2336 
2337             mrs = section_from_flat_range(fr, view);
2338 
2339             sec_start = MAX(mrs.offset_within_region, start);
2340             sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2341             sec_end = MIN(sec_end, start + len);
2342 
2343             if (sec_start >= sec_end) {
2344                 /*
2345                  * If this memory region section has no intersection
2346                  * with the requested range, skip.
2347                  */
2348                 continue;
2349             }
2350 
2351             /* Valid case; shrink the section if needed */
2352             mrs.offset_within_address_space +=
2353                 sec_start - mrs.offset_within_region;
2354             mrs.offset_within_region = sec_start;
2355             sec_size = sec_end - sec_start;
2356             mrs.size = int128_make64(sec_size);
2357             listener->log_clear(listener, &mrs);
2358         }
2359         flatview_unref(view);
2360     }
2361 }
2362 
2363 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2364                                                             hwaddr addr,
2365                                                             hwaddr size,
2366                                                             unsigned client)
2367 {
2368     DirtyBitmapSnapshot *snapshot;
2369     assert(mr->ram_block);
2370     memory_region_sync_dirty_bitmap(mr, false);
2371     snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2372     memory_global_after_dirty_log_sync();
2373     return snapshot;
2374 }
2375 
2376 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2377                                       hwaddr addr, hwaddr size)
2378 {
2379     assert(mr->ram_block);
2380     return cpu_physical_memory_snapshot_get_dirty(snap,
2381                 memory_region_get_ram_addr(mr) + addr, size);
2382 }
2383 
2384 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2385 {
2386     if (mr->readonly != readonly) {
2387         memory_region_transaction_begin();
2388         mr->readonly = readonly;
2389         memory_region_update_pending |= mr->enabled;
2390         memory_region_transaction_commit();
2391     }
2392 }
2393 
2394 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2395 {
2396     if (mr->nonvolatile != nonvolatile) {
2397         memory_region_transaction_begin();
2398         mr->nonvolatile = nonvolatile;
2399         memory_region_update_pending |= mr->enabled;
2400         memory_region_transaction_commit();
2401     }
2402 }
2403 
2404 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2405 {
2406     if (mr->romd_mode != romd_mode) {
2407         memory_region_transaction_begin();
2408         mr->romd_mode = romd_mode;
2409         memory_region_update_pending |= mr->enabled;
2410         memory_region_transaction_commit();
2411     }
2412 }
2413 
2414 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2415                                hwaddr size, unsigned client)
2416 {
2417     assert(mr->ram_block);
2418     cpu_physical_memory_test_and_clear_dirty(
2419         memory_region_get_ram_addr(mr) + addr, size, client);
2420 }
2421 
2422 int memory_region_get_fd(MemoryRegion *mr)
2423 {
2424     RCU_READ_LOCK_GUARD();
2425     while (mr->alias) {
2426         mr = mr->alias;
2427     }
2428     return mr->ram_block->fd;
2429 }
2430 
2431 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2432 {
2433     uint64_t offset = 0;
2434 
2435     RCU_READ_LOCK_GUARD();
2436     while (mr->alias) {
2437         offset += mr->alias_offset;
2438         mr = mr->alias;
2439     }
2440     assert(mr->ram_block);
2441     return qemu_map_ram_ptr(mr->ram_block, offset);
2442 }
2443 
2444 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2445 {
2446     RAMBlock *block;
2447 
2448     block = qemu_ram_block_from_host(ptr, false, offset);
2449     if (!block) {
2450         return NULL;
2451     }
2452 
2453     return block->mr;
2454 }
2455 
2456 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2457 {
2458     return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2459 }
2460 
2461 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2462 {
2463     assert(mr->ram_block);
2464 
2465     qemu_ram_resize(mr->ram_block, newsize, errp);
2466 }
2467 
2468 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2469 {
2470     if (mr->ram_block) {
2471         qemu_ram_msync(mr->ram_block, addr, size);
2472     }
2473 }
2474 
2475 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2476 {
2477     /*
2478      * Might be extended case needed to cover
2479      * different types of memory regions
2480      */
2481     if (mr->dirty_log_mask) {
2482         memory_region_msync(mr, addr, size);
2483     }
2484 }
2485 
2486 /*
2487  * Call proper memory listeners about the change on the newly
2488  * added/removed CoalescedMemoryRange.
2489  */
2490 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2491                                                  CoalescedMemoryRange *cmr,
2492                                                  bool add)
2493 {
2494     AddressSpace *as;
2495     FlatView *view;
2496     FlatRange *fr;
2497 
2498     QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2499         view = address_space_get_flatview(as);
2500         FOR_EACH_FLAT_RANGE(fr, view) {
2501             if (fr->mr == mr) {
2502                 flat_range_coalesced_io_notify(fr, as, cmr, add);
2503             }
2504         }
2505         flatview_unref(view);
2506     }
2507 }
2508 
2509 void memory_region_set_coalescing(MemoryRegion *mr)
2510 {
2511     memory_region_clear_coalescing(mr);
2512     memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2513 }
2514 
2515 void memory_region_add_coalescing(MemoryRegion *mr,
2516                                   hwaddr offset,
2517                                   uint64_t size)
2518 {
2519     CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2520 
2521     cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2522     QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2523     memory_region_update_coalesced_range(mr, cmr, true);
2524     memory_region_set_flush_coalesced(mr);
2525 }
2526 
2527 void memory_region_clear_coalescing(MemoryRegion *mr)
2528 {
2529     CoalescedMemoryRange *cmr;
2530 
2531     if (QTAILQ_EMPTY(&mr->coalesced)) {
2532         return;
2533     }
2534 
2535     qemu_flush_coalesced_mmio_buffer();
2536     mr->flush_coalesced_mmio = false;
2537 
2538     while (!QTAILQ_EMPTY(&mr->coalesced)) {
2539         cmr = QTAILQ_FIRST(&mr->coalesced);
2540         QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2541         memory_region_update_coalesced_range(mr, cmr, false);
2542         g_free(cmr);
2543     }
2544 }
2545 
2546 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2547 {
2548     mr->flush_coalesced_mmio = true;
2549 }
2550 
2551 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2552 {
2553     qemu_flush_coalesced_mmio_buffer();
2554     if (QTAILQ_EMPTY(&mr->coalesced)) {
2555         mr->flush_coalesced_mmio = false;
2556     }
2557 }
2558 
2559 void memory_region_add_eventfd(MemoryRegion *mr,
2560                                hwaddr addr,
2561                                unsigned size,
2562                                bool match_data,
2563                                uint64_t data,
2564                                EventNotifier *e)
2565 {
2566     MemoryRegionIoeventfd mrfd = {
2567         .addr.start = int128_make64(addr),
2568         .addr.size = int128_make64(size),
2569         .match_data = match_data,
2570         .data = data,
2571         .e = e,
2572     };
2573     unsigned i;
2574 
2575     if (size) {
2576         adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2577     }
2578     memory_region_transaction_begin();
2579     for (i = 0; i < mr->ioeventfd_nb; ++i) {
2580         if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2581             break;
2582         }
2583     }
2584     ++mr->ioeventfd_nb;
2585     mr->ioeventfds = g_realloc(mr->ioeventfds,
2586                                   sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2587     memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2588             sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2589     mr->ioeventfds[i] = mrfd;
2590     ioeventfd_update_pending |= mr->enabled;
2591     memory_region_transaction_commit();
2592 }
2593 
2594 void memory_region_del_eventfd(MemoryRegion *mr,
2595                                hwaddr addr,
2596                                unsigned size,
2597                                bool match_data,
2598                                uint64_t data,
2599                                EventNotifier *e)
2600 {
2601     MemoryRegionIoeventfd mrfd = {
2602         .addr.start = int128_make64(addr),
2603         .addr.size = int128_make64(size),
2604         .match_data = match_data,
2605         .data = data,
2606         .e = e,
2607     };
2608     unsigned i;
2609 
2610     if (size) {
2611         adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2612     }
2613     memory_region_transaction_begin();
2614     for (i = 0; i < mr->ioeventfd_nb; ++i) {
2615         if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2616             break;
2617         }
2618     }
2619     assert(i != mr->ioeventfd_nb);
2620     memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2621             sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2622     --mr->ioeventfd_nb;
2623     mr->ioeventfds = g_realloc(mr->ioeventfds,
2624                                   sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2625     ioeventfd_update_pending |= mr->enabled;
2626     memory_region_transaction_commit();
2627 }
2628 
2629 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2630 {
2631     MemoryRegion *mr = subregion->container;
2632     MemoryRegion *other;
2633 
2634     memory_region_transaction_begin();
2635 
2636     memory_region_ref(subregion);
2637     QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2638         if (subregion->priority >= other->priority) {
2639             QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2640             goto done;
2641         }
2642     }
2643     QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2644 done:
2645     memory_region_update_pending |= mr->enabled && subregion->enabled;
2646     memory_region_transaction_commit();
2647 }
2648 
2649 static void memory_region_add_subregion_common(MemoryRegion *mr,
2650                                                hwaddr offset,
2651                                                MemoryRegion *subregion)
2652 {
2653     MemoryRegion *alias;
2654 
2655     assert(!subregion->container);
2656     subregion->container = mr;
2657     for (alias = subregion->alias; alias; alias = alias->alias) {
2658         alias->mapped_via_alias++;
2659     }
2660     subregion->addr = offset;
2661     memory_region_update_container_subregions(subregion);
2662 }
2663 
2664 void memory_region_add_subregion(MemoryRegion *mr,
2665                                  hwaddr offset,
2666                                  MemoryRegion *subregion)
2667 {
2668     subregion->priority = 0;
2669     memory_region_add_subregion_common(mr, offset, subregion);
2670 }
2671 
2672 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2673                                          hwaddr offset,
2674                                          MemoryRegion *subregion,
2675                                          int priority)
2676 {
2677     subregion->priority = priority;
2678     memory_region_add_subregion_common(mr, offset, subregion);
2679 }
2680 
2681 void memory_region_del_subregion(MemoryRegion *mr,
2682                                  MemoryRegion *subregion)
2683 {
2684     MemoryRegion *alias;
2685 
2686     memory_region_transaction_begin();
2687     assert(subregion->container == mr);
2688     subregion->container = NULL;
2689     for (alias = subregion->alias; alias; alias = alias->alias) {
2690         alias->mapped_via_alias--;
2691         assert(alias->mapped_via_alias >= 0);
2692     }
2693     QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2694     memory_region_unref(subregion);
2695     memory_region_update_pending |= mr->enabled && subregion->enabled;
2696     memory_region_transaction_commit();
2697 }
2698 
2699 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2700 {
2701     if (enabled == mr->enabled) {
2702         return;
2703     }
2704     memory_region_transaction_begin();
2705     mr->enabled = enabled;
2706     memory_region_update_pending = true;
2707     memory_region_transaction_commit();
2708 }
2709 
2710 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2711 {
2712     Int128 s = int128_make64(size);
2713 
2714     if (size == UINT64_MAX) {
2715         s = int128_2_64();
2716     }
2717     if (int128_eq(s, mr->size)) {
2718         return;
2719     }
2720     memory_region_transaction_begin();
2721     mr->size = s;
2722     memory_region_update_pending = true;
2723     memory_region_transaction_commit();
2724 }
2725 
2726 static void memory_region_readd_subregion(MemoryRegion *mr)
2727 {
2728     MemoryRegion *container = mr->container;
2729 
2730     if (container) {
2731         memory_region_transaction_begin();
2732         memory_region_ref(mr);
2733         memory_region_del_subregion(container, mr);
2734         memory_region_add_subregion_common(container, mr->addr, mr);
2735         memory_region_unref(mr);
2736         memory_region_transaction_commit();
2737     }
2738 }
2739 
2740 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2741 {
2742     if (addr != mr->addr) {
2743         mr->addr = addr;
2744         memory_region_readd_subregion(mr);
2745     }
2746 }
2747 
2748 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2749 {
2750     assert(mr->alias);
2751 
2752     if (offset == mr->alias_offset) {
2753         return;
2754     }
2755 
2756     memory_region_transaction_begin();
2757     mr->alias_offset = offset;
2758     memory_region_update_pending |= mr->enabled;
2759     memory_region_transaction_commit();
2760 }
2761 
2762 void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable)
2763 {
2764     if (unmergeable == mr->unmergeable) {
2765         return;
2766     }
2767 
2768     memory_region_transaction_begin();
2769     mr->unmergeable = unmergeable;
2770     memory_region_update_pending |= mr->enabled;
2771     memory_region_transaction_commit();
2772 }
2773 
2774 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2775 {
2776     return mr->align;
2777 }
2778 
2779 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2780 {
2781     const AddrRange *addr = addr_;
2782     const FlatRange *fr = fr_;
2783 
2784     if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2785         return -1;
2786     } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2787         return 1;
2788     }
2789     return 0;
2790 }
2791 
2792 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2793 {
2794     return bsearch(&addr, view->ranges, view->nr,
2795                    sizeof(FlatRange), cmp_flatrange_addr);
2796 }
2797 
2798 bool memory_region_is_mapped(MemoryRegion *mr)
2799 {
2800     return !!mr->container || mr->mapped_via_alias;
2801 }
2802 
2803 /* Same as memory_region_find, but it does not add a reference to the
2804  * returned region.  It must be called from an RCU critical section.
2805  */
2806 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2807                                                   hwaddr addr, uint64_t size)
2808 {
2809     MemoryRegionSection ret = { .mr = NULL };
2810     MemoryRegion *root;
2811     AddressSpace *as;
2812     AddrRange range;
2813     FlatView *view;
2814     FlatRange *fr;
2815 
2816     addr += mr->addr;
2817     for (root = mr; root->container; ) {
2818         root = root->container;
2819         addr += root->addr;
2820     }
2821 
2822     as = memory_region_to_address_space(root);
2823     if (!as) {
2824         return ret;
2825     }
2826     range = addrrange_make(int128_make64(addr), int128_make64(size));
2827 
2828     view = address_space_to_flatview(as);
2829     fr = flatview_lookup(view, range);
2830     if (!fr) {
2831         return ret;
2832     }
2833 
2834     while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2835         --fr;
2836     }
2837 
2838     ret.mr = fr->mr;
2839     ret.fv = view;
2840     range = addrrange_intersection(range, fr->addr);
2841     ret.offset_within_region = fr->offset_in_region;
2842     ret.offset_within_region += int128_get64(int128_sub(range.start,
2843                                                         fr->addr.start));
2844     ret.size = range.size;
2845     ret.offset_within_address_space = int128_get64(range.start);
2846     ret.readonly = fr->readonly;
2847     ret.nonvolatile = fr->nonvolatile;
2848     return ret;
2849 }
2850 
2851 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2852                                        hwaddr addr, uint64_t size)
2853 {
2854     MemoryRegionSection ret;
2855     RCU_READ_LOCK_GUARD();
2856     ret = memory_region_find_rcu(mr, addr, size);
2857     if (ret.mr) {
2858         memory_region_ref(ret.mr);
2859     }
2860     return ret;
2861 }
2862 
2863 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2864 {
2865     MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2866 
2867     *tmp = *s;
2868     if (tmp->mr) {
2869         memory_region_ref(tmp->mr);
2870     }
2871     if (tmp->fv) {
2872         bool ret  = flatview_ref(tmp->fv);
2873 
2874         g_assert(ret);
2875     }
2876     return tmp;
2877 }
2878 
2879 void memory_region_section_free_copy(MemoryRegionSection *s)
2880 {
2881     if (s->fv) {
2882         flatview_unref(s->fv);
2883     }
2884     if (s->mr) {
2885         memory_region_unref(s->mr);
2886     }
2887     g_free(s);
2888 }
2889 
2890 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2891 {
2892     MemoryRegion *mr;
2893 
2894     RCU_READ_LOCK_GUARD();
2895     mr = memory_region_find_rcu(container, addr, 1).mr;
2896     return mr && mr != container;
2897 }
2898 
2899 void memory_global_dirty_log_sync(bool last_stage)
2900 {
2901     memory_region_sync_dirty_bitmap(NULL, last_stage);
2902 }
2903 
2904 void memory_global_after_dirty_log_sync(void)
2905 {
2906     MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2907 }
2908 
2909 /*
2910  * Dirty track stop flags that are postponed due to VM being stopped.  Should
2911  * only be used within vmstate_change hook.
2912  */
2913 static unsigned int postponed_stop_flags;
2914 static VMChangeStateEntry *vmstate_change;
2915 static void memory_global_dirty_log_stop_postponed_run(void);
2916 
2917 static bool memory_global_dirty_log_do_start(Error **errp)
2918 {
2919     MemoryListener *listener;
2920 
2921     QTAILQ_FOREACH(listener, &memory_listeners, link) {
2922         if (listener->log_global_start) {
2923             if (!listener->log_global_start(listener, errp)) {
2924                 goto err;
2925             }
2926         }
2927     }
2928     return true;
2929 
2930 err:
2931     while ((listener = QTAILQ_PREV(listener, link)) != NULL) {
2932         if (listener->log_global_stop) {
2933             listener->log_global_stop(listener);
2934         }
2935     }
2936 
2937     return false;
2938 }
2939 
2940 bool memory_global_dirty_log_start(unsigned int flags, Error **errp)
2941 {
2942     unsigned int old_flags;
2943 
2944     assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2945 
2946     if (vmstate_change) {
2947         /* If there is postponed stop(), operate on it first */
2948         postponed_stop_flags &= ~flags;
2949         memory_global_dirty_log_stop_postponed_run();
2950     }
2951 
2952     flags &= ~global_dirty_tracking;
2953     if (!flags) {
2954         return true;
2955     }
2956 
2957     old_flags = global_dirty_tracking;
2958     global_dirty_tracking |= flags;
2959     trace_global_dirty_changed(global_dirty_tracking);
2960 
2961     if (!old_flags) {
2962         if (!memory_global_dirty_log_do_start(errp)) {
2963             global_dirty_tracking &= ~flags;
2964             trace_global_dirty_changed(global_dirty_tracking);
2965             return false;
2966         }
2967 
2968         memory_region_transaction_begin();
2969         memory_region_update_pending = true;
2970         memory_region_transaction_commit();
2971     }
2972     return true;
2973 }
2974 
2975 static void memory_global_dirty_log_do_stop(unsigned int flags)
2976 {
2977     assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2978     assert((global_dirty_tracking & flags) == flags);
2979     global_dirty_tracking &= ~flags;
2980 
2981     trace_global_dirty_changed(global_dirty_tracking);
2982 
2983     if (!global_dirty_tracking) {
2984         memory_region_transaction_begin();
2985         memory_region_update_pending = true;
2986         memory_region_transaction_commit();
2987         MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2988     }
2989 }
2990 
2991 /*
2992  * Execute the postponed dirty log stop operations if there is, then reset
2993  * everything (including the flags and the vmstate change hook).
2994  */
2995 static void memory_global_dirty_log_stop_postponed_run(void)
2996 {
2997     /* This must be called with the vmstate handler registered */
2998     assert(vmstate_change);
2999 
3000     /* Note: postponed_stop_flags can be cleared in log start routine */
3001     if (postponed_stop_flags) {
3002         memory_global_dirty_log_do_stop(postponed_stop_flags);
3003         postponed_stop_flags = 0;
3004     }
3005 
3006     qemu_del_vm_change_state_handler(vmstate_change);
3007     vmstate_change = NULL;
3008 }
3009 
3010 static void memory_vm_change_state_handler(void *opaque, bool running,
3011                                            RunState state)
3012 {
3013     if (running) {
3014         memory_global_dirty_log_stop_postponed_run();
3015     }
3016 }
3017 
3018 void memory_global_dirty_log_stop(unsigned int flags)
3019 {
3020     if (!runstate_is_running()) {
3021         /* Postpone the dirty log stop, e.g., to when VM starts again */
3022         if (vmstate_change) {
3023             /* Batch with previous postponed flags */
3024             postponed_stop_flags |= flags;
3025         } else {
3026             postponed_stop_flags = flags;
3027             vmstate_change = qemu_add_vm_change_state_handler(
3028                 memory_vm_change_state_handler, NULL);
3029         }
3030         return;
3031     }
3032 
3033     memory_global_dirty_log_do_stop(flags);
3034 }
3035 
3036 static void listener_add_address_space(MemoryListener *listener,
3037                                        AddressSpace *as)
3038 {
3039     FlatView *view;
3040     FlatRange *fr;
3041 
3042     if (listener->begin) {
3043         listener->begin(listener);
3044     }
3045     if (global_dirty_tracking) {
3046         /*
3047          * Currently only VFIO can fail log_global_start(), and it's not
3048          * yet allowed to hotplug any PCI device during migration. So this
3049          * should never fail when invoked, guard it with error_abort.  If
3050          * it can start to fail in the future, we need to be able to fail
3051          * the whole listener_add_address_space() and its callers.
3052          */
3053         if (listener->log_global_start) {
3054             listener->log_global_start(listener, &error_abort);
3055         }
3056     }
3057 
3058     view = address_space_get_flatview(as);
3059     FOR_EACH_FLAT_RANGE(fr, view) {
3060         MemoryRegionSection section = section_from_flat_range(fr, view);
3061 
3062         if (listener->region_add) {
3063             listener->region_add(listener, &section);
3064         }
3065         if (fr->dirty_log_mask && listener->log_start) {
3066             listener->log_start(listener, &section, 0, fr->dirty_log_mask);
3067         }
3068     }
3069     if (listener->commit) {
3070         listener->commit(listener);
3071     }
3072     flatview_unref(view);
3073 }
3074 
3075 static void listener_del_address_space(MemoryListener *listener,
3076                                        AddressSpace *as)
3077 {
3078     FlatView *view;
3079     FlatRange *fr;
3080 
3081     if (listener->begin) {
3082         listener->begin(listener);
3083     }
3084     view = address_space_get_flatview(as);
3085     FOR_EACH_FLAT_RANGE(fr, view) {
3086         MemoryRegionSection section = section_from_flat_range(fr, view);
3087 
3088         if (fr->dirty_log_mask && listener->log_stop) {
3089             listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3090         }
3091         if (listener->region_del) {
3092             listener->region_del(listener, &section);
3093         }
3094     }
3095     if (listener->commit) {
3096         listener->commit(listener);
3097     }
3098     flatview_unref(view);
3099 }
3100 
3101 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
3102 {
3103     MemoryListener *other = NULL;
3104 
3105     /* Only one of them can be defined for a listener */
3106     assert(!(listener->log_sync && listener->log_sync_global));
3107 
3108     listener->address_space = as;
3109     if (QTAILQ_EMPTY(&memory_listeners)
3110         || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3111         QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3112     } else {
3113         QTAILQ_FOREACH(other, &memory_listeners, link) {
3114             if (listener->priority < other->priority) {
3115                 break;
3116             }
3117         }
3118         QTAILQ_INSERT_BEFORE(other, listener, link);
3119     }
3120 
3121     if (QTAILQ_EMPTY(&as->listeners)
3122         || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3123         QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3124     } else {
3125         QTAILQ_FOREACH(other, &as->listeners, link_as) {
3126             if (listener->priority < other->priority) {
3127                 break;
3128             }
3129         }
3130         QTAILQ_INSERT_BEFORE(other, listener, link_as);
3131     }
3132 
3133     listener_add_address_space(listener, as);
3134 
3135     if (listener->eventfd_add || listener->eventfd_del) {
3136         as->ioeventfd_notifiers++;
3137     }
3138 }
3139 
3140 void memory_listener_unregister(MemoryListener *listener)
3141 {
3142     if (!listener->address_space) {
3143         return;
3144     }
3145 
3146     if (listener->eventfd_add || listener->eventfd_del) {
3147         listener->address_space->ioeventfd_notifiers--;
3148     }
3149 
3150     listener_del_address_space(listener, listener->address_space);
3151     QTAILQ_REMOVE(&memory_listeners, listener, link);
3152     QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3153     listener->address_space = NULL;
3154 }
3155 
3156 void address_space_remove_listeners(AddressSpace *as)
3157 {
3158     while (!QTAILQ_EMPTY(&as->listeners)) {
3159         memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3160     }
3161 }
3162 
3163 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3164 {
3165     memory_region_ref(root);
3166     as->root = root;
3167     as->current_map = NULL;
3168     as->ioeventfd_nb = 0;
3169     as->ioeventfds = NULL;
3170     QTAILQ_INIT(&as->listeners);
3171     QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3172     as->name = g_strdup(name ? name : "anonymous");
3173     address_space_update_topology(as);
3174     address_space_update_ioeventfds(as);
3175 }
3176 
3177 static void do_address_space_destroy(AddressSpace *as)
3178 {
3179     assert(QTAILQ_EMPTY(&as->listeners));
3180 
3181     flatview_unref(as->current_map);
3182     g_free(as->name);
3183     g_free(as->ioeventfds);
3184     memory_region_unref(as->root);
3185 }
3186 
3187 void address_space_destroy(AddressSpace *as)
3188 {
3189     MemoryRegion *root = as->root;
3190 
3191     /* Flush out anything from MemoryListeners listening in on this */
3192     memory_region_transaction_begin();
3193     as->root = NULL;
3194     memory_region_transaction_commit();
3195     QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3196 
3197     /* At this point, as->dispatch and as->current_map are dummy
3198      * entries that the guest should never use.  Wait for the old
3199      * values to expire before freeing the data.
3200      */
3201     as->root = root;
3202     call_rcu(as, do_address_space_destroy, rcu);
3203 }
3204 
3205 static const char *memory_region_type(MemoryRegion *mr)
3206 {
3207     if (mr->alias) {
3208         return memory_region_type(mr->alias);
3209     }
3210     if (memory_region_is_ram_device(mr)) {
3211         return "ramd";
3212     } else if (memory_region_is_romd(mr)) {
3213         return "romd";
3214     } else if (memory_region_is_rom(mr)) {
3215         return "rom";
3216     } else if (memory_region_is_ram(mr)) {
3217         return "ram";
3218     } else {
3219         return "i/o";
3220     }
3221 }
3222 
3223 typedef struct MemoryRegionList MemoryRegionList;
3224 
3225 struct MemoryRegionList {
3226     const MemoryRegion *mr;
3227     QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3228 };
3229 
3230 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3231 
3232 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3233                            int128_sub((size), int128_one())) : 0)
3234 #define MTREE_INDENT "  "
3235 
3236 static void mtree_expand_owner(const char *label, Object *obj)
3237 {
3238     DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3239 
3240     qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3241     if (dev && dev->id) {
3242         qemu_printf(" id=%s", dev->id);
3243     } else {
3244         char *canonical_path = object_get_canonical_path(obj);
3245         if (canonical_path) {
3246             qemu_printf(" path=%s", canonical_path);
3247             g_free(canonical_path);
3248         } else {
3249             qemu_printf(" type=%s", object_get_typename(obj));
3250         }
3251     }
3252     qemu_printf("}");
3253 }
3254 
3255 static void mtree_print_mr_owner(const MemoryRegion *mr)
3256 {
3257     Object *owner = mr->owner;
3258     Object *parent = memory_region_owner((MemoryRegion *)mr);
3259 
3260     if (!owner && !parent) {
3261         qemu_printf(" orphan");
3262         return;
3263     }
3264     if (owner) {
3265         mtree_expand_owner("owner", owner);
3266     }
3267     if (parent && parent != owner) {
3268         mtree_expand_owner("parent", parent);
3269     }
3270 }
3271 
3272 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3273                            hwaddr base,
3274                            MemoryRegionListHead *alias_print_queue,
3275                            bool owner, bool display_disabled)
3276 {
3277     MemoryRegionList *new_ml, *ml, *next_ml;
3278     MemoryRegionListHead submr_print_queue;
3279     const MemoryRegion *submr;
3280     unsigned int i;
3281     hwaddr cur_start, cur_end;
3282 
3283     if (!mr) {
3284         return;
3285     }
3286 
3287     cur_start = base + mr->addr;
3288     cur_end = cur_start + MR_SIZE(mr->size);
3289 
3290     /*
3291      * Try to detect overflow of memory region. This should never
3292      * happen normally. When it happens, we dump something to warn the
3293      * user who is observing this.
3294      */
3295     if (cur_start < base || cur_end < cur_start) {
3296         qemu_printf("[DETECTED OVERFLOW!] ");
3297     }
3298 
3299     if (mr->alias) {
3300         bool found = false;
3301 
3302         /* check if the alias is already in the queue */
3303         QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3304             if (ml->mr == mr->alias) {
3305                 found = true;
3306             }
3307         }
3308 
3309         if (!found) {
3310             ml = g_new(MemoryRegionList, 1);
3311             ml->mr = mr->alias;
3312             QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3313         }
3314         if (mr->enabled || display_disabled) {
3315             for (i = 0; i < level; i++) {
3316                 qemu_printf(MTREE_INDENT);
3317             }
3318             qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3319                         " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3320                         "-" HWADDR_FMT_plx "%s",
3321                         cur_start, cur_end,
3322                         mr->priority,
3323                         mr->nonvolatile ? "nv-" : "",
3324                         memory_region_type((MemoryRegion *)mr),
3325                         memory_region_name(mr),
3326                         memory_region_name(mr->alias),
3327                         mr->alias_offset,
3328                         mr->alias_offset + MR_SIZE(mr->size),
3329                         mr->enabled ? "" : " [disabled]");
3330             if (owner) {
3331                 mtree_print_mr_owner(mr);
3332             }
3333             qemu_printf("\n");
3334         }
3335     } else {
3336         if (mr->enabled || display_disabled) {
3337             for (i = 0; i < level; i++) {
3338                 qemu_printf(MTREE_INDENT);
3339             }
3340             qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3341                         " (prio %d, %s%s): %s%s",
3342                         cur_start, cur_end,
3343                         mr->priority,
3344                         mr->nonvolatile ? "nv-" : "",
3345                         memory_region_type((MemoryRegion *)mr),
3346                         memory_region_name(mr),
3347                         mr->enabled ? "" : " [disabled]");
3348             if (owner) {
3349                 mtree_print_mr_owner(mr);
3350             }
3351             qemu_printf("\n");
3352         }
3353     }
3354 
3355     QTAILQ_INIT(&submr_print_queue);
3356 
3357     QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3358         new_ml = g_new(MemoryRegionList, 1);
3359         new_ml->mr = submr;
3360         QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3361             if (new_ml->mr->addr < ml->mr->addr ||
3362                 (new_ml->mr->addr == ml->mr->addr &&
3363                  new_ml->mr->priority > ml->mr->priority)) {
3364                 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3365                 new_ml = NULL;
3366                 break;
3367             }
3368         }
3369         if (new_ml) {
3370             QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3371         }
3372     }
3373 
3374     QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3375         mtree_print_mr(ml->mr, level + 1, cur_start,
3376                        alias_print_queue, owner, display_disabled);
3377     }
3378 
3379     QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3380         g_free(ml);
3381     }
3382 }
3383 
3384 struct FlatViewInfo {
3385     int counter;
3386     bool dispatch_tree;
3387     bool owner;
3388     AccelClass *ac;
3389 };
3390 
3391 static void mtree_print_flatview(gpointer key, gpointer value,
3392                                  gpointer user_data)
3393 {
3394     FlatView *view = key;
3395     GArray *fv_address_spaces = value;
3396     struct FlatViewInfo *fvi = user_data;
3397     FlatRange *range = &view->ranges[0];
3398     MemoryRegion *mr;
3399     int n = view->nr;
3400     int i;
3401     AddressSpace *as;
3402 
3403     qemu_printf("FlatView #%d\n", fvi->counter);
3404     ++fvi->counter;
3405 
3406     for (i = 0; i < fv_address_spaces->len; ++i) {
3407         as = g_array_index(fv_address_spaces, AddressSpace*, i);
3408         qemu_printf(" AS \"%s\", root: %s",
3409                     as->name, memory_region_name(as->root));
3410         if (as->root->alias) {
3411             qemu_printf(", alias %s", memory_region_name(as->root->alias));
3412         }
3413         qemu_printf("\n");
3414     }
3415 
3416     qemu_printf(" Root memory region: %s\n",
3417       view->root ? memory_region_name(view->root) : "(none)");
3418 
3419     if (n <= 0) {
3420         qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3421         return;
3422     }
3423 
3424     while (n--) {
3425         mr = range->mr;
3426         if (range->offset_in_region) {
3427             qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3428                         " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
3429                         int128_get64(range->addr.start),
3430                         int128_get64(range->addr.start)
3431                         + MR_SIZE(range->addr.size),
3432                         mr->priority,
3433                         range->nonvolatile ? "nv-" : "",
3434                         range->readonly ? "rom" : memory_region_type(mr),
3435                         memory_region_name(mr),
3436                         range->offset_in_region);
3437         } else {
3438             qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3439                         " (prio %d, %s%s): %s",
3440                         int128_get64(range->addr.start),
3441                         int128_get64(range->addr.start)
3442                         + MR_SIZE(range->addr.size),
3443                         mr->priority,
3444                         range->nonvolatile ? "nv-" : "",
3445                         range->readonly ? "rom" : memory_region_type(mr),
3446                         memory_region_name(mr));
3447         }
3448         if (fvi->owner) {
3449             mtree_print_mr_owner(mr);
3450         }
3451 
3452         if (fvi->ac) {
3453             for (i = 0; i < fv_address_spaces->len; ++i) {
3454                 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3455                 if (fvi->ac->has_memory(current_machine, as,
3456                                         int128_get64(range->addr.start),
3457                                         MR_SIZE(range->addr.size) + 1)) {
3458                     qemu_printf(" %s", fvi->ac->name);
3459                 }
3460             }
3461         }
3462         qemu_printf("\n");
3463         range++;
3464     }
3465 
3466 #if !defined(CONFIG_USER_ONLY)
3467     if (fvi->dispatch_tree && view->root) {
3468         mtree_print_dispatch(view->dispatch, view->root);
3469     }
3470 #endif
3471 
3472     qemu_printf("\n");
3473 }
3474 
3475 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3476                                       gpointer user_data)
3477 {
3478     FlatView *view = key;
3479     GArray *fv_address_spaces = value;
3480 
3481     g_array_unref(fv_address_spaces);
3482     flatview_unref(view);
3483 
3484     return true;
3485 }
3486 
3487 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3488 {
3489     struct FlatViewInfo fvi = {
3490         .counter = 0,
3491         .dispatch_tree = dispatch_tree,
3492         .owner = owner,
3493     };
3494     AddressSpace *as;
3495     FlatView *view;
3496     GArray *fv_address_spaces;
3497     GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3498     AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3499 
3500     if (ac->has_memory) {
3501         fvi.ac = ac;
3502     }
3503 
3504     /* Gather all FVs in one table */
3505     QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3506         view = address_space_get_flatview(as);
3507 
3508         fv_address_spaces = g_hash_table_lookup(views, view);
3509         if (!fv_address_spaces) {
3510             fv_address_spaces = g_array_new(false, false, sizeof(as));
3511             g_hash_table_insert(views, view, fv_address_spaces);
3512         }
3513 
3514         g_array_append_val(fv_address_spaces, as);
3515     }
3516 
3517     /* Print */
3518     g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3519 
3520     /* Free */
3521     g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3522     g_hash_table_unref(views);
3523 }
3524 
3525 struct AddressSpaceInfo {
3526     MemoryRegionListHead *ml_head;
3527     bool owner;
3528     bool disabled;
3529 };
3530 
3531 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3532 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3533 {
3534     const AddressSpace *as_a = a;
3535     const AddressSpace *as_b = b;
3536 
3537     return g_strcmp0(as_a->name, as_b->name);
3538 }
3539 
3540 static void mtree_print_as_name(gpointer data, gpointer user_data)
3541 {
3542     AddressSpace *as = data;
3543 
3544     qemu_printf("address-space: %s\n", as->name);
3545 }
3546 
3547 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3548 {
3549     MemoryRegion *mr = key;
3550     GSList *as_same_root_mr_list = value;
3551     struct AddressSpaceInfo *asi = user_data;
3552 
3553     g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3554     mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3555     qemu_printf("\n");
3556 }
3557 
3558 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3559                                    gpointer user_data)
3560 {
3561     GSList *as_same_root_mr_list = value;
3562 
3563     g_slist_free(as_same_root_mr_list);
3564 
3565     return true;
3566 }
3567 
3568 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3569 {
3570     MemoryRegionListHead ml_head;
3571     MemoryRegionList *ml, *ml2;
3572     AddressSpace *as;
3573     GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3574     GSList *as_same_root_mr_list;
3575     struct AddressSpaceInfo asi = {
3576         .ml_head = &ml_head,
3577         .owner = owner,
3578         .disabled = disabled,
3579     };
3580 
3581     QTAILQ_INIT(&ml_head);
3582 
3583     QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3584         /* Create hashtable, key=AS root MR, value = list of AS */
3585         as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3586         as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3587                                                      address_space_compare_name);
3588         g_hash_table_insert(views, as->root, as_same_root_mr_list);
3589     }
3590 
3591     /* print address spaces */
3592     g_hash_table_foreach(views, mtree_print_as, &asi);
3593     g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3594     g_hash_table_unref(views);
3595 
3596     /* print aliased regions */
3597     QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3598         qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3599         mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3600         qemu_printf("\n");
3601     }
3602 
3603     QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3604         g_free(ml);
3605     }
3606 }
3607 
3608 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3609 {
3610     if (flatview) {
3611         mtree_info_flatview(dispatch_tree, owner);
3612     } else {
3613         mtree_info_as(dispatch_tree, owner, disabled);
3614     }
3615 }
3616 
3617 bool memory_region_init_ram(MemoryRegion *mr,
3618                             Object *owner,
3619                             const char *name,
3620                             uint64_t size,
3621                             Error **errp)
3622 {
3623     DeviceState *owner_dev;
3624 
3625     if (!memory_region_init_ram_nomigrate(mr, owner, name, size, errp)) {
3626         return false;
3627     }
3628     /* This will assert if owner is neither NULL nor a DeviceState.
3629      * We only want the owner here for the purposes of defining a
3630      * unique name for migration. TODO: Ideally we should implement
3631      * a naming scheme for Objects which are not DeviceStates, in
3632      * which case we can relax this restriction.
3633      */
3634     owner_dev = DEVICE(owner);
3635     vmstate_register_ram(mr, owner_dev);
3636 
3637     return true;
3638 }
3639 
3640 bool memory_region_init_rom(MemoryRegion *mr,
3641                             Object *owner,
3642                             const char *name,
3643                             uint64_t size,
3644                             Error **errp)
3645 {
3646     DeviceState *owner_dev;
3647 
3648     if (!memory_region_init_rom_nomigrate(mr, owner, name, size, errp)) {
3649         return false;
3650     }
3651     /* This will assert if owner is neither NULL nor a DeviceState.
3652      * We only want the owner here for the purposes of defining a
3653      * unique name for migration. TODO: Ideally we should implement
3654      * a naming scheme for Objects which are not DeviceStates, in
3655      * which case we can relax this restriction.
3656      */
3657     owner_dev = DEVICE(owner);
3658     vmstate_register_ram(mr, owner_dev);
3659 
3660     return true;
3661 }
3662 
3663 bool memory_region_init_rom_device(MemoryRegion *mr,
3664                                    Object *owner,
3665                                    const MemoryRegionOps *ops,
3666                                    void *opaque,
3667                                    const char *name,
3668                                    uint64_t size,
3669                                    Error **errp)
3670 {
3671     DeviceState *owner_dev;
3672 
3673     if (!memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3674                                                  name, size, errp)) {
3675         return false;
3676     }
3677     /* This will assert if owner is neither NULL nor a DeviceState.
3678      * We only want the owner here for the purposes of defining a
3679      * unique name for migration. TODO: Ideally we should implement
3680      * a naming scheme for Objects which are not DeviceStates, in
3681      * which case we can relax this restriction.
3682      */
3683     owner_dev = DEVICE(owner);
3684     vmstate_register_ram(mr, owner_dev);
3685 
3686     return true;
3687 }
3688 
3689 /*
3690  * Support system builds with CONFIG_FUZZ using a weak symbol and a stub for
3691  * the fuzz_dma_read_cb callback
3692  */
3693 #ifdef CONFIG_FUZZ
3694 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3695                       size_t len,
3696                       MemoryRegion *mr)
3697 {
3698 }
3699 #endif
3700 
3701 static const TypeInfo memory_region_info = {
3702     .parent             = TYPE_OBJECT,
3703     .name               = TYPE_MEMORY_REGION,
3704     .class_size         = sizeof(MemoryRegionClass),
3705     .instance_size      = sizeof(MemoryRegion),
3706     .instance_init      = memory_region_initfn,
3707     .instance_finalize  = memory_region_finalize,
3708 };
3709 
3710 static const TypeInfo iommu_memory_region_info = {
3711     .parent             = TYPE_MEMORY_REGION,
3712     .name               = TYPE_IOMMU_MEMORY_REGION,
3713     .class_size         = sizeof(IOMMUMemoryRegionClass),
3714     .instance_size      = sizeof(IOMMUMemoryRegion),
3715     .instance_init      = iommu_memory_region_initfn,
3716     .abstract           = true,
3717 };
3718 
3719 static const TypeInfo ram_discard_manager_info = {
3720     .parent             = TYPE_INTERFACE,
3721     .name               = TYPE_RAM_DISCARD_MANAGER,
3722     .class_size         = sizeof(RamDiscardManagerClass),
3723 };
3724 
3725 static void memory_register_types(void)
3726 {
3727     type_register_static(&memory_region_info);
3728     type_register_static(&iommu_memory_region_info);
3729     type_register_static(&ram_discard_manager_info);
3730 }
3731 
3732 type_init(memory_register_types)
3733