1 /* 2 * QEMU System Emulator 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 /* 25 * split out ioport related stuffs from vl.c. 26 */ 27 28 #include "qemu/osdep.h" 29 #include "cpu.h" 30 #include "exec/ioport.h" 31 #include "exec/memory.h" 32 #include "exec/address-spaces.h" 33 #include "trace.h" 34 35 struct MemoryRegionPortioList { 36 Object obj; 37 38 MemoryRegion mr; 39 void *portio_opaque; 40 MemoryRegionPortio *ports; 41 }; 42 43 #define TYPE_MEMORY_REGION_PORTIO_LIST "memory-region-portio-list" 44 OBJECT_DECLARE_SIMPLE_TYPE(MemoryRegionPortioList, MEMORY_REGION_PORTIO_LIST) 45 46 static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size) 47 { 48 return -1ULL; 49 } 50 51 static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val, 52 unsigned size) 53 { 54 } 55 56 const MemoryRegionOps unassigned_io_ops = { 57 .read = unassigned_io_read, 58 .write = unassigned_io_write, 59 .endianness = DEVICE_NATIVE_ENDIAN, 60 }; 61 62 void cpu_outb(uint32_t addr, uint8_t val) 63 { 64 trace_cpu_out(addr, 'b', val); 65 address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, 66 &val, 1); 67 } 68 69 void cpu_outw(uint32_t addr, uint16_t val) 70 { 71 uint8_t buf[2]; 72 73 trace_cpu_out(addr, 'w', val); 74 stw_p(buf, val); 75 address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, 76 buf, 2); 77 } 78 79 void cpu_outl(uint32_t addr, uint32_t val) 80 { 81 uint8_t buf[4]; 82 83 trace_cpu_out(addr, 'l', val); 84 stl_p(buf, val); 85 address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, 86 buf, 4); 87 } 88 89 uint8_t cpu_inb(uint32_t addr) 90 { 91 uint8_t val; 92 93 address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, 94 &val, 1); 95 trace_cpu_in(addr, 'b', val); 96 return val; 97 } 98 99 uint16_t cpu_inw(uint32_t addr) 100 { 101 uint8_t buf[2]; 102 uint16_t val; 103 104 address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 2); 105 val = lduw_p(buf); 106 trace_cpu_in(addr, 'w', val); 107 return val; 108 } 109 110 uint32_t cpu_inl(uint32_t addr) 111 { 112 uint8_t buf[4]; 113 uint32_t val; 114 115 address_space_read(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED, buf, 4); 116 val = ldl_p(buf); 117 trace_cpu_in(addr, 'l', val); 118 return val; 119 } 120 121 void portio_list_init(PortioList *piolist, 122 Object *owner, 123 const MemoryRegionPortio *callbacks, 124 void *opaque, const char *name) 125 { 126 unsigned n = 0; 127 128 while (callbacks[n].size) { 129 ++n; 130 } 131 132 piolist->ports = callbacks; 133 piolist->nr = 0; 134 piolist->regions = g_new0(MemoryRegion *, n); 135 piolist->address_space = NULL; 136 piolist->opaque = opaque; 137 piolist->owner = owner; 138 piolist->name = name; 139 piolist->flush_coalesced_mmio = false; 140 } 141 142 void portio_list_set_flush_coalesced(PortioList *piolist) 143 { 144 piolist->flush_coalesced_mmio = true; 145 } 146 147 void portio_list_destroy(PortioList *piolist) 148 { 149 MemoryRegionPortioList *mrpio; 150 unsigned i; 151 152 for (i = 0; i < piolist->nr; ++i) { 153 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr); 154 object_unparent(OBJECT(&mrpio->mr)); 155 object_unref(mrpio); 156 } 157 g_free(piolist->regions); 158 } 159 160 static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio, 161 uint64_t offset, unsigned size, 162 bool write) 163 { 164 const MemoryRegionPortio *mrp; 165 166 for (mrp = mrpio->ports; mrp->size; ++mrp) { 167 if (offset >= mrp->offset && offset < mrp->offset + mrp->len && 168 size == mrp->size && 169 (write ? (bool)mrp->write : (bool)mrp->read)) { 170 return mrp; 171 } 172 } 173 return NULL; 174 } 175 176 static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size) 177 { 178 MemoryRegionPortioList *mrpio = opaque; 179 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false); 180 uint64_t data; 181 182 data = ((uint64_t)1 << (size * 8)) - 1; 183 if (mrp) { 184 data = mrp->read(mrpio->portio_opaque, mrp->base + addr); 185 } else if (size == 2) { 186 mrp = find_portio(mrpio, addr, 1, false); 187 if (mrp) { 188 data = mrp->read(mrpio->portio_opaque, mrp->base + addr); 189 if (addr + 1 < mrp->offset + mrp->len) { 190 data |= mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8; 191 } else { 192 data |= 0xff00; 193 } 194 } 195 } 196 return data; 197 } 198 199 static void portio_write(void *opaque, hwaddr addr, uint64_t data, 200 unsigned size) 201 { 202 MemoryRegionPortioList *mrpio = opaque; 203 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true); 204 205 if (mrp) { 206 mrp->write(mrpio->portio_opaque, mrp->base + addr, data); 207 } else if (size == 2) { 208 mrp = find_portio(mrpio, addr, 1, true); 209 if (mrp) { 210 mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff); 211 if (addr + 1 < mrp->offset + mrp->len) { 212 mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8); 213 } 214 } 215 } 216 } 217 218 static const MemoryRegionOps portio_ops = { 219 .read = portio_read, 220 .write = portio_write, 221 .endianness = DEVICE_LITTLE_ENDIAN, 222 .valid.unaligned = true, 223 .impl.unaligned = true, 224 }; 225 226 static void portio_list_add_1(PortioList *piolist, 227 const MemoryRegionPortio *pio_init, 228 unsigned count, unsigned start, 229 unsigned off_low, unsigned off_high) 230 { 231 MemoryRegionPortioList *mrpio; 232 Object *owner; 233 char *name; 234 unsigned i; 235 236 /* Copy the sub-list and null-terminate it. */ 237 mrpio = MEMORY_REGION_PORTIO_LIST( 238 object_new(TYPE_MEMORY_REGION_PORTIO_LIST)); 239 mrpio->portio_opaque = piolist->opaque; 240 mrpio->ports = g_malloc0(sizeof(MemoryRegionPortio) * (count + 1)); 241 memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count); 242 memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio)); 243 244 /* Adjust the offsets to all be zero-based for the region. */ 245 for (i = 0; i < count; ++i) { 246 mrpio->ports[i].offset -= off_low; 247 mrpio->ports[i].base = start + off_low; 248 } 249 250 /* 251 * The MemoryRegion owner is the MemoryRegionPortioList since that manages 252 * the lifecycle via the refcount 253 */ 254 memory_region_init_io(&mrpio->mr, OBJECT(mrpio), &portio_ops, mrpio, 255 piolist->name, off_high - off_low); 256 257 /* Reparent the MemoryRegion to the piolist owner */ 258 object_ref(&mrpio->mr); 259 object_unparent(OBJECT(&mrpio->mr)); 260 if (!piolist->owner) { 261 owner = container_get(qdev_get_machine(), "/unattached"); 262 } else { 263 owner = piolist->owner; 264 } 265 name = g_strdup_printf("%s[*]", piolist->name); 266 object_property_add_child(owner, name, OBJECT(&mrpio->mr)); 267 g_free(name); 268 269 if (piolist->flush_coalesced_mmio) { 270 memory_region_set_flush_coalesced(&mrpio->mr); 271 } 272 memory_region_add_subregion(piolist->address_space, 273 start + off_low, &mrpio->mr); 274 piolist->regions[piolist->nr] = &mrpio->mr; 275 ++piolist->nr; 276 } 277 278 void portio_list_add(PortioList *piolist, 279 MemoryRegion *address_space, 280 uint32_t start) 281 { 282 const MemoryRegionPortio *pio, *pio_start = piolist->ports; 283 unsigned int off_low, off_high, off_last, count; 284 285 piolist->address_space = address_space; 286 287 /* Handle the first entry specially. */ 288 off_last = off_low = pio_start->offset; 289 off_high = off_low + pio_start->len + pio_start->size - 1; 290 count = 1; 291 292 for (pio = pio_start + 1; pio->size != 0; pio++, count++) { 293 /* All entries must be sorted by offset. */ 294 assert(pio->offset >= off_last); 295 off_last = pio->offset; 296 297 /* If we see a hole, break the region. */ 298 if (off_last > off_high) { 299 portio_list_add_1(piolist, pio_start, count, start, off_low, 300 off_high); 301 /* ... and start collecting anew. */ 302 pio_start = pio; 303 off_low = off_last; 304 off_high = off_low + pio->len + pio_start->size - 1; 305 count = 0; 306 } else if (off_last + pio->len > off_high) { 307 off_high = off_last + pio->len + pio_start->size - 1; 308 } 309 } 310 311 /* There will always be an open sub-list. */ 312 portio_list_add_1(piolist, pio_start, count, start, off_low, off_high); 313 } 314 315 void portio_list_del(PortioList *piolist) 316 { 317 MemoryRegionPortioList *mrpio; 318 unsigned i; 319 320 for (i = 0; i < piolist->nr; ++i) { 321 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr); 322 memory_region_del_subregion(piolist->address_space, &mrpio->mr); 323 } 324 } 325 326 static void memory_region_portio_list_finalize(Object *obj) 327 { 328 MemoryRegionPortioList *mrpio = MEMORY_REGION_PORTIO_LIST(obj); 329 330 object_unref(&mrpio->mr); 331 g_free(mrpio->ports); 332 } 333 334 static const TypeInfo memory_region_portio_list_info = { 335 .parent = TYPE_OBJECT, 336 .name = TYPE_MEMORY_REGION_PORTIO_LIST, 337 .instance_size = sizeof(MemoryRegionPortioList), 338 .instance_finalize = memory_region_portio_list_finalize, 339 }; 340 341 static void ioport_register_types(void) 342 { 343 type_register_static(&memory_region_portio_list_info); 344 } 345 346 type_init(ioport_register_types) 347