1*9fbe302bSMichael S. Tsirkin /* 2*9fbe302bSMichael S. Tsirkin * Virtio PCI driver 3*9fbe302bSMichael S. Tsirkin * 4*9fbe302bSMichael S. Tsirkin * This module allows virtio devices to be used over a virtual PCI device. 5*9fbe302bSMichael S. Tsirkin * This can be used with QEMU based VMMs like KVM or Xen. 6*9fbe302bSMichael S. Tsirkin * 7*9fbe302bSMichael S. Tsirkin * Copyright IBM Corp. 2007 8*9fbe302bSMichael S. Tsirkin * 9*9fbe302bSMichael S. Tsirkin * Authors: 10*9fbe302bSMichael S. Tsirkin * Anthony Liguori <aliguori@us.ibm.com> 11*9fbe302bSMichael S. Tsirkin * 12*9fbe302bSMichael S. Tsirkin * This header is BSD licensed so anyone can use the definitions to implement 13*9fbe302bSMichael S. Tsirkin * compatible drivers/servers. 14*9fbe302bSMichael S. Tsirkin * 15*9fbe302bSMichael S. Tsirkin * Redistribution and use in source and binary forms, with or without 16*9fbe302bSMichael S. Tsirkin * modification, are permitted provided that the following conditions 17*9fbe302bSMichael S. Tsirkin * are met: 18*9fbe302bSMichael S. Tsirkin * 1. Redistributions of source code must retain the above copyright 19*9fbe302bSMichael S. Tsirkin * notice, this list of conditions and the following disclaimer. 20*9fbe302bSMichael S. Tsirkin * 2. Redistributions in binary form must reproduce the above copyright 21*9fbe302bSMichael S. Tsirkin * notice, this list of conditions and the following disclaimer in the 22*9fbe302bSMichael S. Tsirkin * documentation and/or other materials provided with the distribution. 23*9fbe302bSMichael S. Tsirkin * 3. Neither the name of IBM nor the names of its contributors 24*9fbe302bSMichael S. Tsirkin * may be used to endorse or promote products derived from this software 25*9fbe302bSMichael S. Tsirkin * without specific prior written permission. 26*9fbe302bSMichael S. Tsirkin * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND 27*9fbe302bSMichael S. Tsirkin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28*9fbe302bSMichael S. Tsirkin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29*9fbe302bSMichael S. Tsirkin * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE 30*9fbe302bSMichael S. Tsirkin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31*9fbe302bSMichael S. Tsirkin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32*9fbe302bSMichael S. Tsirkin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33*9fbe302bSMichael S. Tsirkin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34*9fbe302bSMichael S. Tsirkin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35*9fbe302bSMichael S. Tsirkin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36*9fbe302bSMichael S. Tsirkin * SUCH DAMAGE. 37*9fbe302bSMichael S. Tsirkin */ 38*9fbe302bSMichael S. Tsirkin 39*9fbe302bSMichael S. Tsirkin #ifndef _LINUX_VIRTIO_PCI_H 40*9fbe302bSMichael S. Tsirkin #define _LINUX_VIRTIO_PCI_H 41*9fbe302bSMichael S. Tsirkin 42*9fbe302bSMichael S. Tsirkin #include "standard-headers/linux/types.h" 43*9fbe302bSMichael S. Tsirkin 44*9fbe302bSMichael S. Tsirkin #ifndef VIRTIO_PCI_NO_LEGACY 45*9fbe302bSMichael S. Tsirkin 46*9fbe302bSMichael S. Tsirkin /* A 32-bit r/o bitmask of the features supported by the host */ 47*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_HOST_FEATURES 0 48*9fbe302bSMichael S. Tsirkin 49*9fbe302bSMichael S. Tsirkin /* A 32-bit r/w bitmask of features activated by the guest */ 50*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_GUEST_FEATURES 4 51*9fbe302bSMichael S. Tsirkin 52*9fbe302bSMichael S. Tsirkin /* A 32-bit r/w PFN for the currently selected queue */ 53*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_QUEUE_PFN 8 54*9fbe302bSMichael S. Tsirkin 55*9fbe302bSMichael S. Tsirkin /* A 16-bit r/o queue size for the currently selected queue */ 56*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_QUEUE_NUM 12 57*9fbe302bSMichael S. Tsirkin 58*9fbe302bSMichael S. Tsirkin /* A 16-bit r/w queue selector */ 59*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_QUEUE_SEL 14 60*9fbe302bSMichael S. Tsirkin 61*9fbe302bSMichael S. Tsirkin /* A 16-bit r/w queue notifier */ 62*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_QUEUE_NOTIFY 16 63*9fbe302bSMichael S. Tsirkin 64*9fbe302bSMichael S. Tsirkin /* An 8-bit device status register. */ 65*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_STATUS 18 66*9fbe302bSMichael S. Tsirkin 67*9fbe302bSMichael S. Tsirkin /* An 8-bit r/o interrupt status register. Reading the value will return the 68*9fbe302bSMichael S. Tsirkin * current contents of the ISR and will also clear it. This is effectively 69*9fbe302bSMichael S. Tsirkin * a read-and-acknowledge. */ 70*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_ISR 19 71*9fbe302bSMichael S. Tsirkin 72*9fbe302bSMichael S. Tsirkin /* MSI-X registers: only enabled if MSI-X is enabled. */ 73*9fbe302bSMichael S. Tsirkin /* A 16-bit vector for configuration changes. */ 74*9fbe302bSMichael S. Tsirkin #define VIRTIO_MSI_CONFIG_VECTOR 20 75*9fbe302bSMichael S. Tsirkin /* A 16-bit vector for selected queue notifications. */ 76*9fbe302bSMichael S. Tsirkin #define VIRTIO_MSI_QUEUE_VECTOR 22 77*9fbe302bSMichael S. Tsirkin 78*9fbe302bSMichael S. Tsirkin /* The remaining space is defined by each driver as the per-driver 79*9fbe302bSMichael S. Tsirkin * configuration space */ 80*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CONFIG_OFF(msix_enabled) ((msix_enabled) ? 24 : 20) 81*9fbe302bSMichael S. Tsirkin /* Deprecated: please use VIRTIO_PCI_CONFIG_OFF instead */ 82*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CONFIG(dev) VIRTIO_PCI_CONFIG_OFF((dev)->msix_enabled) 83*9fbe302bSMichael S. Tsirkin 84*9fbe302bSMichael S. Tsirkin /* Virtio ABI version, this must match exactly */ 85*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_ABI_VERSION 0 86*9fbe302bSMichael S. Tsirkin 87*9fbe302bSMichael S. Tsirkin /* How many bits to shift physical queue address written to QUEUE_PFN. 88*9fbe302bSMichael S. Tsirkin * 12 is historical, and due to x86 page size. */ 89*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12 90*9fbe302bSMichael S. Tsirkin 91*9fbe302bSMichael S. Tsirkin /* The alignment to use between consumer and producer parts of vring. 92*9fbe302bSMichael S. Tsirkin * x86 pagesize again. */ 93*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_VRING_ALIGN 4096 94*9fbe302bSMichael S. Tsirkin 95*9fbe302bSMichael S. Tsirkin #endif /* VIRTIO_PCI_NO_LEGACY */ 96*9fbe302bSMichael S. Tsirkin 97*9fbe302bSMichael S. Tsirkin /* The bit of the ISR which indicates a device configuration change. */ 98*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_ISR_CONFIG 0x2 99*9fbe302bSMichael S. Tsirkin /* Vector value used to disable MSI for queue */ 100*9fbe302bSMichael S. Tsirkin #define VIRTIO_MSI_NO_VECTOR 0xffff 101*9fbe302bSMichael S. Tsirkin 102*9fbe302bSMichael S. Tsirkin #ifndef VIRTIO_PCI_NO_MODERN 103*9fbe302bSMichael S. Tsirkin 104*9fbe302bSMichael S. Tsirkin /* IDs for different capabilities. Must all exist. */ 105*9fbe302bSMichael S. Tsirkin 106*9fbe302bSMichael S. Tsirkin /* Common configuration */ 107*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_COMMON_CFG 1 108*9fbe302bSMichael S. Tsirkin /* Notifications */ 109*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 110*9fbe302bSMichael S. Tsirkin /* ISR access */ 111*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_ISR_CFG 3 112*9fbe302bSMichael S. Tsirkin /* Device specific configuration */ 113*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_DEVICE_CFG 4 114*9fbe302bSMichael S. Tsirkin /* PCI configuration access */ 115*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_PCI_CFG 5 116*9fbe302bSMichael S. Tsirkin 117*9fbe302bSMichael S. Tsirkin /* This is the PCI capability header: */ 118*9fbe302bSMichael S. Tsirkin struct virtio_pci_cap { 119*9fbe302bSMichael S. Tsirkin uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */ 120*9fbe302bSMichael S. Tsirkin uint8_t cap_next; /* Generic PCI field: next ptr. */ 121*9fbe302bSMichael S. Tsirkin uint8_t cap_len; /* Generic PCI field: capability length */ 122*9fbe302bSMichael S. Tsirkin uint8_t cfg_type; /* Identifies the structure. */ 123*9fbe302bSMichael S. Tsirkin uint8_t bar; /* Where to find it. */ 124*9fbe302bSMichael S. Tsirkin uint8_t padding[3]; /* Pad to full dword. */ 125*9fbe302bSMichael S. Tsirkin uint32_t offset; /* Offset within bar. */ 126*9fbe302bSMichael S. Tsirkin uint32_t length; /* Length of the structure, in bytes. */ 127*9fbe302bSMichael S. Tsirkin }; 128*9fbe302bSMichael S. Tsirkin 129*9fbe302bSMichael S. Tsirkin struct virtio_pci_notify_cap { 130*9fbe302bSMichael S. Tsirkin struct virtio_pci_cap cap; 131*9fbe302bSMichael S. Tsirkin uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */ 132*9fbe302bSMichael S. Tsirkin }; 133*9fbe302bSMichael S. Tsirkin 134*9fbe302bSMichael S. Tsirkin /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ 135*9fbe302bSMichael S. Tsirkin struct virtio_pci_common_cfg { 136*9fbe302bSMichael S. Tsirkin /* About the whole device. */ 137*9fbe302bSMichael S. Tsirkin uint32_t device_feature_select; /* read-write */ 138*9fbe302bSMichael S. Tsirkin uint32_t device_feature; /* read-only */ 139*9fbe302bSMichael S. Tsirkin uint32_t guest_feature_select; /* read-write */ 140*9fbe302bSMichael S. Tsirkin uint32_t guest_feature; /* read-write */ 141*9fbe302bSMichael S. Tsirkin uint16_t msix_config; /* read-write */ 142*9fbe302bSMichael S. Tsirkin uint16_t num_queues; /* read-only */ 143*9fbe302bSMichael S. Tsirkin uint8_t device_status; /* read-write */ 144*9fbe302bSMichael S. Tsirkin uint8_t config_generation; /* read-only */ 145*9fbe302bSMichael S. Tsirkin 146*9fbe302bSMichael S. Tsirkin /* About a specific virtqueue. */ 147*9fbe302bSMichael S. Tsirkin uint16_t queue_select; /* read-write */ 148*9fbe302bSMichael S. Tsirkin uint16_t queue_size; /* read-write, power of 2. */ 149*9fbe302bSMichael S. Tsirkin uint16_t queue_msix_vector; /* read-write */ 150*9fbe302bSMichael S. Tsirkin uint16_t queue_enable; /* read-write */ 151*9fbe302bSMichael S. Tsirkin uint16_t queue_notify_off; /* read-only */ 152*9fbe302bSMichael S. Tsirkin uint32_t queue_desc_lo; /* read-write */ 153*9fbe302bSMichael S. Tsirkin uint32_t queue_desc_hi; /* read-write */ 154*9fbe302bSMichael S. Tsirkin uint32_t queue_avail_lo; /* read-write */ 155*9fbe302bSMichael S. Tsirkin uint32_t queue_avail_hi; /* read-write */ 156*9fbe302bSMichael S. Tsirkin uint32_t queue_used_lo; /* read-write */ 157*9fbe302bSMichael S. Tsirkin uint32_t queue_used_hi; /* read-write */ 158*9fbe302bSMichael S. Tsirkin }; 159*9fbe302bSMichael S. Tsirkin 160*9fbe302bSMichael S. Tsirkin /* Macro versions of offsets for the Old Timers! */ 161*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_VNDR 0 162*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_NEXT 1 163*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_LEN 2 164*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_CFG_TYPE 3 165*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_BAR 4 166*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_OFFSET 8 167*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_CAP_LENGTH 12 168*9fbe302bSMichael S. Tsirkin 169*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_NOTIFY_CAP_MULT 16 170*9fbe302bSMichael S. Tsirkin 171*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_DFSELECT 0 172*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_DF 4 173*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_GFSELECT 8 174*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_GF 12 175*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_MSIX 16 176*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_NUMQ 18 177*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_STATUS 20 178*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_CFGGENERATION 21 179*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_SELECT 22 180*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_SIZE 24 181*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_MSIX 26 182*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_ENABLE 28 183*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_NOFF 30 184*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_DESCLO 32 185*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_DESCHI 36 186*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_AVAILLO 40 187*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_AVAILHI 44 188*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_USEDLO 48 189*9fbe302bSMichael S. Tsirkin #define VIRTIO_PCI_COMMON_Q_USEDHI 52 190*9fbe302bSMichael S. Tsirkin 191*9fbe302bSMichael S. Tsirkin #endif /* VIRTIO_PCI_NO_MODERN */ 192*9fbe302bSMichael S. Tsirkin 193*9fbe302bSMichael S. Tsirkin #endif 194