1 /*
2  * Virtio GPU Device
3  *
4  * Copyright Red Hat, Inc. 2013-2014
5  *
6  * Authors:
7  *     Dave Airlie <airlied@redhat.com>
8  *     Gerd Hoffmann <kraxel@redhat.com>
9  *
10  * This header is BSD licensed so anyone can use the definitions
11  * to implement compatible drivers/servers:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  * 3. Neither the name of IBM nor the names of its contributors
22  *    may be used to endorse or promote products derived from this software
23  *    without specific prior written permission.
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL IBM OR
28  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
31  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
34  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  */
37 
38 #ifndef VIRTIO_GPU_HW_H
39 #define VIRTIO_GPU_HW_H
40 
41 #include "standard-headers/linux/types.h"
42 
43 enum virtio_gpu_ctrl_type {
44 	VIRTIO_GPU_UNDEFINED = 0,
45 
46 	/* 2d commands */
47 	VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
48 	VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
49 	VIRTIO_GPU_CMD_RESOURCE_UNREF,
50 	VIRTIO_GPU_CMD_SET_SCANOUT,
51 	VIRTIO_GPU_CMD_RESOURCE_FLUSH,
52 	VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
53 	VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
54 	VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
55 
56 	/* cursor commands */
57 	VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
58 	VIRTIO_GPU_CMD_MOVE_CURSOR,
59 
60 	/* success responses */
61 	VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
62 	VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
63 
64 	/* error responses */
65 	VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
66 	VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
67 	VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
68 	VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
69 	VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
70 	VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
71 };
72 
73 #define VIRTIO_GPU_FLAG_FENCE (1 << 0)
74 
75 struct virtio_gpu_ctrl_hdr {
76 	uint32_t type;
77 	uint32_t flags;
78 	uint64_t fence_id;
79 	uint32_t ctx_id;
80 	uint32_t padding;
81 };
82 
83 /* data passed in the cursor vq */
84 
85 struct virtio_gpu_cursor_pos {
86 	uint32_t scanout_id;
87 	uint32_t x;
88 	uint32_t y;
89 	uint32_t padding;
90 };
91 
92 /* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
93 struct virtio_gpu_update_cursor {
94 	struct virtio_gpu_ctrl_hdr hdr;
95 	struct virtio_gpu_cursor_pos pos;  /* update & move */
96 	uint32_t resource_id;           /* update only */
97 	uint32_t hot_x;                 /* update only */
98 	uint32_t hot_y;                 /* update only */
99 	uint32_t padding;
100 };
101 
102 /* data passed in the control vq, 2d related */
103 
104 struct virtio_gpu_rect {
105 	uint32_t x;
106 	uint32_t y;
107 	uint32_t width;
108 	uint32_t height;
109 };
110 
111 /* VIRTIO_GPU_CMD_RESOURCE_UNREF */
112 struct virtio_gpu_resource_unref {
113 	struct virtio_gpu_ctrl_hdr hdr;
114 	uint32_t resource_id;
115 	uint32_t padding;
116 };
117 
118 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
119 struct virtio_gpu_resource_create_2d {
120 	struct virtio_gpu_ctrl_hdr hdr;
121 	uint32_t resource_id;
122 	uint32_t format;
123 	uint32_t width;
124 	uint32_t height;
125 };
126 
127 /* VIRTIO_GPU_CMD_SET_SCANOUT */
128 struct virtio_gpu_set_scanout {
129 	struct virtio_gpu_ctrl_hdr hdr;
130 	struct virtio_gpu_rect r;
131 	uint32_t scanout_id;
132 	uint32_t resource_id;
133 };
134 
135 /* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
136 struct virtio_gpu_resource_flush {
137 	struct virtio_gpu_ctrl_hdr hdr;
138 	struct virtio_gpu_rect r;
139 	uint32_t resource_id;
140 	uint32_t padding;
141 };
142 
143 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
144 struct virtio_gpu_transfer_to_host_2d {
145 	struct virtio_gpu_ctrl_hdr hdr;
146 	struct virtio_gpu_rect r;
147 	uint64_t offset;
148 	uint32_t resource_id;
149 	uint32_t padding;
150 };
151 
152 struct virtio_gpu_mem_entry {
153 	uint64_t addr;
154 	uint32_t length;
155 	uint32_t padding;
156 };
157 
158 /* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
159 struct virtio_gpu_resource_attach_backing {
160 	struct virtio_gpu_ctrl_hdr hdr;
161 	uint32_t resource_id;
162 	uint32_t nr_entries;
163 };
164 
165 /* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
166 struct virtio_gpu_resource_detach_backing {
167 	struct virtio_gpu_ctrl_hdr hdr;
168 	uint32_t resource_id;
169 	uint32_t padding;
170 };
171 
172 /* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
173 #define VIRTIO_GPU_MAX_SCANOUTS 16
174 struct virtio_gpu_resp_display_info {
175 	struct virtio_gpu_ctrl_hdr hdr;
176 	struct virtio_gpu_display_one {
177 		struct virtio_gpu_rect r;
178 		uint32_t enabled;
179 		uint32_t flags;
180 	} pmodes[VIRTIO_GPU_MAX_SCANOUTS];
181 };
182 
183 #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
184 
185 struct virtio_gpu_config {
186 	uint32_t events_read;
187 	uint32_t events_clear;
188 	uint32_t num_scanouts;
189 	uint32_t reserved;
190 };
191 
192 /* simple formats for fbcon/X use */
193 enum virtio_gpu_formats {
194 	VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM  = 1,
195 	VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM  = 2,
196 	VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM  = 3,
197 	VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM  = 4,
198 
199 	VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM  = 67,
200 	VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM  = 68,
201 
202 	VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM  = 121,
203 	VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM  = 134,
204 };
205 
206 #endif
207