xref: /openbmc/qemu/scripts/kvm/vmxcap (revision 13b10e05)
1#!/usr/bin/python
2#
3# tool for querying VMX capabilities
4#
5# Copyright 2009-2010 Red Hat, Inc.
6#
7# Authors:
8#  Avi Kivity <avi@redhat.com>
9#
10# This work is licensed under the terms of the GNU GPL, version 2.  See
11# the COPYING file in the top-level directory.
12
13MSR_IA32_VMX_BASIC = 0x480
14MSR_IA32_VMX_PINBASED_CTLS = 0x481
15MSR_IA32_VMX_PROCBASED_CTLS = 0x482
16MSR_IA32_VMX_EXIT_CTLS = 0x483
17MSR_IA32_VMX_ENTRY_CTLS = 0x484
18MSR_IA32_VMX_MISC_CTLS = 0x485
19MSR_IA32_VMX_PROCBASED_CTLS2 = 0x48B
20MSR_IA32_VMX_EPT_VPID_CAP = 0x48C
21MSR_IA32_VMX_TRUE_PINBASED_CTLS = 0x48D
22MSR_IA32_VMX_TRUE_PROCBASED_CTLS = 0x48E
23MSR_IA32_VMX_TRUE_EXIT_CTLS = 0x48F
24MSR_IA32_VMX_TRUE_ENTRY_CTLS = 0x490
25MSR_IA32_VMX_VMFUNC = 0x491
26
27class msr(object):
28    def __init__(self):
29        try:
30            self.f = file('/dev/cpu/0/msr')
31        except:
32            self.f = file('/dev/msr0')
33    def read(self, index, default = None):
34        import struct
35        self.f.seek(index)
36        try:
37            return struct.unpack('Q', self.f.read(8))[0]
38        except:
39            return default
40
41class Control(object):
42    def __init__(self, name, bits, cap_msr, true_cap_msr = None):
43        self.name = name
44        self.bits = bits
45        self.cap_msr = cap_msr
46        self.true_cap_msr = true_cap_msr
47    def read2(self, nr):
48        m = msr()
49        val = m.read(nr, 0)
50        return (val & 0xffffffff, val >> 32)
51    def show(self):
52        print self.name
53        mbz, mb1 = self.read2(self.cap_msr)
54        tmbz, tmb1 = 0, 0
55        if self.true_cap_msr:
56            tmbz, tmb1 = self.read2(self.true_cap_msr)
57        for bit in sorted(self.bits.keys()):
58            zero = not (mbz & (1 << bit))
59            one = mb1 & (1 << bit)
60            true_zero = not (tmbz & (1 << bit))
61            true_one = tmb1 & (1 << bit)
62            s= '?'
63            if (self.true_cap_msr and true_zero and true_one
64                and one and not zero):
65                s = 'default'
66            elif zero and not one:
67                s = 'no'
68            elif one and not zero:
69                s = 'forced'
70            elif one and zero:
71                s = 'yes'
72            print '  %-40s %s' % (self.bits[bit], s)
73
74class Misc(object):
75    def __init__(self, name, bits, msr):
76        self.name = name
77        self.bits = bits
78        self.msr = msr
79    def show(self):
80        print self.name
81        value = msr().read(self.msr, 0)
82        def first_bit(key):
83            if type(key) is tuple:
84                return key[0]
85            else:
86                return key
87        for bits in sorted(self.bits.keys(), key = first_bit):
88            if type(bits) is tuple:
89                lo, hi = bits
90                fmt = int
91            else:
92                lo = hi = bits
93                def fmt(x):
94                    return { True: 'yes', False: 'no' }[x]
95            v = (value >> lo) & ((1 << (hi - lo + 1)) - 1)
96            print '  %-40s %s' % (self.bits[bits], fmt(v))
97
98controls = [
99    Control(
100        name = 'pin-based controls',
101        bits = {
102            0: 'External interrupt exiting',
103            3: 'NMI exiting',
104            5: 'Virtual NMIs',
105            6: 'Activate VMX-preemption timer',
106            },
107        cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
108        true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
109        ),
110
111    Control(
112        name = 'primary processor-based controls',
113        bits = {
114            2: 'Interrupt window exiting',
115            3: 'Use TSC offsetting',
116            7: 'HLT exiting',
117            9: 'INVLPG exiting',
118            10: 'MWAIT exiting',
119            11: 'RDPMC exiting',
120            12: 'RDTSC exiting',
121            15: 'CR3-load exiting',
122            16: 'CR3-store exiting',
123            19: 'CR8-load exiting',
124            20: 'CR8-store exiting',
125            21: 'Use TPR shadow',
126            22: 'NMI-window exiting',
127            23: 'MOV-DR exiting',
128            24: 'Unconditional I/O exiting',
129            25: 'Use I/O bitmaps',
130            27: 'Monitor trap flag',
131            28: 'Use MSR bitmaps',
132            29: 'MONITOR exiting',
133            30: 'PAUSE exiting',
134            31: 'Activate secondary control',
135            },
136        cap_msr = MSR_IA32_VMX_PROCBASED_CTLS,
137        true_cap_msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
138        ),
139
140    Control(
141        name = 'secondary processor-based controls',
142        bits = {
143            0: 'Virtualize APIC accesses',
144            1: 'Enable EPT',
145            2: 'Descriptor-table exiting',
146            4: 'Virtualize x2APIC mode',
147            5: 'Enable VPID',
148            6: 'WBINVD exiting',
149            7: 'Unrestricted guest',
150            9: 'Virtual interrupt delivery',
151            10: 'PAUSE-loop exiting',
152            11: 'RDRAND exiting',
153            12: 'Enable INVPCID',
154            13: 'Enable VM functions',
155            },
156        cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
157        ),
158
159    Control(
160        name = 'VM-Exit controls',
161        bits = {
162            2: 'Save debug controls',
163            9: 'Host address-space size',
164            12: 'Load IA32_PERF_GLOBAL_CTRL',
165            15: 'Acknowledge interrupt on exit',
166            18: 'Save IA32_PAT',
167            19: 'Load IA32_PAT',
168            20: 'Save IA32_EFER',
169            21: 'Load IA32_EFER',
170            22: 'Save VMX-preemption timer value',
171            },
172        cap_msr = MSR_IA32_VMX_EXIT_CTLS,
173        true_cap_msr = MSR_IA32_VMX_TRUE_EXIT_CTLS,
174        ),
175
176    Control(
177        name = 'VM-Entry controls',
178        bits = {
179            2: 'Load debug controls',
180            9: 'IA-64 mode guest',
181            10: 'Entry to SMM',
182            11: 'Deactivate dual-monitor treatment',
183            13: 'Load IA32_PERF_GLOBAL_CTRL',
184            14: 'Load IA32_PAT',
185            15: 'Load IA32_EFER',
186            },
187        cap_msr = MSR_IA32_VMX_ENTRY_CTLS,
188        true_cap_msr = MSR_IA32_VMX_TRUE_ENTRY_CTLS,
189        ),
190
191    Misc(
192        name = 'Miscellaneous data',
193        bits = {
194            (0,4): 'VMX-preemption timer scale (log2)',
195            5: 'Store EFER.LMA into IA-32e mode guest control',
196            6: 'HLT activity state',
197            7: 'Shutdown activity state',
198            8: 'Wait-for-SIPI activity state',
199            (16,24): 'Number of CR3-target values',
200            (25,27): 'MSR-load/store count recommenation',
201            28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
202            (32,62): 'MSEG revision identifier',
203            },
204        msr = MSR_IA32_VMX_MISC_CTLS,
205        ),
206
207    Misc(
208        name = 'VPID and EPT capabilities',
209        bits = {
210            0: 'Execute-only EPT translations',
211            6: 'Page-walk length 4',
212            8: 'Paging-structure memory type UC',
213            14: 'Paging-structure memory type WB',
214            16: '2MB EPT pages',
215            17: '1GB EPT pages',
216            20: 'INVEPT supported',
217            21: 'EPT accessed and dirty flags',
218            25: 'Single-context INVEPT',
219            26: 'All-context INVEPT',
220            32: 'INVVPID supported',
221            40: 'Individual-address INVVPID',
222            41: 'Single-context INVVPID',
223            42: 'All-context INVVPID',
224            43: 'Single-context-retaining-globals INVVPID',
225            },
226        msr = MSR_IA32_VMX_EPT_VPID_CAP,
227        ),
228    Misc(
229        name = 'VM Functions',
230        bits = {
231            0: 'EPTP Switching',
232            },
233        msr = MSR_IA32_VMX_VMFUNC,
234        ),
235    ]
236
237for c in controls:
238    c.show()
239