1# -*- Mode: Python -*- 2# vim: filetype=python 3# 4# This work is licensed under the terms of the GNU GPL, version 2 or later. 5# See the COPYING file in the top-level directory. 6# SPDX-License-Identifier: GPL-2.0-or-later 7 8## 9# = PCI 10## 11 12## 13# @PciMemoryRange: 14# 15# A PCI device memory region 16# 17# @base: the starting address (guest physical) 18# 19# @limit: the ending address (guest physical) 20# 21# Since: 0.14 22## 23{ 'struct': 'PciMemoryRange', 'data': {'base': 'int', 'limit': 'int'} } 24 25## 26# @PciMemoryRegion: 27# 28# Information about a PCI device I/O region. 29# 30# @bar: the index of the Base Address Register for this region 31# 32# @type: 33# - 'io' if the region is a PIO region 34# - 'memory' if the region is a MMIO region 35# 36# @size: memory size 37# 38# @prefetch: if @type is 'memory', true if the memory is prefetchable 39# 40# @mem_type_64: if @type is 'memory', true if the BAR is 64-bit 41# 42# Since: 0.14 43## 44{ 'struct': 'PciMemoryRegion', 45 'data': {'bar': 'int', 'type': 'str', 'address': 'int', 'size': 'int', 46 '*prefetch': 'bool', '*mem_type_64': 'bool' } } 47 48## 49# @PciBusInfo: 50# 51# Information about a bus of a PCI Bridge device 52# 53# @number: primary bus interface number. This should be the number of 54# the bus the device resides on. 55# 56# @secondary: secondary bus interface number. This is the number of 57# the main bus for the bridge 58# 59# @subordinate: This is the highest number bus that resides below the 60# bridge. 61# 62# @io_range: The PIO range for all devices on this bridge 63# 64# @memory_range: The MMIO range for all devices on this bridge 65# 66# @prefetchable_range: The range of prefetchable MMIO for all devices 67# on this bridge 68# 69# Since: 2.4 70## 71{ 'struct': 'PciBusInfo', 72 'data': {'number': 'int', 'secondary': 'int', 'subordinate': 'int', 73 'io_range': 'PciMemoryRange', 74 'memory_range': 'PciMemoryRange', 75 'prefetchable_range': 'PciMemoryRange' } } 76 77## 78# @PciBridgeInfo: 79# 80# Information about a PCI Bridge device 81# 82# @bus: information about the bus the device resides on 83# 84# @devices: a list of @PciDeviceInfo for each device on this bridge 85# 86# Since: 0.14 87## 88{ 'struct': 'PciBridgeInfo', 89 'data': {'bus': 'PciBusInfo', '*devices': ['PciDeviceInfo']} } 90 91## 92# @PciDeviceClass: 93# 94# Information about the Class of a PCI device 95# 96# @desc: a string description of the device's class 97# 98# @class: the class code of the device 99# 100# Since: 2.4 101## 102{ 'struct': 'PciDeviceClass', 103 'data': {'*desc': 'str', 'class': 'int'} } 104 105## 106# @PciDeviceId: 107# 108# Information about the Id of a PCI device 109# 110# @device: the PCI device id 111# 112# @vendor: the PCI vendor id 113# 114# @subsystem: the PCI subsystem id (since 3.1) 115# 116# @subsystem-vendor: the PCI subsystem vendor id (since 3.1) 117# 118# Since: 2.4 119## 120{ 'struct': 'PciDeviceId', 121 'data': {'device': 'int', 'vendor': 'int', '*subsystem': 'int', 122 '*subsystem-vendor': 'int'} } 123 124## 125# @PciDeviceInfo: 126# 127# Information about a PCI device 128# 129# @bus: the bus number of the device 130# 131# @slot: the slot the device is located in 132# 133# @function: the function of the slot used by the device 134# 135# @class_info: the class of the device 136# 137# @id: the PCI device id 138# 139# @irq: if an IRQ is assigned to the device, the IRQ number 140# 141# @irq_pin: the IRQ pin, zero means no IRQ (since 5.1) 142# 143# @qdev_id: the device name of the PCI device 144# 145# @pci_bridge: if the device is a PCI bridge, the bridge information 146# 147# @regions: a list of the PCI I/O regions associated with the device 148# 149# Notes: the contents of @class_info.desc are not stable and should 150# only be treated as informational. 151# 152# Since: 0.14 153## 154{ 'struct': 'PciDeviceInfo', 155 'data': {'bus': 'int', 'slot': 'int', 'function': 'int', 156 'class_info': 'PciDeviceClass', 'id': 'PciDeviceId', 157 '*irq': 'int', 'irq_pin': 'int', 'qdev_id': 'str', 158 '*pci_bridge': 'PciBridgeInfo', 'regions': ['PciMemoryRegion'] }} 159 160## 161# @PciInfo: 162# 163# Information about a PCI bus 164# 165# @bus: the bus index 166# 167# @devices: a list of devices on this bus 168# 169# Since: 0.14 170## 171{ 'struct': 'PciInfo', 'data': {'bus': 'int', 'devices': ['PciDeviceInfo']} } 172 173## 174# @query-pci: 175# 176# Return information about the PCI bus topology of the guest. 177# 178# Returns: a list of @PciInfo for each PCI bus. Each bus is 179# represented by a json-object, which has a key with a json-array 180# of all PCI devices attached to it. Each device is represented 181# by a json-object. 182# 183# Since: 0.14 184# 185# Example: 186# 187# -> { "execute": "query-pci" } 188# <- { "return": [ 189# { 190# "bus": 0, 191# "devices": [ 192# { 193# "bus": 0, 194# "qdev_id": "", 195# "slot": 0, 196# "class_info": { 197# "class": 1536, 198# "desc": "Host bridge" 199# }, 200# "id": { 201# "device": 32902, 202# "vendor": 4663 203# }, 204# "function": 0, 205# "regions": [ 206# ] 207# }, 208# { 209# "bus": 0, 210# "qdev_id": "", 211# "slot": 1, 212# "class_info": { 213# "class": 1537, 214# "desc": "ISA bridge" 215# }, 216# "id": { 217# "device": 32902, 218# "vendor": 28672 219# }, 220# "function": 0, 221# "regions": [ 222# ] 223# }, 224# { 225# "bus": 0, 226# "qdev_id": "", 227# "slot": 1, 228# "class_info": { 229# "class": 257, 230# "desc": "IDE controller" 231# }, 232# "id": { 233# "device": 32902, 234# "vendor": 28688 235# }, 236# "function": 1, 237# "regions": [ 238# { 239# "bar": 4, 240# "size": 16, 241# "address": 49152, 242# "type": "io" 243# } 244# ] 245# }, 246# { 247# "bus": 0, 248# "qdev_id": "", 249# "slot": 2, 250# "class_info": { 251# "class": 768, 252# "desc": "VGA controller" 253# }, 254# "id": { 255# "device": 4115, 256# "vendor": 184 257# }, 258# "function": 0, 259# "regions": [ 260# { 261# "prefetch": true, 262# "mem_type_64": false, 263# "bar": 0, 264# "size": 33554432, 265# "address": 4026531840, 266# "type": "memory" 267# }, 268# { 269# "prefetch": false, 270# "mem_type_64": false, 271# "bar": 1, 272# "size": 4096, 273# "address": 4060086272, 274# "type": "memory" 275# }, 276# { 277# "prefetch": false, 278# "mem_type_64": false, 279# "bar": 6, 280# "size": 65536, 281# "address": -1, 282# "type": "memory" 283# } 284# ] 285# }, 286# { 287# "bus": 0, 288# "qdev_id": "", 289# "irq": 11, 290# "slot": 4, 291# "class_info": { 292# "class": 1280, 293# "desc": "RAM controller" 294# }, 295# "id": { 296# "device": 6900, 297# "vendor": 4098 298# }, 299# "function": 0, 300# "regions": [ 301# { 302# "bar": 0, 303# "size": 32, 304# "address": 49280, 305# "type": "io" 306# } 307# ] 308# } 309# ] 310# } 311# ] 312# } 313# 314# Note: This example has been shortened as the real response is too 315# long. 316## 317{ 'command': 'query-pci', 'returns': ['PciInfo'] } 318