146ddf551Sbellard /* 246ddf551Sbellard * vm86 linux syscall support 346ddf551Sbellard * 446ddf551Sbellard * Copyright (c) 2003 Fabrice Bellard 546ddf551Sbellard * 646ddf551Sbellard * This program is free software; you can redistribute it and/or modify 746ddf551Sbellard * it under the terms of the GNU General Public License as published by 846ddf551Sbellard * the Free Software Foundation; either version 2 of the License, or 946ddf551Sbellard * (at your option) any later version. 1046ddf551Sbellard * 1146ddf551Sbellard * This program is distributed in the hope that it will be useful, 1246ddf551Sbellard * but WITHOUT ANY WARRANTY; without even the implied warranty of 1346ddf551Sbellard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1446ddf551Sbellard * GNU General Public License for more details. 1546ddf551Sbellard * 1646ddf551Sbellard * You should have received a copy of the GNU General Public License 178167ee88SBlue Swirl * along with this program; if not, see <http://www.gnu.org/licenses/>. 1846ddf551Sbellard */ 1946ddf551Sbellard #include <stdlib.h> 2046ddf551Sbellard #include <stdio.h> 2146ddf551Sbellard #include <stdarg.h> 2246ddf551Sbellard #include <string.h> 2346ddf551Sbellard #include <errno.h> 2446ddf551Sbellard #include <unistd.h> 2546ddf551Sbellard 2646ddf551Sbellard #include "qemu.h" 2746ddf551Sbellard 2846ddf551Sbellard //#define DEBUG_VM86 2946ddf551Sbellard 30d12d51d5Saliguori #ifdef DEBUG_VM86 3193fcfe39Saliguori # define LOG_VM86(...) qemu_log(__VA_ARGS__); 32d12d51d5Saliguori #else 33d12d51d5Saliguori # define LOG_VM86(...) do { } while (0) 34d12d51d5Saliguori #endif 35d12d51d5Saliguori 36d12d51d5Saliguori 3746ddf551Sbellard #define set_flags(X,new,mask) \ 3846ddf551Sbellard ((X) = ((X) & ~(mask)) | ((new) & (mask))) 3946ddf551Sbellard 4046ddf551Sbellard #define SAFE_MASK (0xDD5) 4146ddf551Sbellard #define RETURN_MASK (0xDFF) 4246ddf551Sbellard 4346ddf551Sbellard static inline int is_revectored(int nr, struct target_revectored_struct *bitmap) 4446ddf551Sbellard { 45b333af06Sbellard return (((uint8_t *)bitmap)[nr >> 3] >> (nr & 7)) & 1; 4646ddf551Sbellard } 4746ddf551Sbellard 48*5899d6d0SPeter Maydell static inline void vm_putw(CPUX86State *env, uint32_t segptr, 49*5899d6d0SPeter Maydell unsigned int reg16, unsigned int val) 5046ddf551Sbellard { 51*5899d6d0SPeter Maydell cpu_stw_data(env, segptr + (reg16 & 0xffff), val); 5246ddf551Sbellard } 5346ddf551Sbellard 54*5899d6d0SPeter Maydell static inline void vm_putl(CPUX86State *env, uint32_t segptr, 55*5899d6d0SPeter Maydell unsigned int reg16, unsigned int val) 5646ddf551Sbellard { 57*5899d6d0SPeter Maydell cpu_stl_data(env, segptr + (reg16 & 0xffff), val); 5846ddf551Sbellard } 5946ddf551Sbellard 60*5899d6d0SPeter Maydell static inline unsigned int vm_getb(CPUX86State *env, 61*5899d6d0SPeter Maydell uint32_t segptr, unsigned int reg16) 621455bf48Sbellard { 63*5899d6d0SPeter Maydell return cpu_ldub_data(env, segptr + (reg16 & 0xffff)); 641455bf48Sbellard } 651455bf48Sbellard 66*5899d6d0SPeter Maydell static inline unsigned int vm_getw(CPUX86State *env, 67*5899d6d0SPeter Maydell uint32_t segptr, unsigned int reg16) 6846ddf551Sbellard { 69*5899d6d0SPeter Maydell return cpu_lduw_data(env, segptr + (reg16 & 0xffff)); 7046ddf551Sbellard } 7146ddf551Sbellard 72*5899d6d0SPeter Maydell static inline unsigned int vm_getl(CPUX86State *env, 73*5899d6d0SPeter Maydell uint32_t segptr, unsigned int reg16) 7446ddf551Sbellard { 75*5899d6d0SPeter Maydell return cpu_ldl_data(env, segptr + (reg16 & 0xffff)); 7646ddf551Sbellard } 7746ddf551Sbellard 7846ddf551Sbellard void save_v86_state(CPUX86State *env) 7946ddf551Sbellard { 800429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 810429a971SAndreas Färber TaskState *ts = cs->opaque; 8253a5960aSpbrook struct target_vm86plus_struct * target_v86; 8346ddf551Sbellard 84579a97f7Sbellard if (!lock_user_struct(VERIFY_WRITE, target_v86, ts->target_v86, 0)) 85579a97f7Sbellard /* FIXME - should return an error */ 86579a97f7Sbellard return; 8746ddf551Sbellard /* put the VM86 registers in the userspace register structure */ 8853a5960aSpbrook target_v86->regs.eax = tswap32(env->regs[R_EAX]); 8953a5960aSpbrook target_v86->regs.ebx = tswap32(env->regs[R_EBX]); 9053a5960aSpbrook target_v86->regs.ecx = tswap32(env->regs[R_ECX]); 9153a5960aSpbrook target_v86->regs.edx = tswap32(env->regs[R_EDX]); 9253a5960aSpbrook target_v86->regs.esi = tswap32(env->regs[R_ESI]); 9353a5960aSpbrook target_v86->regs.edi = tswap32(env->regs[R_EDI]); 9453a5960aSpbrook target_v86->regs.ebp = tswap32(env->regs[R_EBP]); 9553a5960aSpbrook target_v86->regs.esp = tswap32(env->regs[R_ESP]); 9653a5960aSpbrook target_v86->regs.eip = tswap32(env->eip); 9753a5960aSpbrook target_v86->regs.cs = tswap16(env->segs[R_CS].selector); 9853a5960aSpbrook target_v86->regs.ss = tswap16(env->segs[R_SS].selector); 9953a5960aSpbrook target_v86->regs.ds = tswap16(env->segs[R_DS].selector); 10053a5960aSpbrook target_v86->regs.es = tswap16(env->segs[R_ES].selector); 10153a5960aSpbrook target_v86->regs.fs = tswap16(env->segs[R_FS].selector); 10253a5960aSpbrook target_v86->regs.gs = tswap16(env->segs[R_GS].selector); 10346ddf551Sbellard set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask); 10453a5960aSpbrook target_v86->regs.eflags = tswap32(env->eflags); 10553a5960aSpbrook unlock_user_struct(target_v86, ts->target_v86, 1); 106d12d51d5Saliguori LOG_VM86("save_v86_state: eflags=%08x cs:ip=%04x:%04x\n", 107c05bab77Sbellard env->eflags, env->segs[R_CS].selector, env->eip); 10846ddf551Sbellard 10946ddf551Sbellard /* restore 32 bit registers */ 11046ddf551Sbellard env->regs[R_EAX] = ts->vm86_saved_regs.eax; 11146ddf551Sbellard env->regs[R_EBX] = ts->vm86_saved_regs.ebx; 11246ddf551Sbellard env->regs[R_ECX] = ts->vm86_saved_regs.ecx; 11346ddf551Sbellard env->regs[R_EDX] = ts->vm86_saved_regs.edx; 11446ddf551Sbellard env->regs[R_ESI] = ts->vm86_saved_regs.esi; 11546ddf551Sbellard env->regs[R_EDI] = ts->vm86_saved_regs.edi; 11646ddf551Sbellard env->regs[R_EBP] = ts->vm86_saved_regs.ebp; 11746ddf551Sbellard env->regs[R_ESP] = ts->vm86_saved_regs.esp; 11846ddf551Sbellard env->eflags = ts->vm86_saved_regs.eflags; 11946ddf551Sbellard env->eip = ts->vm86_saved_regs.eip; 12046ddf551Sbellard 12146ddf551Sbellard cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs); 12246ddf551Sbellard cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss); 12346ddf551Sbellard cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds); 12446ddf551Sbellard cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es); 12546ddf551Sbellard cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs); 12646ddf551Sbellard cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs); 12746ddf551Sbellard } 12846ddf551Sbellard 12946ddf551Sbellard /* return from vm86 mode to 32 bit. The vm86() syscall will return 13046ddf551Sbellard 'retval' */ 13146ddf551Sbellard static inline void return_to_32bit(CPUX86State *env, int retval) 13246ddf551Sbellard { 133d12d51d5Saliguori LOG_VM86("return_to_32bit: ret=0x%x\n", retval); 13446ddf551Sbellard save_v86_state(env); 13546ddf551Sbellard env->regs[R_EAX] = retval; 13646ddf551Sbellard } 13746ddf551Sbellard 13846ddf551Sbellard static inline int set_IF(CPUX86State *env) 13946ddf551Sbellard { 1400429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 1410429a971SAndreas Färber TaskState *ts = cs->opaque; 14246ddf551Sbellard 14346ddf551Sbellard ts->v86flags |= VIF_MASK; 14446ddf551Sbellard if (ts->v86flags & VIP_MASK) { 14546ddf551Sbellard return_to_32bit(env, TARGET_VM86_STI); 14646ddf551Sbellard return 1; 14746ddf551Sbellard } 14846ddf551Sbellard return 0; 14946ddf551Sbellard } 15046ddf551Sbellard 15146ddf551Sbellard static inline void clear_IF(CPUX86State *env) 15246ddf551Sbellard { 1530429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 1540429a971SAndreas Färber TaskState *ts = cs->opaque; 15546ddf551Sbellard 15646ddf551Sbellard ts->v86flags &= ~VIF_MASK; 15746ddf551Sbellard } 15846ddf551Sbellard 15946ddf551Sbellard static inline void clear_TF(CPUX86State *env) 16046ddf551Sbellard { 16146ddf551Sbellard env->eflags &= ~TF_MASK; 16246ddf551Sbellard } 16346ddf551Sbellard 164226c9132Sbellard static inline void clear_AC(CPUX86State *env) 165226c9132Sbellard { 166226c9132Sbellard env->eflags &= ~AC_MASK; 167226c9132Sbellard } 168226c9132Sbellard 16946ddf551Sbellard static inline int set_vflags_long(unsigned long eflags, CPUX86State *env) 17046ddf551Sbellard { 1710429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 1720429a971SAndreas Färber TaskState *ts = cs->opaque; 17346ddf551Sbellard 17446ddf551Sbellard set_flags(ts->v86flags, eflags, ts->v86mask); 17546ddf551Sbellard set_flags(env->eflags, eflags, SAFE_MASK); 17646ddf551Sbellard if (eflags & IF_MASK) 17746ddf551Sbellard return set_IF(env); 178226c9132Sbellard else 179226c9132Sbellard clear_IF(env); 18046ddf551Sbellard return 0; 18146ddf551Sbellard } 18246ddf551Sbellard 18346ddf551Sbellard static inline int set_vflags_short(unsigned short flags, CPUX86State *env) 18446ddf551Sbellard { 1850429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 1860429a971SAndreas Färber TaskState *ts = cs->opaque; 18746ddf551Sbellard 18846ddf551Sbellard set_flags(ts->v86flags, flags, ts->v86mask & 0xffff); 18946ddf551Sbellard set_flags(env->eflags, flags, SAFE_MASK); 19046ddf551Sbellard if (flags & IF_MASK) 19146ddf551Sbellard return set_IF(env); 192226c9132Sbellard else 193226c9132Sbellard clear_IF(env); 19446ddf551Sbellard return 0; 19546ddf551Sbellard } 19646ddf551Sbellard 19746ddf551Sbellard static inline unsigned int get_vflags(CPUX86State *env) 19846ddf551Sbellard { 1990429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 2000429a971SAndreas Färber TaskState *ts = cs->opaque; 20146ddf551Sbellard unsigned int flags; 20246ddf551Sbellard 20346ddf551Sbellard flags = env->eflags & RETURN_MASK; 20446ddf551Sbellard if (ts->v86flags & VIF_MASK) 20546ddf551Sbellard flags |= IF_MASK; 206c05bab77Sbellard flags |= IOPL_MASK; 20746ddf551Sbellard return flags | (ts->v86flags & ts->v86mask); 20846ddf551Sbellard } 20946ddf551Sbellard 21046ddf551Sbellard #define ADD16(reg, val) reg = (reg & ~0xffff) | ((reg + (val)) & 0xffff) 21146ddf551Sbellard 21246ddf551Sbellard /* handle VM86 interrupt (NOTE: the CPU core currently does not 21346ddf551Sbellard support TSS interrupt revectoring, so this code is always executed) */ 214447db213Sbellard static void do_int(CPUX86State *env, int intno) 21546ddf551Sbellard { 2160429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 2170429a971SAndreas Färber TaskState *ts = cs->opaque; 2181455bf48Sbellard uint32_t int_addr, segoffs, ssp; 21946ddf551Sbellard unsigned int sp; 22046ddf551Sbellard 221c05bab77Sbellard if (env->segs[R_CS].selector == TARGET_BIOSSEG) 22246ddf551Sbellard goto cannot_handle; 223b333af06Sbellard if (is_revectored(intno, &ts->vm86plus.int_revectored)) 22446ddf551Sbellard goto cannot_handle; 22546ddf551Sbellard if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff, 226b333af06Sbellard &ts->vm86plus.int21_revectored)) 22746ddf551Sbellard goto cannot_handle; 2281455bf48Sbellard int_addr = (intno << 2); 229*5899d6d0SPeter Maydell segoffs = cpu_ldl_data(env, int_addr); 23046ddf551Sbellard if ((segoffs >> 16) == TARGET_BIOSSEG) 23146ddf551Sbellard goto cannot_handle; 232d12d51d5Saliguori LOG_VM86("VM86: emulating int 0x%x. CS:IP=%04x:%04x\n", 23346ddf551Sbellard intno, segoffs >> 16, segoffs & 0xffff); 23446ddf551Sbellard /* save old state */ 2351455bf48Sbellard ssp = env->segs[R_SS].selector << 4; 23646ddf551Sbellard sp = env->regs[R_ESP] & 0xffff; 237*5899d6d0SPeter Maydell vm_putw(env, ssp, sp - 2, get_vflags(env)); 238*5899d6d0SPeter Maydell vm_putw(env, ssp, sp - 4, env->segs[R_CS].selector); 239*5899d6d0SPeter Maydell vm_putw(env, ssp, sp - 6, env->eip); 24046ddf551Sbellard ADD16(env->regs[R_ESP], -6); 24146ddf551Sbellard /* goto interrupt handler */ 24246ddf551Sbellard env->eip = segoffs & 0xffff; 24346ddf551Sbellard cpu_x86_load_seg(env, R_CS, segoffs >> 16); 24446ddf551Sbellard clear_TF(env); 24546ddf551Sbellard clear_IF(env); 246226c9132Sbellard clear_AC(env); 24746ddf551Sbellard return; 24846ddf551Sbellard cannot_handle: 249d12d51d5Saliguori LOG_VM86("VM86: return to 32 bits int 0x%x\n", intno); 25046ddf551Sbellard return_to_32bit(env, TARGET_VM86_INTx | (intno << 8)); 25146ddf551Sbellard } 25246ddf551Sbellard 253447db213Sbellard void handle_vm86_trap(CPUX86State *env, int trapno) 254447db213Sbellard { 255447db213Sbellard if (trapno == 1 || trapno == 3) { 256447db213Sbellard return_to_32bit(env, TARGET_VM86_TRAP + (trapno << 8)); 257447db213Sbellard } else { 258447db213Sbellard do_int(env, trapno); 259447db213Sbellard } 260447db213Sbellard } 261447db213Sbellard 262b333af06Sbellard #define CHECK_IF_IN_TRAP() \ 263b333af06Sbellard if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \ 264b333af06Sbellard (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \ 265b333af06Sbellard newflags |= TF_MASK 26646ddf551Sbellard 26746ddf551Sbellard #define VM86_FAULT_RETURN \ 268b333af06Sbellard if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \ 26946ddf551Sbellard (ts->v86flags & (IF_MASK | VIF_MASK))) \ 27046ddf551Sbellard return_to_32bit(env, TARGET_VM86_PICRETURN); \ 27146ddf551Sbellard return 27246ddf551Sbellard 27346ddf551Sbellard void handle_vm86_fault(CPUX86State *env) 27446ddf551Sbellard { 2750429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 2760429a971SAndreas Färber TaskState *ts = cs->opaque; 2771455bf48Sbellard uint32_t csp, ssp; 278b333af06Sbellard unsigned int ip, sp, newflags, newip, newcs, opcode, intno; 279b333af06Sbellard int data32, pref_done; 28046ddf551Sbellard 2811455bf48Sbellard csp = env->segs[R_CS].selector << 4; 28246ddf551Sbellard ip = env->eip & 0xffff; 28346ddf551Sbellard 2841455bf48Sbellard ssp = env->segs[R_SS].selector << 4; 28546ddf551Sbellard sp = env->regs[R_ESP] & 0xffff; 28646ddf551Sbellard 287d12d51d5Saliguori LOG_VM86("VM86 exception %04x:%08x\n", 2881455bf48Sbellard env->segs[R_CS].selector, env->eip); 28946ddf551Sbellard 290b333af06Sbellard data32 = 0; 291b333af06Sbellard pref_done = 0; 292b333af06Sbellard do { 293*5899d6d0SPeter Maydell opcode = vm_getb(env, csp, ip); 294b333af06Sbellard ADD16(ip, 1); 295b333af06Sbellard switch (opcode) { 296b333af06Sbellard case 0x66: /* 32-bit data */ data32=1; break; 297b333af06Sbellard case 0x67: /* 32-bit address */ break; 298b333af06Sbellard case 0x2e: /* CS */ break; 299b333af06Sbellard case 0x3e: /* DS */ break; 300b333af06Sbellard case 0x26: /* ES */ break; 301b333af06Sbellard case 0x36: /* SS */ break; 302b333af06Sbellard case 0x65: /* GS */ break; 303b333af06Sbellard case 0x64: /* FS */ break; 304b333af06Sbellard case 0xf2: /* repnz */ break; 305b333af06Sbellard case 0xf3: /* rep */ break; 306b333af06Sbellard default: pref_done = 1; 30746ddf551Sbellard } 308b333af06Sbellard } while (!pref_done); 309b333af06Sbellard 310b333af06Sbellard /* VM86 mode */ 311b333af06Sbellard switch(opcode) { 31246ddf551Sbellard case 0x9c: /* pushf */ 313b333af06Sbellard if (data32) { 314*5899d6d0SPeter Maydell vm_putl(env, ssp, sp - 4, get_vflags(env)); 315b333af06Sbellard ADD16(env->regs[R_ESP], -4); 316b333af06Sbellard } else { 317*5899d6d0SPeter Maydell vm_putw(env, ssp, sp - 2, get_vflags(env)); 318b333af06Sbellard ADD16(env->regs[R_ESP], -2); 319b333af06Sbellard } 320b333af06Sbellard env->eip = ip; 32146ddf551Sbellard VM86_FAULT_RETURN; 32246ddf551Sbellard 32346ddf551Sbellard case 0x9d: /* popf */ 324b333af06Sbellard if (data32) { 325*5899d6d0SPeter Maydell newflags = vm_getl(env, ssp, sp); 326b333af06Sbellard ADD16(env->regs[R_ESP], 4); 327b333af06Sbellard } else { 328*5899d6d0SPeter Maydell newflags = vm_getw(env, ssp, sp); 32946ddf551Sbellard ADD16(env->regs[R_ESP], 2); 330b333af06Sbellard } 331b333af06Sbellard env->eip = ip; 332b333af06Sbellard CHECK_IF_IN_TRAP(); 333b333af06Sbellard if (data32) { 334b333af06Sbellard if (set_vflags_long(newflags, env)) 33546ddf551Sbellard return; 336b333af06Sbellard } else { 337b333af06Sbellard if (set_vflags_short(newflags, env)) 338b333af06Sbellard return; 339b333af06Sbellard } 34046ddf551Sbellard VM86_FAULT_RETURN; 34146ddf551Sbellard 34246ddf551Sbellard case 0xcd: /* int */ 343*5899d6d0SPeter Maydell intno = vm_getb(env, csp, ip); 344b333af06Sbellard ADD16(ip, 1); 345b333af06Sbellard env->eip = ip; 346b333af06Sbellard if (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) { 347b333af06Sbellard if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >> 348b333af06Sbellard (intno &7)) & 1) { 349b333af06Sbellard return_to_32bit(env, TARGET_VM86_INTx + (intno << 8)); 350b333af06Sbellard return; 351b333af06Sbellard } 352b333af06Sbellard } 353b333af06Sbellard do_int(env, intno); 35446ddf551Sbellard break; 35546ddf551Sbellard 35646ddf551Sbellard case 0xcf: /* iret */ 357b333af06Sbellard if (data32) { 358*5899d6d0SPeter Maydell newip = vm_getl(env, ssp, sp) & 0xffff; 359*5899d6d0SPeter Maydell newcs = vm_getl(env, ssp, sp + 4) & 0xffff; 360*5899d6d0SPeter Maydell newflags = vm_getl(env, ssp, sp + 8); 361b333af06Sbellard ADD16(env->regs[R_ESP], 12); 362b333af06Sbellard } else { 363*5899d6d0SPeter Maydell newip = vm_getw(env, ssp, sp); 364*5899d6d0SPeter Maydell newcs = vm_getw(env, ssp, sp + 2); 365*5899d6d0SPeter Maydell newflags = vm_getw(env, ssp, sp + 4); 36646ddf551Sbellard ADD16(env->regs[R_ESP], 6); 367b333af06Sbellard } 368b333af06Sbellard env->eip = newip; 369b333af06Sbellard cpu_x86_load_seg(env, R_CS, newcs); 370b333af06Sbellard CHECK_IF_IN_TRAP(); 371b333af06Sbellard if (data32) { 372b333af06Sbellard if (set_vflags_long(newflags, env)) 37346ddf551Sbellard return; 374b333af06Sbellard } else { 375b333af06Sbellard if (set_vflags_short(newflags, env)) 376b333af06Sbellard return; 377b333af06Sbellard } 37846ddf551Sbellard VM86_FAULT_RETURN; 37946ddf551Sbellard 38046ddf551Sbellard case 0xfa: /* cli */ 381b333af06Sbellard env->eip = ip; 38246ddf551Sbellard clear_IF(env); 38346ddf551Sbellard VM86_FAULT_RETURN; 38446ddf551Sbellard 38546ddf551Sbellard case 0xfb: /* sti */ 386b333af06Sbellard env->eip = ip; 38746ddf551Sbellard if (set_IF(env)) 38846ddf551Sbellard return; 38946ddf551Sbellard VM86_FAULT_RETURN; 39046ddf551Sbellard 39146ddf551Sbellard default: 39246ddf551Sbellard /* real VM86 GPF exception */ 39346ddf551Sbellard return_to_32bit(env, TARGET_VM86_UNKNOWN); 39446ddf551Sbellard break; 39546ddf551Sbellard } 39646ddf551Sbellard } 39746ddf551Sbellard 398992f48a0Sblueswir1 int do_vm86(CPUX86State *env, long subfunction, abi_ulong vm86_addr) 39946ddf551Sbellard { 4000429a971SAndreas Färber CPUState *cs = CPU(x86_env_get_cpu(env)); 4010429a971SAndreas Färber TaskState *ts = cs->opaque; 40253a5960aSpbrook struct target_vm86plus_struct * target_v86; 40346ddf551Sbellard int ret; 40446ddf551Sbellard 40546ddf551Sbellard switch (subfunction) { 40646ddf551Sbellard case TARGET_VM86_REQUEST_IRQ: 40746ddf551Sbellard case TARGET_VM86_FREE_IRQ: 40846ddf551Sbellard case TARGET_VM86_GET_IRQ_BITS: 40946ddf551Sbellard case TARGET_VM86_GET_AND_RESET_IRQ: 41046ddf551Sbellard gemu_log("qemu: unsupported vm86 subfunction (%ld)\n", subfunction); 4116c30b07fSbellard ret = -TARGET_EINVAL; 41246ddf551Sbellard goto out; 41346ddf551Sbellard case TARGET_VM86_PLUS_INSTALL_CHECK: 41446ddf551Sbellard /* NOTE: on old vm86 stuff this will return the error 41546ddf551Sbellard from verify_area(), because the subfunction is 41646ddf551Sbellard interpreted as (invalid) address to vm86_struct. 41746ddf551Sbellard So the installation check works. 41846ddf551Sbellard */ 41946ddf551Sbellard ret = 0; 42046ddf551Sbellard goto out; 42146ddf551Sbellard } 42246ddf551Sbellard 42346ddf551Sbellard /* save current CPU regs */ 42446ddf551Sbellard ts->vm86_saved_regs.eax = 0; /* default vm86 syscall return code */ 42546ddf551Sbellard ts->vm86_saved_regs.ebx = env->regs[R_EBX]; 42646ddf551Sbellard ts->vm86_saved_regs.ecx = env->regs[R_ECX]; 42746ddf551Sbellard ts->vm86_saved_regs.edx = env->regs[R_EDX]; 42846ddf551Sbellard ts->vm86_saved_regs.esi = env->regs[R_ESI]; 42946ddf551Sbellard ts->vm86_saved_regs.edi = env->regs[R_EDI]; 43046ddf551Sbellard ts->vm86_saved_regs.ebp = env->regs[R_EBP]; 43146ddf551Sbellard ts->vm86_saved_regs.esp = env->regs[R_ESP]; 43246ddf551Sbellard ts->vm86_saved_regs.eflags = env->eflags; 43346ddf551Sbellard ts->vm86_saved_regs.eip = env->eip; 434c05bab77Sbellard ts->vm86_saved_regs.cs = env->segs[R_CS].selector; 435c05bab77Sbellard ts->vm86_saved_regs.ss = env->segs[R_SS].selector; 436c05bab77Sbellard ts->vm86_saved_regs.ds = env->segs[R_DS].selector; 437c05bab77Sbellard ts->vm86_saved_regs.es = env->segs[R_ES].selector; 438c05bab77Sbellard ts->vm86_saved_regs.fs = env->segs[R_FS].selector; 439c05bab77Sbellard ts->vm86_saved_regs.gs = env->segs[R_GS].selector; 44046ddf551Sbellard 44153a5960aSpbrook ts->target_v86 = vm86_addr; 442579a97f7Sbellard if (!lock_user_struct(VERIFY_READ, target_v86, vm86_addr, 1)) 4436c30b07fSbellard return -TARGET_EFAULT; 44446ddf551Sbellard /* build vm86 CPU state */ 44546ddf551Sbellard ts->v86flags = tswap32(target_v86->regs.eflags); 44646ddf551Sbellard env->eflags = (env->eflags & ~SAFE_MASK) | 44746ddf551Sbellard (tswap32(target_v86->regs.eflags) & SAFE_MASK) | VM_MASK; 448b333af06Sbellard 449cbb21eedSMatthias Braun ts->vm86plus.cpu_type = tswapal(target_v86->cpu_type); 450b333af06Sbellard switch (ts->vm86plus.cpu_type) { 451b333af06Sbellard case TARGET_CPU_286: 452b333af06Sbellard ts->v86mask = 0; 453b333af06Sbellard break; 454b333af06Sbellard case TARGET_CPU_386: 455b333af06Sbellard ts->v86mask = NT_MASK | IOPL_MASK; 456b333af06Sbellard break; 457b333af06Sbellard case TARGET_CPU_486: 458b333af06Sbellard ts->v86mask = AC_MASK | NT_MASK | IOPL_MASK; 459b333af06Sbellard break; 460b333af06Sbellard default: 46146ddf551Sbellard ts->v86mask = ID_MASK | AC_MASK | NT_MASK | IOPL_MASK; 462b333af06Sbellard break; 463b333af06Sbellard } 46446ddf551Sbellard 46546ddf551Sbellard env->regs[R_EBX] = tswap32(target_v86->regs.ebx); 46646ddf551Sbellard env->regs[R_ECX] = tswap32(target_v86->regs.ecx); 46746ddf551Sbellard env->regs[R_EDX] = tswap32(target_v86->regs.edx); 46846ddf551Sbellard env->regs[R_ESI] = tswap32(target_v86->regs.esi); 46946ddf551Sbellard env->regs[R_EDI] = tswap32(target_v86->regs.edi); 47046ddf551Sbellard env->regs[R_EBP] = tswap32(target_v86->regs.ebp); 47146ddf551Sbellard env->regs[R_ESP] = tswap32(target_v86->regs.esp); 47246ddf551Sbellard env->eip = tswap32(target_v86->regs.eip); 47346ddf551Sbellard cpu_x86_load_seg(env, R_CS, tswap16(target_v86->regs.cs)); 47446ddf551Sbellard cpu_x86_load_seg(env, R_SS, tswap16(target_v86->regs.ss)); 47546ddf551Sbellard cpu_x86_load_seg(env, R_DS, tswap16(target_v86->regs.ds)); 47646ddf551Sbellard cpu_x86_load_seg(env, R_ES, tswap16(target_v86->regs.es)); 47746ddf551Sbellard cpu_x86_load_seg(env, R_FS, tswap16(target_v86->regs.fs)); 47846ddf551Sbellard cpu_x86_load_seg(env, R_GS, tswap16(target_v86->regs.gs)); 47946ddf551Sbellard ret = tswap32(target_v86->regs.eax); /* eax will be restored at 48046ddf551Sbellard the end of the syscall */ 481b333af06Sbellard memcpy(&ts->vm86plus.int_revectored, 482b333af06Sbellard &target_v86->int_revectored, 32); 483b333af06Sbellard memcpy(&ts->vm86plus.int21_revectored, 484b333af06Sbellard &target_v86->int21_revectored, 32); 485cbb21eedSMatthias Braun ts->vm86plus.vm86plus.flags = tswapal(target_v86->vm86plus.flags); 486b333af06Sbellard memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab, 487b333af06Sbellard target_v86->vm86plus.vm86dbg_intxxtab, 32); 48853a5960aSpbrook unlock_user_struct(target_v86, vm86_addr, 0); 489b333af06Sbellard 490d12d51d5Saliguori LOG_VM86("do_vm86: cs:ip=%04x:%04x\n", 491c05bab77Sbellard env->segs[R_CS].selector, env->eip); 49246ddf551Sbellard /* now the virtual CPU is ready for vm86 execution ! */ 49346ddf551Sbellard out: 49446ddf551Sbellard return ret; 49546ddf551Sbellard } 496