1 /* 2 * qemu user cpu loop 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu.h" 22 #include "cpu_loop-common.h" 23 24 void cpu_loop(CPURISCVState *env) 25 { 26 CPUState *cs = CPU(riscv_env_get_cpu(env)); 27 int trapnr, signum, sigcode; 28 target_ulong sigaddr; 29 target_ulong ret; 30 31 for (;;) { 32 cpu_exec_start(cs); 33 trapnr = cpu_exec(cs); 34 cpu_exec_end(cs); 35 process_queued_cpu_work(cs); 36 37 signum = 0; 38 sigcode = 0; 39 sigaddr = 0; 40 41 switch (trapnr) { 42 case EXCP_INTERRUPT: 43 /* just indicate that signals should be handled asap */ 44 break; 45 case EXCP_ATOMIC: 46 cpu_exec_step_atomic(cs); 47 break; 48 case RISCV_EXCP_U_ECALL: 49 env->pc += 4; 50 if (env->gpr[xA7] == TARGET_NR_arch_specific_syscall + 15) { 51 /* riscv_flush_icache_syscall is a no-op in QEMU as 52 self-modifying code is automatically detected */ 53 ret = 0; 54 } else { 55 ret = do_syscall(env, 56 env->gpr[xA7], 57 env->gpr[xA0], 58 env->gpr[xA1], 59 env->gpr[xA2], 60 env->gpr[xA3], 61 env->gpr[xA4], 62 env->gpr[xA5], 63 0, 0); 64 } 65 if (ret == -TARGET_ERESTARTSYS) { 66 env->pc -= 4; 67 } else if (ret != -TARGET_QEMU_ESIGRETURN) { 68 env->gpr[xA0] = ret; 69 } 70 if (cs->singlestep_enabled) { 71 goto gdbstep; 72 } 73 break; 74 case RISCV_EXCP_ILLEGAL_INST: 75 signum = TARGET_SIGILL; 76 sigcode = TARGET_ILL_ILLOPC; 77 break; 78 case RISCV_EXCP_BREAKPOINT: 79 signum = TARGET_SIGTRAP; 80 sigcode = TARGET_TRAP_BRKPT; 81 sigaddr = env->pc; 82 break; 83 case RISCV_EXCP_INST_PAGE_FAULT: 84 case RISCV_EXCP_LOAD_PAGE_FAULT: 85 case RISCV_EXCP_STORE_PAGE_FAULT: 86 signum = TARGET_SIGSEGV; 87 sigcode = TARGET_SEGV_MAPERR; 88 break; 89 case EXCP_DEBUG: 90 gdbstep: 91 signum = gdb_handlesig(cs, TARGET_SIGTRAP); 92 sigcode = TARGET_TRAP_BRKPT; 93 break; 94 default: 95 EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n", 96 trapnr); 97 exit(EXIT_FAILURE); 98 } 99 100 if (signum) { 101 target_siginfo_t info = { 102 .si_signo = signum, 103 .si_errno = 0, 104 .si_code = sigcode, 105 ._sifields._sigfault._addr = sigaddr 106 }; 107 queue_signal(env, info.si_signo, QEMU_SI_KILL, &info); 108 } 109 110 process_pending_signals(env); 111 } 112 } 113 114 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) 115 { 116 env->pc = regs->sepc; 117 env->gpr[xSP] = regs->sp; 118 } 119