xref: /openbmc/qemu/linux-user/mips/cpu_loop.c (revision 3ac25236)
1 /*
2  *  qemu user cpu loop
3  *
4  *  Copyright (c) 2003-2008 Fabrice Bellard
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu.h"
23 #include "user-internals.h"
24 #include "cpu_loop-common.h"
25 #include "signal-common.h"
26 #include "elf.h"
27 #include "internal.h"
28 #include "fpu_helper.h"
29 
30 # ifdef TARGET_ABI_MIPSO32
31 #  define MIPS_SYSCALL_NUMBER_UNUSED -1
32 static const int8_t mips_syscall_args[] = {
33 #include "syscall-args-o32.c.inc"
34 };
35 # endif /* O32 */
36 
37 /* Break codes */
38 enum {
39     BRK_OVERFLOW = 6,
40     BRK_DIVZERO = 7
41 };
42 
43 static void do_tr_or_bp(CPUMIPSState *env, unsigned int code, bool trap)
44 {
45     target_ulong pc = env->active_tc.PC;
46 
47     switch (code) {
48     case BRK_OVERFLOW:
49         force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, pc);
50         break;
51     case BRK_DIVZERO:
52         force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, pc);
53         break;
54     default:
55         if (trap) {
56             force_sig(TARGET_SIGTRAP);
57         } else {
58             force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, pc);
59         }
60         break;
61     }
62 }
63 
64 void cpu_loop(CPUMIPSState *env)
65 {
66     CPUState *cs = env_cpu(env);
67     int trapnr, si_code;
68     unsigned int code;
69     abi_long ret;
70 # ifdef TARGET_ABI_MIPSO32
71     unsigned int syscall_num;
72 # endif
73 
74     for(;;) {
75         cpu_exec_start(cs);
76         trapnr = cpu_exec(cs);
77         cpu_exec_end(cs);
78         process_queued_cpu_work(cs);
79 
80         switch(trapnr) {
81         case EXCP_SYSCALL:
82             env->active_tc.PC += 4;
83 # ifdef TARGET_ABI_MIPSO32
84             syscall_num = env->active_tc.gpr[2] - 4000;
85             if (syscall_num >= sizeof(mips_syscall_args)) {
86                 /* syscall_num is larger that any defined for MIPS O32 */
87                 ret = -TARGET_ENOSYS;
88             } else if (mips_syscall_args[syscall_num] ==
89                        MIPS_SYSCALL_NUMBER_UNUSED) {
90                 /* syscall_num belongs to the range not defined for MIPS O32 */
91                 ret = -TARGET_ENOSYS;
92             } else {
93                 /* syscall_num is valid */
94                 int nb_args;
95                 abi_ulong sp_reg;
96                 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
97 
98                 nb_args = mips_syscall_args[syscall_num];
99                 sp_reg = env->active_tc.gpr[29];
100                 switch (nb_args) {
101                 /* these arguments are taken from the stack */
102                 case 8:
103                     if ((ret = get_user_ual(arg8, sp_reg + 28)) != 0) {
104                         goto done_syscall;
105                     }
106                     /* fall through */
107                 case 7:
108                     if ((ret = get_user_ual(arg7, sp_reg + 24)) != 0) {
109                         goto done_syscall;
110                     }
111                     /* fall through */
112                 case 6:
113                     if ((ret = get_user_ual(arg6, sp_reg + 20)) != 0) {
114                         goto done_syscall;
115                     }
116                     /* fall through */
117                 case 5:
118                     if ((ret = get_user_ual(arg5, sp_reg + 16)) != 0) {
119                         goto done_syscall;
120                     }
121                     /* fall through */
122                 default:
123                     break;
124                 }
125                 ret = do_syscall(env, env->active_tc.gpr[2],
126                                  env->active_tc.gpr[4],
127                                  env->active_tc.gpr[5],
128                                  env->active_tc.gpr[6],
129                                  env->active_tc.gpr[7],
130                                  arg5, arg6, arg7, arg8);
131             }
132 done_syscall:
133 # else
134             ret = do_syscall(env, env->active_tc.gpr[2],
135                              env->active_tc.gpr[4], env->active_tc.gpr[5],
136                              env->active_tc.gpr[6], env->active_tc.gpr[7],
137                              env->active_tc.gpr[8], env->active_tc.gpr[9],
138                              env->active_tc.gpr[10], env->active_tc.gpr[11]);
139 # endif /* O32 */
140             if (ret == -QEMU_ERESTARTSYS) {
141                 env->active_tc.PC -= 4;
142                 break;
143             }
144             if (ret == -QEMU_ESIGRETURN) {
145                 /* Returning from a successful sigreturn syscall.
146                    Avoid clobbering register state.  */
147                 break;
148             }
149             if ((abi_ulong)ret >= (abi_ulong)-1133) {
150                 env->active_tc.gpr[7] = 1; /* error flag */
151                 ret = -ret;
152             } else {
153                 env->active_tc.gpr[7] = 0; /* error flag */
154             }
155             env->active_tc.gpr[2] = ret;
156             break;
157         case EXCP_CpU:
158         case EXCP_RI:
159         case EXCP_DSPDIS:
160             force_sig(TARGET_SIGILL);
161             break;
162         case EXCP_INTERRUPT:
163             /* just indicate that signals should be handled asap */
164             break;
165         case EXCP_DEBUG:
166             force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT,
167                             env->active_tc.PC);
168             break;
169         case EXCP_FPE:
170             si_code = TARGET_FPE_FLTUNK;
171             if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INVALID) {
172                 si_code = TARGET_FPE_FLTINV;
173             } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_DIV0) {
174                 si_code = TARGET_FPE_FLTDIV;
175             } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_OVERFLOW) {
176                 si_code = TARGET_FPE_FLTOVF;
177             } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_UNDERFLOW) {
178                 si_code = TARGET_FPE_FLTUND;
179             } else if (GET_FP_CAUSE(env->active_fpu.fcr31) & FP_INEXACT) {
180                 si_code = TARGET_FPE_FLTRES;
181             }
182             force_sig_fault(TARGET_SIGFPE, si_code, env->active_tc.PC);
183             break;
184 
185         /* The code below was inspired by the MIPS Linux kernel trap
186          * handling code in arch/mips/kernel/traps.c.
187          */
188         case EXCP_BREAK:
189             /*
190              * As described in the original Linux kernel code, the below
191              * checks on 'code' are to work around an old assembly bug.
192              */
193             code = env->error_code;
194             if (code >= (1 << 10)) {
195                 code >>= 10;
196             }
197             do_tr_or_bp(env, code, false);
198             break;
199         case EXCP_TRAP:
200             do_tr_or_bp(env, env->error_code, true);
201             break;
202         case EXCP_ATOMIC:
203             cpu_exec_step_atomic(cs);
204             break;
205         default:
206             EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
207             abort();
208         }
209         process_pending_signals(env);
210     }
211 }
212 
213 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
214 {
215     CPUState *cpu = env_cpu(env);
216     TaskState *ts = cpu->opaque;
217     struct image_info *info = ts->info;
218     int i;
219 
220     struct mode_req {
221         bool single;
222         bool soft;
223         bool fr1;
224         bool frdefault;
225         bool fre;
226     };
227 
228     static const struct mode_req fpu_reqs[] = {
229         [MIPS_ABI_FP_ANY]    = { true,  true,  true,  true,  true  },
230         [MIPS_ABI_FP_DOUBLE] = { false, false, false, true,  true  },
231         [MIPS_ABI_FP_SINGLE] = { true,  false, false, false, false },
232         [MIPS_ABI_FP_SOFT]   = { false, true,  false, false, false },
233         [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
234         [MIPS_ABI_FP_XX]     = { false, false, true,  true,  true  },
235         [MIPS_ABI_FP_64]     = { false, false, true,  false, false },
236         [MIPS_ABI_FP_64A]    = { false, false, true,  false, true  }
237     };
238 
239     /*
240      * Mode requirements when .MIPS.abiflags is not present in the ELF.
241      * Not present means that everything is acceptable except FR1.
242      */
243     static struct mode_req none_req = { true, true, false, true, true };
244 
245     struct mode_req prog_req;
246     struct mode_req interp_req;
247 
248     for(i = 0; i < 32; i++) {
249         env->active_tc.gpr[i] = regs->regs[i];
250     }
251     env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
252     if (regs->cp0_epc & 1) {
253         env->hflags |= MIPS_HFLAG_M16;
254     }
255 
256 #ifdef TARGET_ABI_MIPSO32
257 # define MAX_FP_ABI MIPS_ABI_FP_64A
258 #else
259 # define MAX_FP_ABI MIPS_ABI_FP_SOFT
260 #endif
261      if ((info->fp_abi > MAX_FP_ABI && info->fp_abi != MIPS_ABI_FP_UNKNOWN)
262         || (info->interp_fp_abi > MAX_FP_ABI &&
263             info->interp_fp_abi != MIPS_ABI_FP_UNKNOWN)) {
264         fprintf(stderr, "qemu: Unexpected FPU mode\n");
265         exit(1);
266     }
267 
268     prog_req = (info->fp_abi == MIPS_ABI_FP_UNKNOWN) ? none_req
269                                             : fpu_reqs[info->fp_abi];
270     interp_req = (info->interp_fp_abi == MIPS_ABI_FP_UNKNOWN) ? none_req
271                                             : fpu_reqs[info->interp_fp_abi];
272 
273     prog_req.single &= interp_req.single;
274     prog_req.soft &= interp_req.soft;
275     prog_req.fr1 &= interp_req.fr1;
276     prog_req.frdefault &= interp_req.frdefault;
277     prog_req.fre &= interp_req.fre;
278 
279     bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS_R2 ||
280                               env->insn_flags & ISA_MIPS_R6;
281 
282     if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) {
283         env->CP0_Config5 |= (1 << CP0C5_FRE);
284         if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) {
285             env->hflags |= MIPS_HFLAG_FRE;
286         }
287     } else if ((prog_req.fr1 && prog_req.frdefault) ||
288          (prog_req.single && !prog_req.frdefault)) {
289         if ((env->active_fpu.fcr0 & (1 << FCR0_F64)
290             && cpu_has_mips_r2_r6) || prog_req.fr1) {
291             env->CP0_Status |= (1 << CP0St_FR);
292             env->hflags |= MIPS_HFLAG_F64;
293         }
294     } else  if (!prog_req.fre && !prog_req.frdefault &&
295           !prog_req.fr1 && !prog_req.single && !prog_req.soft) {
296         fprintf(stderr, "qemu: Can't find a matching FPU mode\n");
297         exit(1);
298     }
299 
300     if (env->insn_flags & ISA_NANOMIPS32) {
301         return;
302     }
303     if (((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
304         ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) {
305         if ((env->active_fpu.fcr31_rw_bitmask &
306               (1 << FCR31_NAN2008)) == 0) {
307             fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");
308             exit(1);
309         }
310         if ((info->elf_flags & EF_MIPS_NAN2008) != 0) {
311             env->active_fpu.fcr31 |= (1 << FCR31_NAN2008);
312         } else {
313             env->active_fpu.fcr31 &= ~(1 << FCR31_NAN2008);
314         }
315         restore_snan_bit_mode(env);
316     }
317 }
318