1 /*
2  * host-signal.h: signal info dependent on the host architecture
3  *
4  * Copyright (c) 2003-2005 Fabrice Bellard
5  * Copyright (c) 2021 Linaro Limited
6  *
7  * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
8  * See the COPYING file in the top-level directory.
9  */
10 
11 #ifndef MIPS_HOST_SIGNAL_H
12 #define MIPS_HOST_SIGNAL_H
13 
14 static inline uintptr_t host_signal_pc(ucontext_t *uc)
15 {
16     return uc->uc_mcontext.pc;
17 }
18 
19 static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc)
20 {
21     uc->uc_mcontext.pc = pc;
22 }
23 
24 #if defined(__misp16) || defined(__mips_micromips)
25 #error "Unsupported encoding"
26 #endif
27 
28 static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc)
29 {
30     uint32_t insn = *(uint32_t *)host_signal_pc(uc);
31 
32     /* Detect all store instructions at program counter. */
33     switch ((insn >> 26) & 077) {
34     case 050: /* SB */
35     case 051: /* SH */
36     case 052: /* SWL */
37     case 053: /* SW */
38     case 054: /* SDL */
39     case 055: /* SDR */
40     case 056: /* SWR */
41     case 070: /* SC */
42     case 071: /* SWC1 */
43     case 074: /* SCD */
44     case 075: /* SDC1 */
45     case 077: /* SD */
46 #if !defined(__mips_isa_rev) || __mips_isa_rev < 6
47     case 072: /* SWC2 */
48     case 076: /* SDC2 */
49 #endif
50         return true;
51     case 023: /* COP1X */
52         /*
53          * Required in all versions of MIPS64 since
54          * MIPS64r1 and subsequent versions of MIPS32r2.
55          */
56         switch (insn & 077) {
57         case 010: /* SWXC1 */
58         case 011: /* SDXC1 */
59         case 015: /* SUXC1 */
60             return true;
61         }
62         break;
63     }
64     return false;
65 }
66 
67 #endif
68