1 /* 2 * qemu user cpu loop 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu.h" 22 #include "cpu_loop-common.h" 23 24 static abi_ulong hppa_lws(CPUHPPAState *env) 25 { 26 uint32_t which = env->gr[20]; 27 abi_ulong addr = env->gr[26]; 28 abi_ulong old = env->gr[25]; 29 abi_ulong new = env->gr[24]; 30 abi_ulong size, ret; 31 32 switch (which) { 33 default: 34 return -TARGET_ENOSYS; 35 36 case 0: /* elf32 atomic 32bit cmpxchg */ 37 if ((addr & 3) || !access_ok(VERIFY_WRITE, addr, 4)) { 38 return -TARGET_EFAULT; 39 } 40 old = tswap32(old); 41 new = tswap32(new); 42 ret = qatomic_cmpxchg((uint32_t *)g2h(addr), old, new); 43 ret = tswap32(ret); 44 break; 45 46 case 2: /* elf32 atomic "new" cmpxchg */ 47 size = env->gr[23]; 48 if (size >= 4) { 49 return -TARGET_ENOSYS; 50 } 51 if (((addr | old | new) & ((1 << size) - 1)) 52 || !access_ok(VERIFY_WRITE, addr, 1 << size) 53 || !access_ok(VERIFY_READ, old, 1 << size) 54 || !access_ok(VERIFY_READ, new, 1 << size)) { 55 return -TARGET_EFAULT; 56 } 57 /* Note that below we use host-endian loads so that the cmpxchg 58 can be host-endian as well. */ 59 switch (size) { 60 case 0: 61 old = *(uint8_t *)g2h(old); 62 new = *(uint8_t *)g2h(new); 63 ret = qatomic_cmpxchg((uint8_t *)g2h(addr), old, new); 64 ret = ret != old; 65 break; 66 case 1: 67 old = *(uint16_t *)g2h(old); 68 new = *(uint16_t *)g2h(new); 69 ret = qatomic_cmpxchg((uint16_t *)g2h(addr), old, new); 70 ret = ret != old; 71 break; 72 case 2: 73 old = *(uint32_t *)g2h(old); 74 new = *(uint32_t *)g2h(new); 75 ret = qatomic_cmpxchg((uint32_t *)g2h(addr), old, new); 76 ret = ret != old; 77 break; 78 case 3: 79 { 80 uint64_t o64, n64, r64; 81 o64 = *(uint64_t *)g2h(old); 82 n64 = *(uint64_t *)g2h(new); 83 #ifdef CONFIG_ATOMIC64 84 r64 = qatomic_cmpxchg__nocheck((uint64_t *)g2h(addr), 85 o64, n64); 86 ret = r64 != o64; 87 #else 88 start_exclusive(); 89 r64 = *(uint64_t *)g2h(addr); 90 ret = 1; 91 if (r64 == o64) { 92 *(uint64_t *)g2h(addr) = n64; 93 ret = 0; 94 } 95 end_exclusive(); 96 #endif 97 } 98 break; 99 } 100 break; 101 } 102 103 env->gr[28] = ret; 104 return 0; 105 } 106 107 void cpu_loop(CPUHPPAState *env) 108 { 109 CPUState *cs = env_cpu(env); 110 target_siginfo_t info; 111 abi_ulong ret; 112 int trapnr; 113 114 while (1) { 115 cpu_exec_start(cs); 116 trapnr = cpu_exec(cs); 117 cpu_exec_end(cs); 118 process_queued_cpu_work(cs); 119 120 switch (trapnr) { 121 case EXCP_SYSCALL: 122 ret = do_syscall(env, env->gr[20], 123 env->gr[26], env->gr[25], 124 env->gr[24], env->gr[23], 125 env->gr[22], env->gr[21], 0, 0); 126 switch (ret) { 127 default: 128 env->gr[28] = ret; 129 /* We arrived here by faking the gateway page. Return. */ 130 env->iaoq_f = env->gr[31]; 131 env->iaoq_b = env->gr[31] + 4; 132 break; 133 case -TARGET_ERESTARTSYS: 134 case -TARGET_QEMU_ESIGRETURN: 135 break; 136 } 137 break; 138 case EXCP_SYSCALL_LWS: 139 env->gr[21] = hppa_lws(env); 140 /* We arrived here by faking the gateway page. Return. */ 141 env->iaoq_f = env->gr[31]; 142 env->iaoq_b = env->gr[31] + 4; 143 break; 144 case EXCP_ITLB_MISS: 145 case EXCP_DTLB_MISS: 146 case EXCP_NA_ITLB_MISS: 147 case EXCP_NA_DTLB_MISS: 148 case EXCP_IMP: 149 case EXCP_DMP: 150 case EXCP_DMB: 151 case EXCP_PAGE_REF: 152 case EXCP_DMAR: 153 case EXCP_DMPI: 154 info.si_signo = TARGET_SIGSEGV; 155 info.si_errno = 0; 156 info.si_code = TARGET_SEGV_ACCERR; 157 info._sifields._sigfault._addr = env->cr[CR_IOR]; 158 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 159 break; 160 case EXCP_UNALIGN: 161 info.si_signo = TARGET_SIGBUS; 162 info.si_errno = 0; 163 info.si_code = 0; 164 info._sifields._sigfault._addr = env->cr[CR_IOR]; 165 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 166 break; 167 case EXCP_ILL: 168 case EXCP_PRIV_OPR: 169 case EXCP_PRIV_REG: 170 info.si_signo = TARGET_SIGILL; 171 info.si_errno = 0; 172 info.si_code = TARGET_ILL_ILLOPN; 173 info._sifields._sigfault._addr = env->iaoq_f; 174 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 175 break; 176 case EXCP_OVERFLOW: 177 case EXCP_COND: 178 case EXCP_ASSIST: 179 info.si_signo = TARGET_SIGFPE; 180 info.si_errno = 0; 181 info.si_code = 0; 182 info._sifields._sigfault._addr = env->iaoq_f; 183 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 184 break; 185 case EXCP_DEBUG: 186 info.si_signo = TARGET_SIGTRAP; 187 info.si_errno = 0; 188 info.si_code = TARGET_TRAP_BRKPT; 189 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 190 break; 191 case EXCP_INTERRUPT: 192 /* just indicate that signals should be handled asap */ 193 break; 194 default: 195 g_assert_not_reached(); 196 } 197 process_pending_signals(env); 198 } 199 } 200 201 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) 202 { 203 int i; 204 for (i = 1; i < 32; i++) { 205 env->gr[i] = regs->gr[i]; 206 } 207 env->iaoq_f = regs->iaoq[0]; 208 env->iaoq_b = regs->iaoq[1]; 209 } 210