1 /* 2 * qemu user cpu loop 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu.h" 22 #include "user-internals.h" 23 #include "cpu_loop-common.h" 24 #include "signal-common.h" 25 26 static abi_ulong hppa_lws(CPUHPPAState *env) 27 { 28 CPUState *cs = env_cpu(env); 29 uint32_t which = env->gr[20]; 30 abi_ulong addr = env->gr[26]; 31 abi_ulong old = env->gr[25]; 32 abi_ulong new = env->gr[24]; 33 abi_ulong size, ret; 34 35 switch (which) { 36 default: 37 return -TARGET_ENOSYS; 38 39 case 0: /* elf32 atomic 32bit cmpxchg */ 40 if ((addr & 3) || !access_ok(cs, VERIFY_WRITE, addr, 4)) { 41 return -TARGET_EFAULT; 42 } 43 old = tswap32(old); 44 new = tswap32(new); 45 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new); 46 ret = tswap32(ret); 47 break; 48 49 case 2: /* elf32 atomic "new" cmpxchg */ 50 size = env->gr[23]; 51 if (size >= 4) { 52 return -TARGET_ENOSYS; 53 } 54 if (((addr | old | new) & ((1 << size) - 1)) 55 || !access_ok(cs, VERIFY_WRITE, addr, 1 << size) 56 || !access_ok(cs, VERIFY_READ, old, 1 << size) 57 || !access_ok(cs, VERIFY_READ, new, 1 << size)) { 58 return -TARGET_EFAULT; 59 } 60 /* Note that below we use host-endian loads so that the cmpxchg 61 can be host-endian as well. */ 62 switch (size) { 63 case 0: 64 old = *(uint8_t *)g2h(cs, old); 65 new = *(uint8_t *)g2h(cs, new); 66 ret = qatomic_cmpxchg((uint8_t *)g2h(cs, addr), old, new); 67 ret = ret != old; 68 break; 69 case 1: 70 old = *(uint16_t *)g2h(cs, old); 71 new = *(uint16_t *)g2h(cs, new); 72 ret = qatomic_cmpxchg((uint16_t *)g2h(cs, addr), old, new); 73 ret = ret != old; 74 break; 75 case 2: 76 old = *(uint32_t *)g2h(cs, old); 77 new = *(uint32_t *)g2h(cs, new); 78 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new); 79 ret = ret != old; 80 break; 81 case 3: 82 { 83 uint64_t o64, n64, r64; 84 o64 = *(uint64_t *)g2h(cs, old); 85 n64 = *(uint64_t *)g2h(cs, new); 86 #ifdef CONFIG_ATOMIC64 87 r64 = qatomic_cmpxchg__nocheck((aligned_uint64_t *)g2h(cs, addr), 88 o64, n64); 89 ret = r64 != o64; 90 #else 91 start_exclusive(); 92 r64 = *(uint64_t *)g2h(cs, addr); 93 ret = 1; 94 if (r64 == o64) { 95 *(uint64_t *)g2h(cs, addr) = n64; 96 ret = 0; 97 } 98 end_exclusive(); 99 #endif 100 } 101 break; 102 } 103 break; 104 } 105 106 env->gr[28] = ret; 107 return 0; 108 } 109 110 void cpu_loop(CPUHPPAState *env) 111 { 112 CPUState *cs = env_cpu(env); 113 target_siginfo_t info; 114 abi_ulong ret; 115 int trapnr; 116 117 while (1) { 118 cpu_exec_start(cs); 119 trapnr = cpu_exec(cs); 120 cpu_exec_end(cs); 121 process_queued_cpu_work(cs); 122 123 switch (trapnr) { 124 case EXCP_SYSCALL: 125 ret = do_syscall(env, env->gr[20], 126 env->gr[26], env->gr[25], 127 env->gr[24], env->gr[23], 128 env->gr[22], env->gr[21], 0, 0); 129 switch (ret) { 130 default: 131 env->gr[28] = ret; 132 /* We arrived here by faking the gateway page. Return. */ 133 env->iaoq_f = env->gr[31]; 134 env->iaoq_b = env->gr[31] + 4; 135 break; 136 case -TARGET_ERESTARTSYS: 137 case -TARGET_QEMU_ESIGRETURN: 138 break; 139 } 140 break; 141 case EXCP_SYSCALL_LWS: 142 env->gr[21] = hppa_lws(env); 143 /* We arrived here by faking the gateway page. Return. */ 144 env->iaoq_f = env->gr[31]; 145 env->iaoq_b = env->gr[31] + 4; 146 break; 147 case EXCP_ITLB_MISS: 148 case EXCP_DTLB_MISS: 149 case EXCP_NA_ITLB_MISS: 150 case EXCP_NA_DTLB_MISS: 151 case EXCP_IMP: 152 case EXCP_DMP: 153 case EXCP_DMB: 154 case EXCP_PAGE_REF: 155 case EXCP_DMAR: 156 case EXCP_DMPI: 157 info.si_signo = TARGET_SIGSEGV; 158 info.si_errno = 0; 159 info.si_code = TARGET_SEGV_ACCERR; 160 info._sifields._sigfault._addr = env->cr[CR_IOR]; 161 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 162 break; 163 case EXCP_UNALIGN: 164 info.si_signo = TARGET_SIGBUS; 165 info.si_errno = 0; 166 info.si_code = 0; 167 info._sifields._sigfault._addr = env->cr[CR_IOR]; 168 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 169 break; 170 case EXCP_ILL: 171 case EXCP_PRIV_OPR: 172 case EXCP_PRIV_REG: 173 info.si_signo = TARGET_SIGILL; 174 info.si_errno = 0; 175 info.si_code = TARGET_ILL_ILLOPN; 176 info._sifields._sigfault._addr = env->iaoq_f; 177 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 178 break; 179 case EXCP_OVERFLOW: 180 case EXCP_COND: 181 case EXCP_ASSIST: 182 info.si_signo = TARGET_SIGFPE; 183 info.si_errno = 0; 184 info.si_code = 0; 185 info._sifields._sigfault._addr = env->iaoq_f; 186 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 187 break; 188 case EXCP_DEBUG: 189 info.si_signo = TARGET_SIGTRAP; 190 info.si_errno = 0; 191 info.si_code = TARGET_TRAP_BRKPT; 192 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 193 break; 194 case EXCP_INTERRUPT: 195 /* just indicate that signals should be handled asap */ 196 break; 197 default: 198 g_assert_not_reached(); 199 } 200 process_pending_signals(env); 201 } 202 } 203 204 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) 205 { 206 int i; 207 for (i = 1; i < 32; i++) { 208 env->gr[i] = regs->gr[i]; 209 } 210 env->iaoq_f = regs->iaoq[0]; 211 env->iaoq_b = regs->iaoq[1]; 212 } 213