1 /* 2 * qemu user cpu loop 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu.h" 22 #include "cpu_loop-common.h" 23 #include "signal-common.h" 24 25 static abi_ulong hppa_lws(CPUHPPAState *env) 26 { 27 CPUState *cs = env_cpu(env); 28 uint32_t which = env->gr[20]; 29 abi_ulong addr = env->gr[26]; 30 abi_ulong old = env->gr[25]; 31 abi_ulong new = env->gr[24]; 32 abi_ulong size, ret; 33 34 switch (which) { 35 default: 36 return -TARGET_ENOSYS; 37 38 case 0: /* elf32 atomic 32bit cmpxchg */ 39 if ((addr & 3) || !access_ok(cs, VERIFY_WRITE, addr, 4)) { 40 return -TARGET_EFAULT; 41 } 42 old = tswap32(old); 43 new = tswap32(new); 44 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new); 45 ret = tswap32(ret); 46 break; 47 48 case 2: /* elf32 atomic "new" cmpxchg */ 49 size = env->gr[23]; 50 if (size >= 4) { 51 return -TARGET_ENOSYS; 52 } 53 if (((addr | old | new) & ((1 << size) - 1)) 54 || !access_ok(cs, VERIFY_WRITE, addr, 1 << size) 55 || !access_ok(cs, VERIFY_READ, old, 1 << size) 56 || !access_ok(cs, VERIFY_READ, new, 1 << size)) { 57 return -TARGET_EFAULT; 58 } 59 /* Note that below we use host-endian loads so that the cmpxchg 60 can be host-endian as well. */ 61 switch (size) { 62 case 0: 63 old = *(uint8_t *)g2h(cs, old); 64 new = *(uint8_t *)g2h(cs, new); 65 ret = qatomic_cmpxchg((uint8_t *)g2h(cs, addr), old, new); 66 ret = ret != old; 67 break; 68 case 1: 69 old = *(uint16_t *)g2h(cs, old); 70 new = *(uint16_t *)g2h(cs, new); 71 ret = qatomic_cmpxchg((uint16_t *)g2h(cs, addr), old, new); 72 ret = ret != old; 73 break; 74 case 2: 75 old = *(uint32_t *)g2h(cs, old); 76 new = *(uint32_t *)g2h(cs, new); 77 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new); 78 ret = ret != old; 79 break; 80 case 3: 81 { 82 uint64_t o64, n64, r64; 83 o64 = *(uint64_t *)g2h(cs, old); 84 n64 = *(uint64_t *)g2h(cs, new); 85 #ifdef CONFIG_ATOMIC64 86 r64 = qatomic_cmpxchg__nocheck((aligned_uint64_t *)g2h(cs, addr), 87 o64, n64); 88 ret = r64 != o64; 89 #else 90 start_exclusive(); 91 r64 = *(uint64_t *)g2h(cs, addr); 92 ret = 1; 93 if (r64 == o64) { 94 *(uint64_t *)g2h(cs, addr) = n64; 95 ret = 0; 96 } 97 end_exclusive(); 98 #endif 99 } 100 break; 101 } 102 break; 103 } 104 105 env->gr[28] = ret; 106 return 0; 107 } 108 109 void cpu_loop(CPUHPPAState *env) 110 { 111 CPUState *cs = env_cpu(env); 112 target_siginfo_t info; 113 abi_ulong ret; 114 int trapnr; 115 116 while (1) { 117 cpu_exec_start(cs); 118 trapnr = cpu_exec(cs); 119 cpu_exec_end(cs); 120 process_queued_cpu_work(cs); 121 122 switch (trapnr) { 123 case EXCP_SYSCALL: 124 ret = do_syscall(env, env->gr[20], 125 env->gr[26], env->gr[25], 126 env->gr[24], env->gr[23], 127 env->gr[22], env->gr[21], 0, 0); 128 switch (ret) { 129 default: 130 env->gr[28] = ret; 131 /* We arrived here by faking the gateway page. Return. */ 132 env->iaoq_f = env->gr[31]; 133 env->iaoq_b = env->gr[31] + 4; 134 break; 135 case -TARGET_ERESTARTSYS: 136 case -TARGET_QEMU_ESIGRETURN: 137 break; 138 } 139 break; 140 case EXCP_SYSCALL_LWS: 141 env->gr[21] = hppa_lws(env); 142 /* We arrived here by faking the gateway page. Return. */ 143 env->iaoq_f = env->gr[31]; 144 env->iaoq_b = env->gr[31] + 4; 145 break; 146 case EXCP_ITLB_MISS: 147 case EXCP_DTLB_MISS: 148 case EXCP_NA_ITLB_MISS: 149 case EXCP_NA_DTLB_MISS: 150 case EXCP_IMP: 151 case EXCP_DMP: 152 case EXCP_DMB: 153 case EXCP_PAGE_REF: 154 case EXCP_DMAR: 155 case EXCP_DMPI: 156 info.si_signo = TARGET_SIGSEGV; 157 info.si_errno = 0; 158 info.si_code = TARGET_SEGV_ACCERR; 159 info._sifields._sigfault._addr = env->cr[CR_IOR]; 160 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 161 break; 162 case EXCP_UNALIGN: 163 info.si_signo = TARGET_SIGBUS; 164 info.si_errno = 0; 165 info.si_code = 0; 166 info._sifields._sigfault._addr = env->cr[CR_IOR]; 167 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 168 break; 169 case EXCP_ILL: 170 case EXCP_PRIV_OPR: 171 case EXCP_PRIV_REG: 172 info.si_signo = TARGET_SIGILL; 173 info.si_errno = 0; 174 info.si_code = TARGET_ILL_ILLOPN; 175 info._sifields._sigfault._addr = env->iaoq_f; 176 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 177 break; 178 case EXCP_OVERFLOW: 179 case EXCP_COND: 180 case EXCP_ASSIST: 181 info.si_signo = TARGET_SIGFPE; 182 info.si_errno = 0; 183 info.si_code = 0; 184 info._sifields._sigfault._addr = env->iaoq_f; 185 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 186 break; 187 case EXCP_DEBUG: 188 info.si_signo = TARGET_SIGTRAP; 189 info.si_errno = 0; 190 info.si_code = TARGET_TRAP_BRKPT; 191 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); 192 break; 193 case EXCP_INTERRUPT: 194 /* just indicate that signals should be handled asap */ 195 break; 196 default: 197 g_assert_not_reached(); 198 } 199 process_pending_signals(env); 200 } 201 } 202 203 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) 204 { 205 int i; 206 for (i = 1; i < 32; i++) { 207 env->gr[i] = regs->gr[i]; 208 } 209 env->iaoq_f = regs->iaoq[0]; 210 env->iaoq_b = regs->iaoq[1]; 211 } 212