1 /* 2 * qemu user cpu loop 3 * 4 * Copyright (c) 2003-2008 Fabrice Bellard 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu.h" 22 #include "user-internals.h" 23 #include "cpu_loop-common.h" 24 #include "signal-common.h" 25 26 static abi_ulong hppa_lws(CPUHPPAState *env) 27 { 28 CPUState *cs = env_cpu(env); 29 uint32_t which = env->gr[20]; 30 abi_ulong addr = env->gr[26]; 31 abi_ulong old = env->gr[25]; 32 abi_ulong new = env->gr[24]; 33 abi_ulong size, ret; 34 35 switch (which) { 36 default: 37 return -TARGET_ENOSYS; 38 39 case 0: /* elf32 atomic 32bit cmpxchg */ 40 if ((addr & 3) || !access_ok(cs, VERIFY_WRITE, addr, 4)) { 41 return -TARGET_EFAULT; 42 } 43 old = tswap32(old); 44 new = tswap32(new); 45 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new); 46 ret = tswap32(ret); 47 break; 48 49 case 2: /* elf32 atomic "new" cmpxchg */ 50 size = env->gr[23]; 51 if (size >= 4) { 52 return -TARGET_ENOSYS; 53 } 54 if (((addr | old | new) & ((1 << size) - 1)) 55 || !access_ok(cs, VERIFY_WRITE, addr, 1 << size) 56 || !access_ok(cs, VERIFY_READ, old, 1 << size) 57 || !access_ok(cs, VERIFY_READ, new, 1 << size)) { 58 return -TARGET_EFAULT; 59 } 60 /* Note that below we use host-endian loads so that the cmpxchg 61 can be host-endian as well. */ 62 switch (size) { 63 case 0: 64 old = *(uint8_t *)g2h(cs, old); 65 new = *(uint8_t *)g2h(cs, new); 66 ret = qatomic_cmpxchg((uint8_t *)g2h(cs, addr), old, new); 67 ret = ret != old; 68 break; 69 case 1: 70 old = *(uint16_t *)g2h(cs, old); 71 new = *(uint16_t *)g2h(cs, new); 72 ret = qatomic_cmpxchg((uint16_t *)g2h(cs, addr), old, new); 73 ret = ret != old; 74 break; 75 case 2: 76 old = *(uint32_t *)g2h(cs, old); 77 new = *(uint32_t *)g2h(cs, new); 78 ret = qatomic_cmpxchg((uint32_t *)g2h(cs, addr), old, new); 79 ret = ret != old; 80 break; 81 case 3: 82 { 83 uint64_t o64, n64, r64; 84 o64 = *(uint64_t *)g2h(cs, old); 85 n64 = *(uint64_t *)g2h(cs, new); 86 #ifdef CONFIG_ATOMIC64 87 r64 = qatomic_cmpxchg__nocheck((aligned_uint64_t *)g2h(cs, addr), 88 o64, n64); 89 ret = r64 != o64; 90 #else 91 start_exclusive(); 92 r64 = *(uint64_t *)g2h(cs, addr); 93 ret = 1; 94 if (r64 == o64) { 95 *(uint64_t *)g2h(cs, addr) = n64; 96 ret = 0; 97 } 98 end_exclusive(); 99 #endif 100 } 101 break; 102 default: 103 g_assert_not_reached(); 104 } 105 break; 106 } 107 108 env->gr[28] = ret; 109 return 0; 110 } 111 112 void cpu_loop(CPUHPPAState *env) 113 { 114 CPUState *cs = env_cpu(env); 115 abi_ulong ret; 116 int trapnr; 117 118 while (1) { 119 cpu_exec_start(cs); 120 trapnr = cpu_exec(cs); 121 cpu_exec_end(cs); 122 process_queued_cpu_work(cs); 123 124 switch (trapnr) { 125 case EXCP_SYSCALL: 126 ret = do_syscall(env, env->gr[20], 127 env->gr[26], env->gr[25], 128 env->gr[24], env->gr[23], 129 env->gr[22], env->gr[21], 0, 0); 130 switch (ret) { 131 default: 132 env->gr[28] = ret; 133 /* We arrived here by faking the gateway page. Return. */ 134 env->iaoq_f = env->gr[31] | PRIV_USER; 135 env->iaoq_b = env->iaoq_f + 4; 136 break; 137 case -QEMU_ERESTARTSYS: 138 case -QEMU_ESIGRETURN: 139 break; 140 } 141 break; 142 case EXCP_SYSCALL_LWS: 143 env->gr[21] = hppa_lws(env); 144 /* We arrived here by faking the gateway page. Return. */ 145 env->iaoq_f = env->gr[31] | PRIV_USER; 146 env->iaoq_b = env->iaoq_f + 4; 147 break; 148 case EXCP_IMP: 149 force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR, env->iaoq_f); 150 break; 151 case EXCP_ILL: 152 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f); 153 break; 154 case EXCP_PRIV_OPR: 155 /* check for glibc ABORT_INSTRUCTION "iitlbp %r0,(%sr0, %r0)" */ 156 if (env->cr[CR_IIR] == 0x04000000) { 157 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f); 158 } else { 159 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->iaoq_f); 160 } 161 break; 162 case EXCP_PRIV_REG: 163 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVREG, env->iaoq_f); 164 break; 165 case EXCP_OVERFLOW: 166 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->iaoq_f); 167 break; 168 case EXCP_COND: 169 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_CONDTRAP, env->iaoq_f); 170 break; 171 case EXCP_ASSIST: 172 force_sig_fault(TARGET_SIGFPE, 0, env->iaoq_f); 173 break; 174 case EXCP_BREAK: 175 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->iaoq_f); 176 break; 177 case EXCP_DEBUG: 178 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->iaoq_f); 179 break; 180 case EXCP_INTERRUPT: 181 /* just indicate that signals should be handled asap */ 182 break; 183 default: 184 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr); 185 abort(); 186 } 187 process_pending_signals(env); 188 } 189 } 190 191 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) 192 { 193 int i; 194 for (i = 1; i < 32; i++) { 195 env->gr[i] = regs->gr[i]; 196 } 197 env->iaoq_f = regs->iaoq[0]; 198 env->iaoq_b = regs->iaoq[1]; 199 } 200