1 #ifndef TARGET_SYSCALL_H 2 #define TARGET_SYSCALL_H 3 4 /* this struct defines the way the registers are stored on the 5 stack during a system call. */ 6 7 struct target_pt_regs { 8 abi_long uregs[18]; 9 }; 10 11 #define ARM_cpsr uregs[16] 12 #define ARM_pc uregs[15] 13 #define ARM_lr uregs[14] 14 #define ARM_sp uregs[13] 15 #define ARM_ip uregs[12] 16 #define ARM_fp uregs[11] 17 #define ARM_r10 uregs[10] 18 #define ARM_r9 uregs[9] 19 #define ARM_r8 uregs[8] 20 #define ARM_r7 uregs[7] 21 #define ARM_r6 uregs[6] 22 #define ARM_r5 uregs[5] 23 #define ARM_r4 uregs[4] 24 #define ARM_r3 uregs[3] 25 #define ARM_r2 uregs[2] 26 #define ARM_r1 uregs[1] 27 #define ARM_r0 uregs[0] 28 #define ARM_ORIG_r0 uregs[17] 29 30 #define ARM_SYSCALL_BASE 0x900000 31 #define ARM_THUMB_SYSCALL 0 32 33 #define ARM_NR_BASE 0xf0000 34 #define ARM_NR_breakpoint (ARM_NR_BASE + 1) 35 #define ARM_NR_cacheflush (ARM_NR_BASE + 2) 36 #define ARM_NR_set_tls (ARM_NR_BASE + 5) 37 38 #define ARM_NR_semihosting 0x123456 39 #define ARM_NR_thumb_semihosting 0xAB 40 41 #if defined(TARGET_WORDS_BIGENDIAN) 42 #define UNAME_MACHINE "armv5teb" 43 #else 44 #define UNAME_MACHINE "armv5tel" 45 #endif 46 #define UNAME_MINIMUM_RELEASE "2.6.32" 47 48 #define TARGET_CLONE_BACKWARDS 49 50 #define TARGET_MINSIGSTKSZ 2048 51 #define TARGET_MLOCKALL_MCL_CURRENT 1 52 #define TARGET_MLOCKALL_MCL_FUTURE 2 53 54 #endif /* TARGET_SYSCALL_H */ 55