xref: /openbmc/qemu/linux-user/arm/target_proc.h (revision a55b9e72)
1 /*
2  * Arm specific proc functions for linux-user
3  *
4  * SPDX-License-Identifier: GPL-2.0-or-later
5  */
6 #ifndef ARM_TARGET_PROC_H
7 #define ARM_TARGET_PROC_H
8 
open_cpuinfo(CPUArchState * cpu_env,int fd)9 static int open_cpuinfo(CPUArchState *cpu_env, int fd)
10 {
11     ARMCPU *cpu = env_archcpu(cpu_env);
12     int arch, midr_rev, midr_part, midr_var, midr_impl;
13     target_ulong elf_hwcap = get_elf_hwcap();
14     target_ulong elf_hwcap2 = get_elf_hwcap2();
15     const char *elf_name;
16     int num_cpus, len_part, len_var;
17 
18 #if TARGET_BIG_ENDIAN
19 # define END_SUFFIX "b"
20 #else
21 # define END_SUFFIX "l"
22 #endif
23 
24     arch = 8;
25     elf_name = "v8" END_SUFFIX;
26     midr_rev = FIELD_EX32(cpu->midr, MIDR_EL1, REVISION);
27     midr_part = FIELD_EX32(cpu->midr, MIDR_EL1, PARTNUM);
28     midr_var = FIELD_EX32(cpu->midr, MIDR_EL1, VARIANT);
29     midr_impl = FIELD_EX32(cpu->midr, MIDR_EL1, IMPLEMENTER);
30     len_part = 3;
31     len_var = 1;
32 
33 #ifndef TARGET_AARCH64
34     /* For simplicity, treat ARMv8 as an arm64 kernel with CONFIG_COMPAT. */
35     if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) {
36         if (arm_feature(&cpu->env, ARM_FEATURE_V7)) {
37             arch = 7;
38             midr_var = (cpu->midr >> 16) & 0x7f;
39             len_var = 2;
40             if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
41                 elf_name = "armv7m" END_SUFFIX;
42             } else {
43                 elf_name = "armv7" END_SUFFIX;
44             }
45         } else {
46             midr_part = cpu->midr >> 4;
47             len_part = 7;
48             if (arm_feature(&cpu->env, ARM_FEATURE_V6)) {
49                 arch = 6;
50                 elf_name = "armv6" END_SUFFIX;
51             } else if (arm_feature(&cpu->env, ARM_FEATURE_V5)) {
52                 arch = 5;
53                 elf_name = "armv5t" END_SUFFIX;
54             } else {
55                 arch = 4;
56                 elf_name = "armv4" END_SUFFIX;
57             }
58         }
59     }
60 #endif
61 
62 #undef END_SUFFIX
63 
64     num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
65     for (int i = 0; i < num_cpus; i++) {
66         dprintf(fd,
67                 "processor\t: %d\n"
68                 "model name\t: ARMv%d Processor rev %d (%s)\n"
69                 "BogoMIPS\t: 100.00\n"
70                 "Features\t:",
71                 i, arch, midr_rev, elf_name);
72 
73         for (target_ulong j = elf_hwcap; j ; j &= j - 1) {
74             dprintf(fd, " %s", elf_hwcap_str(ctz64(j)));
75         }
76         for (target_ulong j = elf_hwcap2; j ; j &= j - 1) {
77             dprintf(fd, " %s", elf_hwcap2_str(ctz64(j)));
78         }
79 
80         dprintf(fd, "\n"
81                 "CPU implementer\t: 0x%02x\n"
82                 "CPU architecture: %d\n"
83                 "CPU variant\t: 0x%0*x\n",
84                 midr_impl, arch, len_var, midr_var);
85         if (arch >= 7) {
86             dprintf(fd, "CPU part\t: 0x%0*x\n", len_part, midr_part);
87         }
88         dprintf(fd, "CPU revision\t: %d\n\n", midr_rev);
89     }
90 
91     if (arch < 8) {
92         dprintf(fd, "Hardware\t: QEMU v%s %s\n", QEMU_VERSION,
93                 cpu->dtb_compatible ? : "");
94         dprintf(fd, "Revision\t: 0000\n");
95         dprintf(fd, "Serial\t\t: 0000000000000000\n");
96     }
97     return 0;
98 }
99 #define HAVE_ARCH_PROC_CPUINFO
100 
101 #endif /* ARM_TARGET_PROC_H */
102