xref: /openbmc/qemu/linux-user/aarch64/cpu_loop.c (revision 2113aed6)
1 /*
2  *  qemu user cpu loop
3  *
4  *  Copyright (c) 2003-2008 Fabrice Bellard
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu.h"
23 #include "cpu_loop-common.h"
24 #include "signal-common.h"
25 #include "qemu/guest-random.h"
26 #include "semihosting/common-semi.h"
27 #include "target/arm/syndrome.h"
28 
29 #define get_user_code_u32(x, gaddr, env)                \
30     ({ abi_long __r = get_user_u32((x), (gaddr));       \
31         if (!__r && bswap_code(arm_sctlr_b(env))) {     \
32             (x) = bswap32(x);                           \
33         }                                               \
34         __r;                                            \
35     })
36 
37 #define get_user_code_u16(x, gaddr, env)                \
38     ({ abi_long __r = get_user_u16((x), (gaddr));       \
39         if (!__r && bswap_code(arm_sctlr_b(env))) {     \
40             (x) = bswap16(x);                           \
41         }                                               \
42         __r;                                            \
43     })
44 
45 #define get_user_data_u32(x, gaddr, env)                \
46     ({ abi_long __r = get_user_u32((x), (gaddr));       \
47         if (!__r && arm_cpu_bswap_data(env)) {          \
48             (x) = bswap32(x);                           \
49         }                                               \
50         __r;                                            \
51     })
52 
53 #define get_user_data_u16(x, gaddr, env)                \
54     ({ abi_long __r = get_user_u16((x), (gaddr));       \
55         if (!__r && arm_cpu_bswap_data(env)) {          \
56             (x) = bswap16(x);                           \
57         }                                               \
58         __r;                                            \
59     })
60 
61 #define put_user_data_u32(x, gaddr, env)                \
62     ({ typeof(x) __x = (x);                             \
63         if (arm_cpu_bswap_data(env)) {                  \
64             __x = bswap32(__x);                         \
65         }                                               \
66         put_user_u32(__x, (gaddr));                     \
67     })
68 
69 #define put_user_data_u16(x, gaddr, env)                \
70     ({ typeof(x) __x = (x);                             \
71         if (arm_cpu_bswap_data(env)) {                  \
72             __x = bswap16(__x);                         \
73         }                                               \
74         put_user_u16(__x, (gaddr));                     \
75     })
76 
77 /* AArch64 main loop */
78 void cpu_loop(CPUARMState *env)
79 {
80     CPUState *cs = env_cpu(env);
81     int trapnr, ec, fsc;
82     abi_long ret;
83     target_siginfo_t info;
84 
85     for (;;) {
86         cpu_exec_start(cs);
87         trapnr = cpu_exec(cs);
88         cpu_exec_end(cs);
89         process_queued_cpu_work(cs);
90 
91         switch (trapnr) {
92         case EXCP_SWI:
93             ret = do_syscall(env,
94                              env->xregs[8],
95                              env->xregs[0],
96                              env->xregs[1],
97                              env->xregs[2],
98                              env->xregs[3],
99                              env->xregs[4],
100                              env->xregs[5],
101                              0, 0);
102             if (ret == -TARGET_ERESTARTSYS) {
103                 env->pc -= 4;
104             } else if (ret != -TARGET_QEMU_ESIGRETURN) {
105                 env->xregs[0] = ret;
106             }
107             break;
108         case EXCP_INTERRUPT:
109             /* just indicate that signals should be handled asap */
110             break;
111         case EXCP_UDEF:
112             info.si_signo = TARGET_SIGILL;
113             info.si_errno = 0;
114             info.si_code = TARGET_ILL_ILLOPN;
115             info._sifields._sigfault._addr = env->pc;
116             queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
117             break;
118         case EXCP_PREFETCH_ABORT:
119         case EXCP_DATA_ABORT:
120             info.si_signo = TARGET_SIGSEGV;
121             info.si_errno = 0;
122             info._sifields._sigfault._addr = env->exception.vaddress;
123 
124             /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */
125             ec = syn_get_ec(env->exception.syndrome);
126             assert(ec == EC_DATAABORT || ec == EC_INSNABORT);
127 
128             /* Both EC have the same format for FSC, or close enough. */
129             fsc = extract32(env->exception.syndrome, 0, 6);
130             switch (fsc) {
131             case 0x04 ... 0x07: /* Translation fault, level {0-3} */
132                 info.si_code = TARGET_SEGV_MAPERR;
133                 break;
134             case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
135             case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
136                 info.si_code = TARGET_SEGV_ACCERR;
137                 break;
138             case 0x11: /* Synchronous Tag Check Fault */
139                 info.si_code = TARGET_SEGV_MTESERR;
140                 break;
141             default:
142                 g_assert_not_reached();
143             }
144 
145             queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
146             break;
147         case EXCP_DEBUG:
148         case EXCP_BKPT:
149             info.si_signo = TARGET_SIGTRAP;
150             info.si_errno = 0;
151             info.si_code = TARGET_TRAP_BRKPT;
152             queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
153             break;
154         case EXCP_SEMIHOST:
155             env->xregs[0] = do_common_semihosting(cs);
156             env->pc += 4;
157             break;
158         case EXCP_YIELD:
159             /* nothing to do here for user-mode, just resume guest code */
160             break;
161         case EXCP_ATOMIC:
162             cpu_exec_step_atomic(cs);
163             break;
164         default:
165             EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
166             abort();
167         }
168 
169         /* Check for MTE asynchronous faults */
170         if (unlikely(env->cp15.tfsr_el[0])) {
171             env->cp15.tfsr_el[0] = 0;
172             info.si_signo = TARGET_SIGSEGV;
173             info.si_errno = 0;
174             info._sifields._sigfault._addr = 0;
175             info.si_code = TARGET_SEGV_MTEAERR;
176             queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
177         }
178 
179         process_pending_signals(env);
180         /* Exception return on AArch64 always clears the exclusive monitor,
181          * so any return to running guest code implies this.
182          */
183         env->exclusive_addr = -1;
184     }
185 }
186 
187 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
188 {
189     ARMCPU *cpu = env_archcpu(env);
190     CPUState *cs = env_cpu(env);
191     TaskState *ts = cs->opaque;
192     struct image_info *info = ts->info;
193     int i;
194 
195     if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
196         fprintf(stderr,
197                 "The selected ARM CPU does not support 64 bit mode\n");
198         exit(EXIT_FAILURE);
199     }
200 
201     for (i = 0; i < 31; i++) {
202         env->xregs[i] = regs->regs[i];
203     }
204     env->pc = regs->pc;
205     env->xregs[31] = regs->sp;
206 #ifdef TARGET_WORDS_BIGENDIAN
207     env->cp15.sctlr_el[1] |= SCTLR_E0E;
208     for (i = 1; i < 4; ++i) {
209         env->cp15.sctlr_el[i] |= SCTLR_EE;
210     }
211     arm_rebuild_hflags(env);
212 #endif
213 
214     if (cpu_isar_feature(aa64_pauth, cpu)) {
215         qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys));
216     }
217 
218     ts->stack_base = info->start_stack;
219     ts->heap_base = info->brk;
220     /* This will be filled in on the first SYS_HEAPINFO call.  */
221     ts->heap_limit = 0;
222 }
223