xref: /openbmc/qemu/linux-headers/linux/vfio.h (revision fcf5ef2a)
1 /*
2  * VFIO API definition
3  *
4  * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
5  *     Author: Alex Williamson <alex.williamson@redhat.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 #ifndef VFIO_H
12 #define VFIO_H
13 
14 #include <linux/types.h>
15 #include <linux/ioctl.h>
16 
17 #define VFIO_API_VERSION	0
18 
19 
20 /* Kernel & User level defines for VFIO IOCTLs. */
21 
22 /* Extensions */
23 
24 #define VFIO_TYPE1_IOMMU		1
25 #define VFIO_SPAPR_TCE_IOMMU		2
26 #define VFIO_TYPE1v2_IOMMU		3
27 /*
28  * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping).  This
29  * capability is subject to change as groups are added or removed.
30  */
31 #define VFIO_DMA_CC_IOMMU		4
32 
33 /* Check if EEH is supported */
34 #define VFIO_EEH			5
35 
36 /* Two-stage IOMMU */
37 #define VFIO_TYPE1_NESTING_IOMMU	6	/* Implies v2 */
38 
39 #define VFIO_SPAPR_TCE_v2_IOMMU		7
40 
41 /*
42  * The No-IOMMU IOMMU offers no translation or isolation for devices and
43  * supports no ioctls outside of VFIO_CHECK_EXTENSION.  Use of VFIO's No-IOMMU
44  * code will taint the host kernel and should be used with extreme caution.
45  */
46 #define VFIO_NOIOMMU_IOMMU		8
47 
48 /*
49  * The IOCTL interface is designed for extensibility by embedding the
50  * structure length (argsz) and flags into structures passed between
51  * kernel and userspace.  We therefore use the _IO() macro for these
52  * defines to avoid implicitly embedding a size into the ioctl request.
53  * As structure fields are added, argsz will increase to match and flag
54  * bits will be defined to indicate additional fields with valid data.
55  * It's *always* the caller's responsibility to indicate the size of
56  * the structure passed by setting argsz appropriately.
57  */
58 
59 #define VFIO_TYPE	(';')
60 #define VFIO_BASE	100
61 
62 /*
63  * For extension of INFO ioctls, VFIO makes use of a capability chain
64  * designed after PCI/e capabilities.  A flag bit indicates whether
65  * this capability chain is supported and a field defined in the fixed
66  * structure defines the offset of the first capability in the chain.
67  * This field is only valid when the corresponding bit in the flags
68  * bitmap is set.  This offset field is relative to the start of the
69  * INFO buffer, as is the next field within each capability header.
70  * The id within the header is a shared address space per INFO ioctl,
71  * while the version field is specific to the capability id.  The
72  * contents following the header are specific to the capability id.
73  */
74 struct vfio_info_cap_header {
75 	__u16	id;		/* Identifies capability */
76 	__u16	version;	/* Version specific to the capability ID */
77 	__u32	next;		/* Offset of next capability */
78 };
79 
80 /*
81  * Callers of INFO ioctls passing insufficiently sized buffers will see
82  * the capability chain flag bit set, a zero value for the first capability
83  * offset (if available within the provided argsz), and argsz will be
84  * updated to report the necessary buffer size.  For compatibility, the
85  * INFO ioctl will not report error in this case, but the capability chain
86  * will not be available.
87  */
88 
89 /* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
90 
91 /**
92  * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
93  *
94  * Report the version of the VFIO API.  This allows us to bump the entire
95  * API version should we later need to add or change features in incompatible
96  * ways.
97  * Return: VFIO_API_VERSION
98  * Availability: Always
99  */
100 #define VFIO_GET_API_VERSION		_IO(VFIO_TYPE, VFIO_BASE + 0)
101 
102 /**
103  * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
104  *
105  * Check whether an extension is supported.
106  * Return: 0 if not supported, 1 (or some other positive integer) if supported.
107  * Availability: Always
108  */
109 #define VFIO_CHECK_EXTENSION		_IO(VFIO_TYPE, VFIO_BASE + 1)
110 
111 /**
112  * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
113  *
114  * Set the iommu to the given type.  The type must be supported by an
115  * iommu driver as verified by calling CHECK_EXTENSION using the same
116  * type.  A group must be set to this file descriptor before this
117  * ioctl is available.  The IOMMU interfaces enabled by this call are
118  * specific to the value set.
119  * Return: 0 on success, -errno on failure
120  * Availability: When VFIO group attached
121  */
122 #define VFIO_SET_IOMMU			_IO(VFIO_TYPE, VFIO_BASE + 2)
123 
124 /* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */
125 
126 /**
127  * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3,
128  *						struct vfio_group_status)
129  *
130  * Retrieve information about the group.  Fills in provided
131  * struct vfio_group_info.  Caller sets argsz.
132  * Return: 0 on succes, -errno on failure.
133  * Availability: Always
134  */
135 struct vfio_group_status {
136 	__u32	argsz;
137 	__u32	flags;
138 #define VFIO_GROUP_FLAGS_VIABLE		(1 << 0)
139 #define VFIO_GROUP_FLAGS_CONTAINER_SET	(1 << 1)
140 };
141 #define VFIO_GROUP_GET_STATUS		_IO(VFIO_TYPE, VFIO_BASE + 3)
142 
143 /**
144  * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32)
145  *
146  * Set the container for the VFIO group to the open VFIO file
147  * descriptor provided.  Groups may only belong to a single
148  * container.  Containers may, at their discretion, support multiple
149  * groups.  Only when a container is set are all of the interfaces
150  * of the VFIO file descriptor and the VFIO group file descriptor
151  * available to the user.
152  * Return: 0 on success, -errno on failure.
153  * Availability: Always
154  */
155 #define VFIO_GROUP_SET_CONTAINER	_IO(VFIO_TYPE, VFIO_BASE + 4)
156 
157 /**
158  * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5)
159  *
160  * Remove the group from the attached container.  This is the
161  * opposite of the SET_CONTAINER call and returns the group to
162  * an initial state.  All device file descriptors must be released
163  * prior to calling this interface.  When removing the last group
164  * from a container, the IOMMU will be disabled and all state lost,
165  * effectively also returning the VFIO file descriptor to an initial
166  * state.
167  * Return: 0 on success, -errno on failure.
168  * Availability: When attached to container
169  */
170 #define VFIO_GROUP_UNSET_CONTAINER	_IO(VFIO_TYPE, VFIO_BASE + 5)
171 
172 /**
173  * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char)
174  *
175  * Return a new file descriptor for the device object described by
176  * the provided string.  The string should match a device listed in
177  * the devices subdirectory of the IOMMU group sysfs entry.  The
178  * group containing the device must already be added to this context.
179  * Return: new file descriptor on success, -errno on failure.
180  * Availability: When attached to container
181  */
182 #define VFIO_GROUP_GET_DEVICE_FD	_IO(VFIO_TYPE, VFIO_BASE + 6)
183 
184 /* --------------- IOCTLs for DEVICE file descriptors --------------- */
185 
186 /**
187  * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7,
188  *						struct vfio_device_info)
189  *
190  * Retrieve information about the device.  Fills in provided
191  * struct vfio_device_info.  Caller sets argsz.
192  * Return: 0 on success, -errno on failure.
193  */
194 struct vfio_device_info {
195 	__u32	argsz;
196 	__u32	flags;
197 #define VFIO_DEVICE_FLAGS_RESET	(1 << 0)	/* Device supports reset */
198 #define VFIO_DEVICE_FLAGS_PCI	(1 << 1)	/* vfio-pci device */
199 #define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2)	/* vfio-platform device */
200 #define VFIO_DEVICE_FLAGS_AMBA  (1 << 3)	/* vfio-amba device */
201 	__u32	num_regions;	/* Max region index + 1 */
202 	__u32	num_irqs;	/* Max IRQ index + 1 */
203 };
204 #define VFIO_DEVICE_GET_INFO		_IO(VFIO_TYPE, VFIO_BASE + 7)
205 
206 /**
207  * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
208  *				       struct vfio_region_info)
209  *
210  * Retrieve information about a device region.  Caller provides
211  * struct vfio_region_info with index value set.  Caller sets argsz.
212  * Implementation of region mapping is bus driver specific.  This is
213  * intended to describe MMIO, I/O port, as well as bus specific
214  * regions (ex. PCI config space).  Zero sized regions may be used
215  * to describe unimplemented regions (ex. unimplemented PCI BARs).
216  * Return: 0 on success, -errno on failure.
217  */
218 struct vfio_region_info {
219 	__u32	argsz;
220 	__u32	flags;
221 #define VFIO_REGION_INFO_FLAG_READ	(1 << 0) /* Region supports read */
222 #define VFIO_REGION_INFO_FLAG_WRITE	(1 << 1) /* Region supports write */
223 #define VFIO_REGION_INFO_FLAG_MMAP	(1 << 2) /* Region supports mmap */
224 #define VFIO_REGION_INFO_FLAG_CAPS	(1 << 3) /* Info supports caps */
225 	__u32	index;		/* Region index */
226 	__u32	cap_offset;	/* Offset within info struct of first cap */
227 	__u64	size;		/* Region size (bytes) */
228 	__u64	offset;		/* Region offset from start of device fd */
229 };
230 #define VFIO_DEVICE_GET_REGION_INFO	_IO(VFIO_TYPE, VFIO_BASE + 8)
231 
232 /*
233  * The sparse mmap capability allows finer granularity of specifying areas
234  * within a region with mmap support.  When specified, the user should only
235  * mmap the offset ranges specified by the areas array.  mmaps outside of the
236  * areas specified may fail (such as the range covering a PCI MSI-X table) or
237  * may result in improper device behavior.
238  *
239  * The structures below define version 1 of this capability.
240  */
241 #define VFIO_REGION_INFO_CAP_SPARSE_MMAP	1
242 
243 struct vfio_region_sparse_mmap_area {
244 	__u64	offset;	/* Offset of mmap'able area within region */
245 	__u64	size;	/* Size of mmap'able area */
246 };
247 
248 struct vfio_region_info_cap_sparse_mmap {
249 	struct vfio_info_cap_header header;
250 	__u32	nr_areas;
251 	__u32	reserved;
252 	struct vfio_region_sparse_mmap_area areas[];
253 };
254 
255 /*
256  * The device specific type capability allows regions unique to a specific
257  * device or class of devices to be exposed.  This helps solve the problem for
258  * vfio bus drivers of defining which region indexes correspond to which region
259  * on the device, without needing to resort to static indexes, as done by
260  * vfio-pci.  For instance, if we were to go back in time, we might remove
261  * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes
262  * greater than or equal to VFIO_PCI_NUM_REGIONS are device specific and we'd
263  * make a "VGA" device specific type to describe the VGA access space.  This
264  * means that non-VGA devices wouldn't need to waste this index, and thus the
265  * address space associated with it due to implementation of device file
266  * descriptor offsets in vfio-pci.
267  *
268  * The current implementation is now part of the user ABI, so we can't use this
269  * for VGA, but there are other upcoming use cases, such as opregions for Intel
270  * IGD devices and framebuffers for vGPU devices.  We missed VGA, but we'll
271  * use this for future additions.
272  *
273  * The structure below defines version 1 of this capability.
274  */
275 #define VFIO_REGION_INFO_CAP_TYPE	2
276 
277 struct vfio_region_info_cap_type {
278 	struct vfio_info_cap_header header;
279 	__u32 type;	/* global per bus driver */
280 	__u32 subtype;	/* type specific */
281 };
282 
283 #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE	(1 << 31)
284 #define VFIO_REGION_TYPE_PCI_VENDOR_MASK	(0xffff)
285 
286 /* 8086 Vendor sub-types */
287 #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION	(1)
288 #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG	(2)
289 #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG	(3)
290 
291 /**
292  * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
293  *				    struct vfio_irq_info)
294  *
295  * Retrieve information about a device IRQ.  Caller provides
296  * struct vfio_irq_info with index value set.  Caller sets argsz.
297  * Implementation of IRQ mapping is bus driver specific.  Indexes
298  * using multiple IRQs are primarily intended to support MSI-like
299  * interrupt blocks.  Zero count irq blocks may be used to describe
300  * unimplemented interrupt types.
301  *
302  * The EVENTFD flag indicates the interrupt index supports eventfd based
303  * signaling.
304  *
305  * The MASKABLE flags indicates the index supports MASK and UNMASK
306  * actions described below.
307  *
308  * AUTOMASKED indicates that after signaling, the interrupt line is
309  * automatically masked by VFIO and the user needs to unmask the line
310  * to receive new interrupts.  This is primarily intended to distinguish
311  * level triggered interrupts.
312  *
313  * The NORESIZE flag indicates that the interrupt lines within the index
314  * are setup as a set and new subindexes cannot be enabled without first
315  * disabling the entire index.  This is used for interrupts like PCI MSI
316  * and MSI-X where the driver may only use a subset of the available
317  * indexes, but VFIO needs to enable a specific number of vectors
318  * upfront.  In the case of MSI-X, where the user can enable MSI-X and
319  * then add and unmask vectors, it's up to userspace to make the decision
320  * whether to allocate the maximum supported number of vectors or tear
321  * down setup and incrementally increase the vectors as each is enabled.
322  */
323 struct vfio_irq_info {
324 	__u32	argsz;
325 	__u32	flags;
326 #define VFIO_IRQ_INFO_EVENTFD		(1 << 0)
327 #define VFIO_IRQ_INFO_MASKABLE		(1 << 1)
328 #define VFIO_IRQ_INFO_AUTOMASKED	(1 << 2)
329 #define VFIO_IRQ_INFO_NORESIZE		(1 << 3)
330 	__u32	index;		/* IRQ index */
331 	__u32	count;		/* Number of IRQs within this index */
332 };
333 #define VFIO_DEVICE_GET_IRQ_INFO	_IO(VFIO_TYPE, VFIO_BASE + 9)
334 
335 /**
336  * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set)
337  *
338  * Set signaling, masking, and unmasking of interrupts.  Caller provides
339  * struct vfio_irq_set with all fields set.  'start' and 'count' indicate
340  * the range of subindexes being specified.
341  *
342  * The DATA flags specify the type of data provided.  If DATA_NONE, the
343  * operation performs the specified action immediately on the specified
344  * interrupt(s).  For example, to unmask AUTOMASKED interrupt [0,0]:
345  * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1.
346  *
347  * DATA_BOOL allows sparse support for the same on arrays of interrupts.
348  * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]):
349  * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3,
350  * data = {1,0,1}
351  *
352  * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd.
353  * A value of -1 can be used to either de-assign interrupts if already
354  * assigned or skip un-assigned interrupts.  For example, to set an eventfd
355  * to be trigger for interrupts [0,0] and [0,2]:
356  * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3,
357  * data = {fd1, -1, fd2}
358  * If index [0,1] is previously set, two count = 1 ioctls calls would be
359  * required to set [0,0] and [0,2] without changing [0,1].
360  *
361  * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used
362  * with ACTION_TRIGGER to perform kernel level interrupt loopback testing
363  * from userspace (ie. simulate hardware triggering).
364  *
365  * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER
366  * enables the interrupt index for the device.  Individual subindex interrupts
367  * can be disabled using the -1 value for DATA_EVENTFD or the index can be
368  * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0.
369  *
370  * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while
371  * ACTION_TRIGGER specifies kernel->user signaling.
372  */
373 struct vfio_irq_set {
374 	__u32	argsz;
375 	__u32	flags;
376 #define VFIO_IRQ_SET_DATA_NONE		(1 << 0) /* Data not present */
377 #define VFIO_IRQ_SET_DATA_BOOL		(1 << 1) /* Data is bool (u8) */
378 #define VFIO_IRQ_SET_DATA_EVENTFD	(1 << 2) /* Data is eventfd (s32) */
379 #define VFIO_IRQ_SET_ACTION_MASK	(1 << 3) /* Mask interrupt */
380 #define VFIO_IRQ_SET_ACTION_UNMASK	(1 << 4) /* Unmask interrupt */
381 #define VFIO_IRQ_SET_ACTION_TRIGGER	(1 << 5) /* Trigger interrupt */
382 	__u32	index;
383 	__u32	start;
384 	__u32	count;
385 	__u8	data[];
386 };
387 #define VFIO_DEVICE_SET_IRQS		_IO(VFIO_TYPE, VFIO_BASE + 10)
388 
389 #define VFIO_IRQ_SET_DATA_TYPE_MASK	(VFIO_IRQ_SET_DATA_NONE | \
390 					 VFIO_IRQ_SET_DATA_BOOL | \
391 					 VFIO_IRQ_SET_DATA_EVENTFD)
392 #define VFIO_IRQ_SET_ACTION_TYPE_MASK	(VFIO_IRQ_SET_ACTION_MASK | \
393 					 VFIO_IRQ_SET_ACTION_UNMASK | \
394 					 VFIO_IRQ_SET_ACTION_TRIGGER)
395 /**
396  * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11)
397  *
398  * Reset a device.
399  */
400 #define VFIO_DEVICE_RESET		_IO(VFIO_TYPE, VFIO_BASE + 11)
401 
402 /*
403  * The VFIO-PCI bus driver makes use of the following fixed region and
404  * IRQ index mapping.  Unimplemented regions return a size of zero.
405  * Unimplemented IRQ types return a count of zero.
406  */
407 
408 enum {
409 	VFIO_PCI_BAR0_REGION_INDEX,
410 	VFIO_PCI_BAR1_REGION_INDEX,
411 	VFIO_PCI_BAR2_REGION_INDEX,
412 	VFIO_PCI_BAR3_REGION_INDEX,
413 	VFIO_PCI_BAR4_REGION_INDEX,
414 	VFIO_PCI_BAR5_REGION_INDEX,
415 	VFIO_PCI_ROM_REGION_INDEX,
416 	VFIO_PCI_CONFIG_REGION_INDEX,
417 	/*
418 	 * Expose VGA regions defined for PCI base class 03, subclass 00.
419 	 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
420 	 * as well as the MMIO range 0xa0000 to 0xbffff.  Each implemented
421 	 * range is found at it's identity mapped offset from the region
422 	 * offset, for example 0x3b0 is region_info.offset + 0x3b0.  Areas
423 	 * between described ranges are unimplemented.
424 	 */
425 	VFIO_PCI_VGA_REGION_INDEX,
426 	VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */
427 				 /* device specific cap to define content. */
428 };
429 
430 enum {
431 	VFIO_PCI_INTX_IRQ_INDEX,
432 	VFIO_PCI_MSI_IRQ_INDEX,
433 	VFIO_PCI_MSIX_IRQ_INDEX,
434 	VFIO_PCI_ERR_IRQ_INDEX,
435 	VFIO_PCI_REQ_IRQ_INDEX,
436 	VFIO_PCI_NUM_IRQS
437 };
438 
439 /**
440  * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
441  *					      struct vfio_pci_hot_reset_info)
442  *
443  * Return: 0 on success, -errno on failure:
444  *	-enospc = insufficient buffer, -enodev = unsupported for device.
445  */
446 struct vfio_pci_dependent_device {
447 	__u32	group_id;
448 	__u16	segment;
449 	__u8	bus;
450 	__u8	devfn; /* Use PCI_SLOT/PCI_FUNC */
451 };
452 
453 struct vfio_pci_hot_reset_info {
454 	__u32	argsz;
455 	__u32	flags;
456 	__u32	count;
457 	struct vfio_pci_dependent_device	devices[];
458 };
459 
460 #define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO	_IO(VFIO_TYPE, VFIO_BASE + 12)
461 
462 /**
463  * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
464  *				    struct vfio_pci_hot_reset)
465  *
466  * Return: 0 on success, -errno on failure.
467  */
468 struct vfio_pci_hot_reset {
469 	__u32	argsz;
470 	__u32	flags;
471 	__u32	count;
472 	__s32	group_fds[];
473 };
474 
475 #define VFIO_DEVICE_PCI_HOT_RESET	_IO(VFIO_TYPE, VFIO_BASE + 13)
476 
477 /* -------- API for Type1 VFIO IOMMU -------- */
478 
479 /**
480  * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info)
481  *
482  * Retrieve information about the IOMMU object. Fills in provided
483  * struct vfio_iommu_info. Caller sets argsz.
484  *
485  * XXX Should we do these by CHECK_EXTENSION too?
486  */
487 struct vfio_iommu_type1_info {
488 	__u32	argsz;
489 	__u32	flags;
490 #define VFIO_IOMMU_INFO_PGSIZES (1 << 0)	/* supported page sizes info */
491 	__u64	iova_pgsizes;		/* Bitmap of supported page sizes */
492 };
493 
494 #define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
495 
496 /**
497  * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map)
498  *
499  * Map process virtual addresses to IO virtual addresses using the
500  * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required.
501  */
502 struct vfio_iommu_type1_dma_map {
503 	__u32	argsz;
504 	__u32	flags;
505 #define VFIO_DMA_MAP_FLAG_READ (1 << 0)		/* readable from device */
506 #define VFIO_DMA_MAP_FLAG_WRITE (1 << 1)	/* writable from device */
507 	__u64	vaddr;				/* Process virtual address */
508 	__u64	iova;				/* IO virtual address */
509 	__u64	size;				/* Size of mapping (bytes) */
510 };
511 
512 #define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
513 
514 /**
515  * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14,
516  *							struct vfio_dma_unmap)
517  *
518  * Unmap IO virtual addresses using the provided struct vfio_dma_unmap.
519  * Caller sets argsz.  The actual unmapped size is returned in the size
520  * field.  No guarantee is made to the user that arbitrary unmaps of iova
521  * or size different from those used in the original mapping call will
522  * succeed.
523  */
524 struct vfio_iommu_type1_dma_unmap {
525 	__u32	argsz;
526 	__u32	flags;
527 	__u64	iova;				/* IO virtual address */
528 	__u64	size;				/* Size of mapping (bytes) */
529 };
530 
531 #define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
532 
533 /*
534  * IOCTLs to enable/disable IOMMU container usage.
535  * No parameters are supported.
536  */
537 #define VFIO_IOMMU_ENABLE	_IO(VFIO_TYPE, VFIO_BASE + 15)
538 #define VFIO_IOMMU_DISABLE	_IO(VFIO_TYPE, VFIO_BASE + 16)
539 
540 /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
541 
542 /*
543  * The SPAPR TCE DDW info struct provides the information about
544  * the details of Dynamic DMA window capability.
545  *
546  * @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
547  * @max_dynamic_windows_supported tells the maximum number of windows
548  * which the platform can create.
549  * @levels tells the maximum number of levels in multi-level IOMMU tables;
550  * this allows splitting a table into smaller chunks which reduces
551  * the amount of physically contiguous memory required for the table.
552  */
553 struct vfio_iommu_spapr_tce_ddw_info {
554 	__u64 pgsizes;			/* Bitmap of supported page sizes */
555 	__u32 max_dynamic_windows_supported;
556 	__u32 levels;
557 };
558 
559 /*
560  * The SPAPR TCE info struct provides the information about the PCI bus
561  * address ranges available for DMA, these values are programmed into
562  * the hardware so the guest has to know that information.
563  *
564  * The DMA 32 bit window start is an absolute PCI bus address.
565  * The IOVA address passed via map/unmap ioctls are absolute PCI bus
566  * addresses too so the window works as a filter rather than an offset
567  * for IOVA addresses.
568  *
569  * Flags supported:
570  * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
571  *   (DDW) support is present. @ddw is only supported when DDW is present.
572  */
573 struct vfio_iommu_spapr_tce_info {
574 	__u32 argsz;
575 	__u32 flags;
576 #define VFIO_IOMMU_SPAPR_INFO_DDW	(1 << 0)	/* DDW supported */
577 	__u32 dma32_window_start;	/* 32 bit window start (bytes) */
578 	__u32 dma32_window_size;	/* 32 bit window size (bytes) */
579 	struct vfio_iommu_spapr_tce_ddw_info ddw;
580 };
581 
582 #define VFIO_IOMMU_SPAPR_TCE_GET_INFO	_IO(VFIO_TYPE, VFIO_BASE + 12)
583 
584 /*
585  * EEH PE operation struct provides ways to:
586  * - enable/disable EEH functionality;
587  * - unfreeze IO/DMA for frozen PE;
588  * - read PE state;
589  * - reset PE;
590  * - configure PE;
591  * - inject EEH error.
592  */
593 struct vfio_eeh_pe_err {
594 	__u32 type;
595 	__u32 func;
596 	__u64 addr;
597 	__u64 mask;
598 };
599 
600 struct vfio_eeh_pe_op {
601 	__u32 argsz;
602 	__u32 flags;
603 	__u32 op;
604 	union {
605 		struct vfio_eeh_pe_err err;
606 	};
607 };
608 
609 #define VFIO_EEH_PE_DISABLE		0	/* Disable EEH functionality */
610 #define VFIO_EEH_PE_ENABLE		1	/* Enable EEH functionality  */
611 #define VFIO_EEH_PE_UNFREEZE_IO		2	/* Enable IO for frozen PE   */
612 #define VFIO_EEH_PE_UNFREEZE_DMA	3	/* Enable DMA for frozen PE  */
613 #define VFIO_EEH_PE_GET_STATE		4	/* PE state retrieval        */
614 #define  VFIO_EEH_PE_STATE_NORMAL	0	/* PE in functional state    */
615 #define  VFIO_EEH_PE_STATE_RESET	1	/* PE reset in progress      */
616 #define  VFIO_EEH_PE_STATE_STOPPED	2	/* Stopped DMA and IO        */
617 #define  VFIO_EEH_PE_STATE_STOPPED_DMA	4	/* Stopped DMA only          */
618 #define  VFIO_EEH_PE_STATE_UNAVAIL	5	/* State unavailable         */
619 #define VFIO_EEH_PE_RESET_DEACTIVATE	5	/* Deassert PE reset         */
620 #define VFIO_EEH_PE_RESET_HOT		6	/* Assert hot reset          */
621 #define VFIO_EEH_PE_RESET_FUNDAMENTAL	7	/* Assert fundamental reset  */
622 #define VFIO_EEH_PE_CONFIGURE		8	/* PE configuration          */
623 #define VFIO_EEH_PE_INJECT_ERR		9	/* Inject EEH error          */
624 
625 #define VFIO_EEH_PE_OP			_IO(VFIO_TYPE, VFIO_BASE + 21)
626 
627 /**
628  * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
629  *
630  * Registers user space memory where DMA is allowed. It pins
631  * user pages and does the locked memory accounting so
632  * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
633  * get faster.
634  */
635 struct vfio_iommu_spapr_register_memory {
636 	__u32	argsz;
637 	__u32	flags;
638 	__u64	vaddr;				/* Process virtual address */
639 	__u64	size;				/* Size of mapping (bytes) */
640 };
641 #define VFIO_IOMMU_SPAPR_REGISTER_MEMORY	_IO(VFIO_TYPE, VFIO_BASE + 17)
642 
643 /**
644  * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
645  *
646  * Unregisters user space memory registered with
647  * VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
648  * Uses vfio_iommu_spapr_register_memory for parameters.
649  */
650 #define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY	_IO(VFIO_TYPE, VFIO_BASE + 18)
651 
652 /**
653  * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
654  *
655  * Creates an additional TCE table and programs it (sets a new DMA window)
656  * to every IOMMU group in the container. It receives page shift, window
657  * size and number of levels in the TCE table being created.
658  *
659  * It allocates and returns an offset on a PCI bus of the new DMA window.
660  */
661 struct vfio_iommu_spapr_tce_create {
662 	__u32 argsz;
663 	__u32 flags;
664 	/* in */
665 	__u32 page_shift;
666 	__u32 __resv1;
667 	__u64 window_size;
668 	__u32 levels;
669 	__u32 __resv2;
670 	/* out */
671 	__u64 start_addr;
672 };
673 #define VFIO_IOMMU_SPAPR_TCE_CREATE	_IO(VFIO_TYPE, VFIO_BASE + 19)
674 
675 /**
676  * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
677  *
678  * Unprograms a TCE table from all groups in the container and destroys it.
679  * It receives a PCI bus offset as a window id.
680  */
681 struct vfio_iommu_spapr_tce_remove {
682 	__u32 argsz;
683 	__u32 flags;
684 	/* in */
685 	__u64 start_addr;
686 };
687 #define VFIO_IOMMU_SPAPR_TCE_REMOVE	_IO(VFIO_TYPE, VFIO_BASE + 20)
688 
689 /* ***************************************************************** */
690 
691 #endif /* VFIO_H */
692