1 /* 2 * VFIO API definition 3 * 4 * Copyright (C) 2012 Red Hat, Inc. All rights reserved. 5 * Author: Alex Williamson <alex.williamson@redhat.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #ifndef VFIO_H 12 #define VFIO_H 13 14 #include <linux/types.h> 15 #include <linux/ioctl.h> 16 17 #define VFIO_API_VERSION 0 18 19 20 /* Kernel & User level defines for VFIO IOCTLs. */ 21 22 /* Extensions */ 23 24 #define VFIO_TYPE1_IOMMU 1 25 #define VFIO_SPAPR_TCE_IOMMU 2 26 #define VFIO_TYPE1v2_IOMMU 3 27 /* 28 * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping). This 29 * capability is subject to change as groups are added or removed. 30 */ 31 #define VFIO_DMA_CC_IOMMU 4 32 33 /* Check if EEH is supported */ 34 #define VFIO_EEH 5 35 36 /* Two-stage IOMMU */ 37 #define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */ 38 39 #define VFIO_SPAPR_TCE_v2_IOMMU 7 40 41 /* 42 * The No-IOMMU IOMMU offers no translation or isolation for devices and 43 * supports no ioctls outside of VFIO_CHECK_EXTENSION. Use of VFIO's No-IOMMU 44 * code will taint the host kernel and should be used with extreme caution. 45 */ 46 #define VFIO_NOIOMMU_IOMMU 8 47 48 /* 49 * The IOCTL interface is designed for extensibility by embedding the 50 * structure length (argsz) and flags into structures passed between 51 * kernel and userspace. We therefore use the _IO() macro for these 52 * defines to avoid implicitly embedding a size into the ioctl request. 53 * As structure fields are added, argsz will increase to match and flag 54 * bits will be defined to indicate additional fields with valid data. 55 * It's *always* the caller's responsibility to indicate the size of 56 * the structure passed by setting argsz appropriately. 57 */ 58 59 #define VFIO_TYPE (';') 60 #define VFIO_BASE 100 61 62 /* 63 * For extension of INFO ioctls, VFIO makes use of a capability chain 64 * designed after PCI/e capabilities. A flag bit indicates whether 65 * this capability chain is supported and a field defined in the fixed 66 * structure defines the offset of the first capability in the chain. 67 * This field is only valid when the corresponding bit in the flags 68 * bitmap is set. This offset field is relative to the start of the 69 * INFO buffer, as is the next field within each capability header. 70 * The id within the header is a shared address space per INFO ioctl, 71 * while the version field is specific to the capability id. The 72 * contents following the header are specific to the capability id. 73 */ 74 struct vfio_info_cap_header { 75 __u16 id; /* Identifies capability */ 76 __u16 version; /* Version specific to the capability ID */ 77 __u32 next; /* Offset of next capability */ 78 }; 79 80 /* 81 * Callers of INFO ioctls passing insufficiently sized buffers will see 82 * the capability chain flag bit set, a zero value for the first capability 83 * offset (if available within the provided argsz), and argsz will be 84 * updated to report the necessary buffer size. For compatibility, the 85 * INFO ioctl will not report error in this case, but the capability chain 86 * will not be available. 87 */ 88 89 /* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */ 90 91 /** 92 * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0) 93 * 94 * Report the version of the VFIO API. This allows us to bump the entire 95 * API version should we later need to add or change features in incompatible 96 * ways. 97 * Return: VFIO_API_VERSION 98 * Availability: Always 99 */ 100 #define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0) 101 102 /** 103 * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32) 104 * 105 * Check whether an extension is supported. 106 * Return: 0 if not supported, 1 (or some other positive integer) if supported. 107 * Availability: Always 108 */ 109 #define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1) 110 111 /** 112 * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32) 113 * 114 * Set the iommu to the given type. The type must be supported by an 115 * iommu driver as verified by calling CHECK_EXTENSION using the same 116 * type. A group must be set to this file descriptor before this 117 * ioctl is available. The IOMMU interfaces enabled by this call are 118 * specific to the value set. 119 * Return: 0 on success, -errno on failure 120 * Availability: When VFIO group attached 121 */ 122 #define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2) 123 124 /* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */ 125 126 /** 127 * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3, 128 * struct vfio_group_status) 129 * 130 * Retrieve information about the group. Fills in provided 131 * struct vfio_group_info. Caller sets argsz. 132 * Return: 0 on succes, -errno on failure. 133 * Availability: Always 134 */ 135 struct vfio_group_status { 136 __u32 argsz; 137 __u32 flags; 138 #define VFIO_GROUP_FLAGS_VIABLE (1 << 0) 139 #define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1) 140 }; 141 #define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3) 142 143 /** 144 * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32) 145 * 146 * Set the container for the VFIO group to the open VFIO file 147 * descriptor provided. Groups may only belong to a single 148 * container. Containers may, at their discretion, support multiple 149 * groups. Only when a container is set are all of the interfaces 150 * of the VFIO file descriptor and the VFIO group file descriptor 151 * available to the user. 152 * Return: 0 on success, -errno on failure. 153 * Availability: Always 154 */ 155 #define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4) 156 157 /** 158 * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5) 159 * 160 * Remove the group from the attached container. This is the 161 * opposite of the SET_CONTAINER call and returns the group to 162 * an initial state. All device file descriptors must be released 163 * prior to calling this interface. When removing the last group 164 * from a container, the IOMMU will be disabled and all state lost, 165 * effectively also returning the VFIO file descriptor to an initial 166 * state. 167 * Return: 0 on success, -errno on failure. 168 * Availability: When attached to container 169 */ 170 #define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5) 171 172 /** 173 * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char) 174 * 175 * Return a new file descriptor for the device object described by 176 * the provided string. The string should match a device listed in 177 * the devices subdirectory of the IOMMU group sysfs entry. The 178 * group containing the device must already be added to this context. 179 * Return: new file descriptor on success, -errno on failure. 180 * Availability: When attached to container 181 */ 182 #define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6) 183 184 /* --------------- IOCTLs for DEVICE file descriptors --------------- */ 185 186 /** 187 * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7, 188 * struct vfio_device_info) 189 * 190 * Retrieve information about the device. Fills in provided 191 * struct vfio_device_info. Caller sets argsz. 192 * Return: 0 on success, -errno on failure. 193 */ 194 struct vfio_device_info { 195 __u32 argsz; 196 __u32 flags; 197 #define VFIO_DEVICE_FLAGS_RESET (1 << 0) /* Device supports reset */ 198 #define VFIO_DEVICE_FLAGS_PCI (1 << 1) /* vfio-pci device */ 199 #define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) /* vfio-platform device */ 200 #define VFIO_DEVICE_FLAGS_AMBA (1 << 3) /* vfio-amba device */ 201 #define VFIO_DEVICE_FLAGS_CCW (1 << 4) /* vfio-ccw device */ 202 __u32 num_regions; /* Max region index + 1 */ 203 __u32 num_irqs; /* Max IRQ index + 1 */ 204 }; 205 #define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7) 206 207 /* 208 * Vendor driver using Mediated device framework should provide device_api 209 * attribute in supported type attribute groups. Device API string should be one 210 * of the following corresponding to device flags in vfio_device_info structure. 211 */ 212 213 #define VFIO_DEVICE_API_PCI_STRING "vfio-pci" 214 #define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform" 215 #define VFIO_DEVICE_API_AMBA_STRING "vfio-amba" 216 #define VFIO_DEVICE_API_CCW_STRING "vfio-ccw" 217 218 /** 219 * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8, 220 * struct vfio_region_info) 221 * 222 * Retrieve information about a device region. Caller provides 223 * struct vfio_region_info with index value set. Caller sets argsz. 224 * Implementation of region mapping is bus driver specific. This is 225 * intended to describe MMIO, I/O port, as well as bus specific 226 * regions (ex. PCI config space). Zero sized regions may be used 227 * to describe unimplemented regions (ex. unimplemented PCI BARs). 228 * Return: 0 on success, -errno on failure. 229 */ 230 struct vfio_region_info { 231 __u32 argsz; 232 __u32 flags; 233 #define VFIO_REGION_INFO_FLAG_READ (1 << 0) /* Region supports read */ 234 #define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) /* Region supports write */ 235 #define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) /* Region supports mmap */ 236 #define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) /* Info supports caps */ 237 __u32 index; /* Region index */ 238 __u32 cap_offset; /* Offset within info struct of first cap */ 239 __u64 size; /* Region size (bytes) */ 240 __u64 offset; /* Region offset from start of device fd */ 241 }; 242 #define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8) 243 244 /* 245 * The sparse mmap capability allows finer granularity of specifying areas 246 * within a region with mmap support. When specified, the user should only 247 * mmap the offset ranges specified by the areas array. mmaps outside of the 248 * areas specified may fail (such as the range covering a PCI MSI-X table) or 249 * may result in improper device behavior. 250 * 251 * The structures below define version 1 of this capability. 252 */ 253 #define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1 254 255 struct vfio_region_sparse_mmap_area { 256 __u64 offset; /* Offset of mmap'able area within region */ 257 __u64 size; /* Size of mmap'able area */ 258 }; 259 260 struct vfio_region_info_cap_sparse_mmap { 261 struct vfio_info_cap_header header; 262 __u32 nr_areas; 263 __u32 reserved; 264 struct vfio_region_sparse_mmap_area areas[]; 265 }; 266 267 /* 268 * The device specific type capability allows regions unique to a specific 269 * device or class of devices to be exposed. This helps solve the problem for 270 * vfio bus drivers of defining which region indexes correspond to which region 271 * on the device, without needing to resort to static indexes, as done by 272 * vfio-pci. For instance, if we were to go back in time, we might remove 273 * VFIO_PCI_VGA_REGION_INDEX and let vfio-pci simply define that all indexes 274 * greater than or equal to VFIO_PCI_NUM_REGIONS are device specific and we'd 275 * make a "VGA" device specific type to describe the VGA access space. This 276 * means that non-VGA devices wouldn't need to waste this index, and thus the 277 * address space associated with it due to implementation of device file 278 * descriptor offsets in vfio-pci. 279 * 280 * The current implementation is now part of the user ABI, so we can't use this 281 * for VGA, but there are other upcoming use cases, such as opregions for Intel 282 * IGD devices and framebuffers for vGPU devices. We missed VGA, but we'll 283 * use this for future additions. 284 * 285 * The structure below defines version 1 of this capability. 286 */ 287 #define VFIO_REGION_INFO_CAP_TYPE 2 288 289 struct vfio_region_info_cap_type { 290 struct vfio_info_cap_header header; 291 __u32 type; /* global per bus driver */ 292 __u32 subtype; /* type specific */ 293 }; 294 295 #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31) 296 #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff) 297 298 /* 8086 Vendor sub-types */ 299 #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1) 300 #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2) 301 #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3) 302 303 /** 304 * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9, 305 * struct vfio_irq_info) 306 * 307 * Retrieve information about a device IRQ. Caller provides 308 * struct vfio_irq_info with index value set. Caller sets argsz. 309 * Implementation of IRQ mapping is bus driver specific. Indexes 310 * using multiple IRQs are primarily intended to support MSI-like 311 * interrupt blocks. Zero count irq blocks may be used to describe 312 * unimplemented interrupt types. 313 * 314 * The EVENTFD flag indicates the interrupt index supports eventfd based 315 * signaling. 316 * 317 * The MASKABLE flags indicates the index supports MASK and UNMASK 318 * actions described below. 319 * 320 * AUTOMASKED indicates that after signaling, the interrupt line is 321 * automatically masked by VFIO and the user needs to unmask the line 322 * to receive new interrupts. This is primarily intended to distinguish 323 * level triggered interrupts. 324 * 325 * The NORESIZE flag indicates that the interrupt lines within the index 326 * are setup as a set and new subindexes cannot be enabled without first 327 * disabling the entire index. This is used for interrupts like PCI MSI 328 * and MSI-X where the driver may only use a subset of the available 329 * indexes, but VFIO needs to enable a specific number of vectors 330 * upfront. In the case of MSI-X, where the user can enable MSI-X and 331 * then add and unmask vectors, it's up to userspace to make the decision 332 * whether to allocate the maximum supported number of vectors or tear 333 * down setup and incrementally increase the vectors as each is enabled. 334 */ 335 struct vfio_irq_info { 336 __u32 argsz; 337 __u32 flags; 338 #define VFIO_IRQ_INFO_EVENTFD (1 << 0) 339 #define VFIO_IRQ_INFO_MASKABLE (1 << 1) 340 #define VFIO_IRQ_INFO_AUTOMASKED (1 << 2) 341 #define VFIO_IRQ_INFO_NORESIZE (1 << 3) 342 __u32 index; /* IRQ index */ 343 __u32 count; /* Number of IRQs within this index */ 344 }; 345 #define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9) 346 347 /** 348 * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set) 349 * 350 * Set signaling, masking, and unmasking of interrupts. Caller provides 351 * struct vfio_irq_set with all fields set. 'start' and 'count' indicate 352 * the range of subindexes being specified. 353 * 354 * The DATA flags specify the type of data provided. If DATA_NONE, the 355 * operation performs the specified action immediately on the specified 356 * interrupt(s). For example, to unmask AUTOMASKED interrupt [0,0]: 357 * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1. 358 * 359 * DATA_BOOL allows sparse support for the same on arrays of interrupts. 360 * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]): 361 * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3, 362 * data = {1,0,1} 363 * 364 * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd. 365 * A value of -1 can be used to either de-assign interrupts if already 366 * assigned or skip un-assigned interrupts. For example, to set an eventfd 367 * to be trigger for interrupts [0,0] and [0,2]: 368 * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3, 369 * data = {fd1, -1, fd2} 370 * If index [0,1] is previously set, two count = 1 ioctls calls would be 371 * required to set [0,0] and [0,2] without changing [0,1]. 372 * 373 * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used 374 * with ACTION_TRIGGER to perform kernel level interrupt loopback testing 375 * from userspace (ie. simulate hardware triggering). 376 * 377 * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER 378 * enables the interrupt index for the device. Individual subindex interrupts 379 * can be disabled using the -1 value for DATA_EVENTFD or the index can be 380 * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0. 381 * 382 * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while 383 * ACTION_TRIGGER specifies kernel->user signaling. 384 */ 385 struct vfio_irq_set { 386 __u32 argsz; 387 __u32 flags; 388 #define VFIO_IRQ_SET_DATA_NONE (1 << 0) /* Data not present */ 389 #define VFIO_IRQ_SET_DATA_BOOL (1 << 1) /* Data is bool (u8) */ 390 #define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) /* Data is eventfd (s32) */ 391 #define VFIO_IRQ_SET_ACTION_MASK (1 << 3) /* Mask interrupt */ 392 #define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) /* Unmask interrupt */ 393 #define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) /* Trigger interrupt */ 394 __u32 index; 395 __u32 start; 396 __u32 count; 397 __u8 data[]; 398 }; 399 #define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10) 400 401 #define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | \ 402 VFIO_IRQ_SET_DATA_BOOL | \ 403 VFIO_IRQ_SET_DATA_EVENTFD) 404 #define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | \ 405 VFIO_IRQ_SET_ACTION_UNMASK | \ 406 VFIO_IRQ_SET_ACTION_TRIGGER) 407 /** 408 * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11) 409 * 410 * Reset a device. 411 */ 412 #define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11) 413 414 /* 415 * The VFIO-PCI bus driver makes use of the following fixed region and 416 * IRQ index mapping. Unimplemented regions return a size of zero. 417 * Unimplemented IRQ types return a count of zero. 418 */ 419 420 enum { 421 VFIO_PCI_BAR0_REGION_INDEX, 422 VFIO_PCI_BAR1_REGION_INDEX, 423 VFIO_PCI_BAR2_REGION_INDEX, 424 VFIO_PCI_BAR3_REGION_INDEX, 425 VFIO_PCI_BAR4_REGION_INDEX, 426 VFIO_PCI_BAR5_REGION_INDEX, 427 VFIO_PCI_ROM_REGION_INDEX, 428 VFIO_PCI_CONFIG_REGION_INDEX, 429 /* 430 * Expose VGA regions defined for PCI base class 03, subclass 00. 431 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df 432 * as well as the MMIO range 0xa0000 to 0xbffff. Each implemented 433 * range is found at it's identity mapped offset from the region 434 * offset, for example 0x3b0 is region_info.offset + 0x3b0. Areas 435 * between described ranges are unimplemented. 436 */ 437 VFIO_PCI_VGA_REGION_INDEX, 438 VFIO_PCI_NUM_REGIONS = 9 /* Fixed user ABI, region indexes >=9 use */ 439 /* device specific cap to define content. */ 440 }; 441 442 enum { 443 VFIO_PCI_INTX_IRQ_INDEX, 444 VFIO_PCI_MSI_IRQ_INDEX, 445 VFIO_PCI_MSIX_IRQ_INDEX, 446 VFIO_PCI_ERR_IRQ_INDEX, 447 VFIO_PCI_REQ_IRQ_INDEX, 448 VFIO_PCI_NUM_IRQS 449 }; 450 451 /* 452 * The vfio-ccw bus driver makes use of the following fixed region and 453 * IRQ index mapping. Unimplemented regions return a size of zero. 454 * Unimplemented IRQ types return a count of zero. 455 */ 456 457 enum { 458 VFIO_CCW_CONFIG_REGION_INDEX, 459 VFIO_CCW_NUM_REGIONS 460 }; 461 462 enum { 463 VFIO_CCW_IO_IRQ_INDEX, 464 VFIO_CCW_NUM_IRQS 465 }; 466 467 /** 468 * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12, 469 * struct vfio_pci_hot_reset_info) 470 * 471 * Return: 0 on success, -errno on failure: 472 * -enospc = insufficient buffer, -enodev = unsupported for device. 473 */ 474 struct vfio_pci_dependent_device { 475 __u32 group_id; 476 __u16 segment; 477 __u8 bus; 478 __u8 devfn; /* Use PCI_SLOT/PCI_FUNC */ 479 }; 480 481 struct vfio_pci_hot_reset_info { 482 __u32 argsz; 483 __u32 flags; 484 __u32 count; 485 struct vfio_pci_dependent_device devices[]; 486 }; 487 488 #define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 489 490 /** 491 * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13, 492 * struct vfio_pci_hot_reset) 493 * 494 * Return: 0 on success, -errno on failure. 495 */ 496 struct vfio_pci_hot_reset { 497 __u32 argsz; 498 __u32 flags; 499 __u32 count; 500 __s32 group_fds[]; 501 }; 502 503 #define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13) 504 505 /* -------- API for Type1 VFIO IOMMU -------- */ 506 507 /** 508 * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info) 509 * 510 * Retrieve information about the IOMMU object. Fills in provided 511 * struct vfio_iommu_info. Caller sets argsz. 512 * 513 * XXX Should we do these by CHECK_EXTENSION too? 514 */ 515 struct vfio_iommu_type1_info { 516 __u32 argsz; 517 __u32 flags; 518 #define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */ 519 __u64 iova_pgsizes; /* Bitmap of supported page sizes */ 520 }; 521 522 #define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 523 524 /** 525 * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map) 526 * 527 * Map process virtual addresses to IO virtual addresses using the 528 * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required. 529 */ 530 struct vfio_iommu_type1_dma_map { 531 __u32 argsz; 532 __u32 flags; 533 #define VFIO_DMA_MAP_FLAG_READ (1 << 0) /* readable from device */ 534 #define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) /* writable from device */ 535 __u64 vaddr; /* Process virtual address */ 536 __u64 iova; /* IO virtual address */ 537 __u64 size; /* Size of mapping (bytes) */ 538 }; 539 540 #define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13) 541 542 /** 543 * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14, 544 * struct vfio_dma_unmap) 545 * 546 * Unmap IO virtual addresses using the provided struct vfio_dma_unmap. 547 * Caller sets argsz. The actual unmapped size is returned in the size 548 * field. No guarantee is made to the user that arbitrary unmaps of iova 549 * or size different from those used in the original mapping call will 550 * succeed. 551 */ 552 struct vfio_iommu_type1_dma_unmap { 553 __u32 argsz; 554 __u32 flags; 555 __u64 iova; /* IO virtual address */ 556 __u64 size; /* Size of mapping (bytes) */ 557 }; 558 559 #define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14) 560 561 /* 562 * IOCTLs to enable/disable IOMMU container usage. 563 * No parameters are supported. 564 */ 565 #define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) 566 #define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) 567 568 /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */ 569 570 /* 571 * The SPAPR TCE DDW info struct provides the information about 572 * the details of Dynamic DMA window capability. 573 * 574 * @pgsizes contains a page size bitmask, 4K/64K/16M are supported. 575 * @max_dynamic_windows_supported tells the maximum number of windows 576 * which the platform can create. 577 * @levels tells the maximum number of levels in multi-level IOMMU tables; 578 * this allows splitting a table into smaller chunks which reduces 579 * the amount of physically contiguous memory required for the table. 580 */ 581 struct vfio_iommu_spapr_tce_ddw_info { 582 __u64 pgsizes; /* Bitmap of supported page sizes */ 583 __u32 max_dynamic_windows_supported; 584 __u32 levels; 585 }; 586 587 /* 588 * The SPAPR TCE info struct provides the information about the PCI bus 589 * address ranges available for DMA, these values are programmed into 590 * the hardware so the guest has to know that information. 591 * 592 * The DMA 32 bit window start is an absolute PCI bus address. 593 * The IOVA address passed via map/unmap ioctls are absolute PCI bus 594 * addresses too so the window works as a filter rather than an offset 595 * for IOVA addresses. 596 * 597 * Flags supported: 598 * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows 599 * (DDW) support is present. @ddw is only supported when DDW is present. 600 */ 601 struct vfio_iommu_spapr_tce_info { 602 __u32 argsz; 603 __u32 flags; 604 #define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */ 605 __u32 dma32_window_start; /* 32 bit window start (bytes) */ 606 __u32 dma32_window_size; /* 32 bit window size (bytes) */ 607 struct vfio_iommu_spapr_tce_ddw_info ddw; 608 }; 609 610 #define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 611 612 /* 613 * EEH PE operation struct provides ways to: 614 * - enable/disable EEH functionality; 615 * - unfreeze IO/DMA for frozen PE; 616 * - read PE state; 617 * - reset PE; 618 * - configure PE; 619 * - inject EEH error. 620 */ 621 struct vfio_eeh_pe_err { 622 __u32 type; 623 __u32 func; 624 __u64 addr; 625 __u64 mask; 626 }; 627 628 struct vfio_eeh_pe_op { 629 __u32 argsz; 630 __u32 flags; 631 __u32 op; 632 union { 633 struct vfio_eeh_pe_err err; 634 }; 635 }; 636 637 #define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */ 638 #define VFIO_EEH_PE_ENABLE 1 /* Enable EEH functionality */ 639 #define VFIO_EEH_PE_UNFREEZE_IO 2 /* Enable IO for frozen PE */ 640 #define VFIO_EEH_PE_UNFREEZE_DMA 3 /* Enable DMA for frozen PE */ 641 #define VFIO_EEH_PE_GET_STATE 4 /* PE state retrieval */ 642 #define VFIO_EEH_PE_STATE_NORMAL 0 /* PE in functional state */ 643 #define VFIO_EEH_PE_STATE_RESET 1 /* PE reset in progress */ 644 #define VFIO_EEH_PE_STATE_STOPPED 2 /* Stopped DMA and IO */ 645 #define VFIO_EEH_PE_STATE_STOPPED_DMA 4 /* Stopped DMA only */ 646 #define VFIO_EEH_PE_STATE_UNAVAIL 5 /* State unavailable */ 647 #define VFIO_EEH_PE_RESET_DEACTIVATE 5 /* Deassert PE reset */ 648 #define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */ 649 #define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */ 650 #define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */ 651 #define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */ 652 653 #define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21) 654 655 /** 656 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory) 657 * 658 * Registers user space memory where DMA is allowed. It pins 659 * user pages and does the locked memory accounting so 660 * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls 661 * get faster. 662 */ 663 struct vfio_iommu_spapr_register_memory { 664 __u32 argsz; 665 __u32 flags; 666 __u64 vaddr; /* Process virtual address */ 667 __u64 size; /* Size of mapping (bytes) */ 668 }; 669 #define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17) 670 671 /** 672 * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory) 673 * 674 * Unregisters user space memory registered with 675 * VFIO_IOMMU_SPAPR_REGISTER_MEMORY. 676 * Uses vfio_iommu_spapr_register_memory for parameters. 677 */ 678 #define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18) 679 680 /** 681 * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create) 682 * 683 * Creates an additional TCE table and programs it (sets a new DMA window) 684 * to every IOMMU group in the container. It receives page shift, window 685 * size and number of levels in the TCE table being created. 686 * 687 * It allocates and returns an offset on a PCI bus of the new DMA window. 688 */ 689 struct vfio_iommu_spapr_tce_create { 690 __u32 argsz; 691 __u32 flags; 692 /* in */ 693 __u32 page_shift; 694 __u32 __resv1; 695 __u64 window_size; 696 __u32 levels; 697 __u32 __resv2; 698 /* out */ 699 __u64 start_addr; 700 }; 701 #define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19) 702 703 /** 704 * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove) 705 * 706 * Unprograms a TCE table from all groups in the container and destroys it. 707 * It receives a PCI bus offset as a window id. 708 */ 709 struct vfio_iommu_spapr_tce_remove { 710 __u32 argsz; 711 __u32 flags; 712 /* in */ 713 __u64 start_addr; 714 }; 715 #define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20) 716 717 /* ***************************************************************** */ 718 719 #endif /* VFIO_H */ 720