xref: /openbmc/qemu/linux-headers/asm-x86/kvm.h (revision f0984d40)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _ASM_X86_KVM_H
3 #define _ASM_X86_KVM_H
4 
5 /*
6  * KVM x86 specific structures and definitions
7  *
8  */
9 
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
12 
13 #define KVM_PIO_PAGE_OFFSET 1
14 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
15 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
16 
17 #define DE_VECTOR 0
18 #define DB_VECTOR 1
19 #define BP_VECTOR 3
20 #define OF_VECTOR 4
21 #define BR_VECTOR 5
22 #define UD_VECTOR 6
23 #define NM_VECTOR 7
24 #define DF_VECTOR 8
25 #define TS_VECTOR 10
26 #define NP_VECTOR 11
27 #define SS_VECTOR 12
28 #define GP_VECTOR 13
29 #define PF_VECTOR 14
30 #define MF_VECTOR 16
31 #define AC_VECTOR 17
32 #define MC_VECTOR 18
33 #define XM_VECTOR 19
34 #define VE_VECTOR 20
35 
36 /* Select x86 specific features in <linux/kvm.h> */
37 #define __KVM_HAVE_PIT
38 #define __KVM_HAVE_IOAPIC
39 #define __KVM_HAVE_IRQ_LINE
40 #define __KVM_HAVE_MSI
41 #define __KVM_HAVE_USER_NMI
42 #define __KVM_HAVE_GUEST_DEBUG
43 #define __KVM_HAVE_MSIX
44 #define __KVM_HAVE_MCE
45 #define __KVM_HAVE_PIT_STATE2
46 #define __KVM_HAVE_XEN_HVM
47 #define __KVM_HAVE_VCPU_EVENTS
48 #define __KVM_HAVE_DEBUGREGS
49 #define __KVM_HAVE_XSAVE
50 #define __KVM_HAVE_XCRS
51 #define __KVM_HAVE_READONLY_MEM
52 
53 /* Architectural interrupt line count. */
54 #define KVM_NR_INTERRUPTS 256
55 
56 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
57 struct kvm_pic_state {
58 	__u8 last_irr;	/* edge detection */
59 	__u8 irr;		/* interrupt request register */
60 	__u8 imr;		/* interrupt mask register */
61 	__u8 isr;		/* interrupt service register */
62 	__u8 priority_add;	/* highest irq priority */
63 	__u8 irq_base;
64 	__u8 read_reg_select;
65 	__u8 poll;
66 	__u8 special_mask;
67 	__u8 init_state;
68 	__u8 auto_eoi;
69 	__u8 rotate_on_auto_eoi;
70 	__u8 special_fully_nested_mode;
71 	__u8 init4;		/* true if 4 byte init */
72 	__u8 elcr;		/* PIIX edge/trigger selection */
73 	__u8 elcr_mask;
74 };
75 
76 #define KVM_IOAPIC_NUM_PINS  24
77 struct kvm_ioapic_state {
78 	__u64 base_address;
79 	__u32 ioregsel;
80 	__u32 id;
81 	__u32 irr;
82 	__u32 pad;
83 	union {
84 		__u64 bits;
85 		struct {
86 			__u8 vector;
87 			__u8 delivery_mode:3;
88 			__u8 dest_mode:1;
89 			__u8 delivery_status:1;
90 			__u8 polarity:1;
91 			__u8 remote_irr:1;
92 			__u8 trig_mode:1;
93 			__u8 mask:1;
94 			__u8 reserve:7;
95 			__u8 reserved[4];
96 			__u8 dest_id;
97 		} fields;
98 	} redirtbl[KVM_IOAPIC_NUM_PINS];
99 };
100 
101 #define KVM_IRQCHIP_PIC_MASTER   0
102 #define KVM_IRQCHIP_PIC_SLAVE    1
103 #define KVM_IRQCHIP_IOAPIC       2
104 #define KVM_NR_IRQCHIPS          3
105 
106 #define KVM_RUN_X86_SMM		 (1 << 0)
107 #define KVM_RUN_X86_BUS_LOCK     (1 << 1)
108 
109 /* for KVM_GET_REGS and KVM_SET_REGS */
110 struct kvm_regs {
111 	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
112 	__u64 rax, rbx, rcx, rdx;
113 	__u64 rsi, rdi, rsp, rbp;
114 	__u64 r8,  r9,  r10, r11;
115 	__u64 r12, r13, r14, r15;
116 	__u64 rip, rflags;
117 };
118 
119 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
120 #define KVM_APIC_REG_SIZE 0x400
121 struct kvm_lapic_state {
122 	char regs[KVM_APIC_REG_SIZE];
123 };
124 
125 struct kvm_segment {
126 	__u64 base;
127 	__u32 limit;
128 	__u16 selector;
129 	__u8  type;
130 	__u8  present, dpl, db, s, l, g, avl;
131 	__u8  unusable;
132 	__u8  padding;
133 };
134 
135 struct kvm_dtable {
136 	__u64 base;
137 	__u16 limit;
138 	__u16 padding[3];
139 };
140 
141 
142 /* for KVM_GET_SREGS and KVM_SET_SREGS */
143 struct kvm_sregs {
144 	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
145 	struct kvm_segment cs, ds, es, fs, gs, ss;
146 	struct kvm_segment tr, ldt;
147 	struct kvm_dtable gdt, idt;
148 	__u64 cr0, cr2, cr3, cr4, cr8;
149 	__u64 efer;
150 	__u64 apic_base;
151 	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
152 };
153 
154 struct kvm_sregs2 {
155 	/* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
156 	struct kvm_segment cs, ds, es, fs, gs, ss;
157 	struct kvm_segment tr, ldt;
158 	struct kvm_dtable gdt, idt;
159 	__u64 cr0, cr2, cr3, cr4, cr8;
160 	__u64 efer;
161 	__u64 apic_base;
162 	__u64 flags;
163 	__u64 pdptrs[4];
164 };
165 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
166 
167 /* for KVM_GET_FPU and KVM_SET_FPU */
168 struct kvm_fpu {
169 	__u8  fpr[8][16];
170 	__u16 fcw;
171 	__u16 fsw;
172 	__u8  ftwx;  /* in fxsave format */
173 	__u8  pad1;
174 	__u16 last_opcode;
175 	__u64 last_ip;
176 	__u64 last_dp;
177 	__u8  xmm[16][16];
178 	__u32 mxcsr;
179 	__u32 pad2;
180 };
181 
182 struct kvm_msr_entry {
183 	__u32 index;
184 	__u32 reserved;
185 	__u64 data;
186 };
187 
188 /* for KVM_GET_MSRS and KVM_SET_MSRS */
189 struct kvm_msrs {
190 	__u32 nmsrs; /* number of msrs in entries */
191 	__u32 pad;
192 
193 	struct kvm_msr_entry entries[];
194 };
195 
196 /* for KVM_GET_MSR_INDEX_LIST */
197 struct kvm_msr_list {
198 	__u32 nmsrs; /* number of msrs in entries */
199 	__u32 indices[];
200 };
201 
202 /* Maximum size of any access bitmap in bytes */
203 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
204 
205 /* for KVM_X86_SET_MSR_FILTER */
206 struct kvm_msr_filter_range {
207 #define KVM_MSR_FILTER_READ  (1 << 0)
208 #define KVM_MSR_FILTER_WRITE (1 << 1)
209 #define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
210 					 KVM_MSR_FILTER_WRITE)
211 	__u32 flags;
212 	__u32 nmsrs; /* number of msrs in bitmap */
213 	__u32 base;  /* MSR index the bitmap starts at */
214 	__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
215 };
216 
217 #define KVM_MSR_FILTER_MAX_RANGES 16
218 struct kvm_msr_filter {
219 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
220 #define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
221 #define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
222 	__u32 flags;
223 	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
224 };
225 
226 struct kvm_cpuid_entry {
227 	__u32 function;
228 	__u32 eax;
229 	__u32 ebx;
230 	__u32 ecx;
231 	__u32 edx;
232 	__u32 padding;
233 };
234 
235 /* for KVM_SET_CPUID */
236 struct kvm_cpuid {
237 	__u32 nent;
238 	__u32 padding;
239 	struct kvm_cpuid_entry entries[];
240 };
241 
242 struct kvm_cpuid_entry2 {
243 	__u32 function;
244 	__u32 index;
245 	__u32 flags;
246 	__u32 eax;
247 	__u32 ebx;
248 	__u32 ecx;
249 	__u32 edx;
250 	__u32 padding[3];
251 };
252 
253 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		(1 << 0)
254 #define KVM_CPUID_FLAG_STATEFUL_FUNC		(1 << 1)
255 #define KVM_CPUID_FLAG_STATE_READ_NEXT		(1 << 2)
256 
257 /* for KVM_SET_CPUID2 */
258 struct kvm_cpuid2 {
259 	__u32 nent;
260 	__u32 padding;
261 	struct kvm_cpuid_entry2 entries[];
262 };
263 
264 /* for KVM_GET_PIT and KVM_SET_PIT */
265 struct kvm_pit_channel_state {
266 	__u32 count; /* can be 65536 */
267 	__u16 latched_count;
268 	__u8 count_latched;
269 	__u8 status_latched;
270 	__u8 status;
271 	__u8 read_state;
272 	__u8 write_state;
273 	__u8 write_latch;
274 	__u8 rw_mode;
275 	__u8 mode;
276 	__u8 bcd;
277 	__u8 gate;
278 	__s64 count_load_time;
279 };
280 
281 struct kvm_debug_exit_arch {
282 	__u32 exception;
283 	__u32 pad;
284 	__u64 pc;
285 	__u64 dr6;
286 	__u64 dr7;
287 };
288 
289 #define KVM_GUESTDBG_USE_SW_BP		0x00010000
290 #define KVM_GUESTDBG_USE_HW_BP		0x00020000
291 #define KVM_GUESTDBG_INJECT_DB		0x00040000
292 #define KVM_GUESTDBG_INJECT_BP		0x00080000
293 #define KVM_GUESTDBG_BLOCKIRQ		0x00100000
294 
295 /* for KVM_SET_GUEST_DEBUG */
296 struct kvm_guest_debug_arch {
297 	__u64 debugreg[8];
298 };
299 
300 struct kvm_pit_state {
301 	struct kvm_pit_channel_state channels[3];
302 };
303 
304 #define KVM_PIT_FLAGS_HPET_LEGACY     0x00000001
305 #define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
306 
307 struct kvm_pit_state2 {
308 	struct kvm_pit_channel_state channels[3];
309 	__u32 flags;
310 	__u32 reserved[9];
311 };
312 
313 struct kvm_reinject_control {
314 	__u8 pit_reinject;
315 	__u8 reserved[31];
316 };
317 
318 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
319 #define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
320 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
321 #define KVM_VCPUEVENT_VALID_SHADOW	0x00000004
322 #define KVM_VCPUEVENT_VALID_SMM		0x00000008
323 #define KVM_VCPUEVENT_VALID_PAYLOAD	0x00000010
324 #define KVM_VCPUEVENT_VALID_TRIPLE_FAULT	0x00000020
325 
326 /* Interrupt shadow states */
327 #define KVM_X86_SHADOW_INT_MOV_SS	0x01
328 #define KVM_X86_SHADOW_INT_STI		0x02
329 
330 /* for KVM_GET/SET_VCPU_EVENTS */
331 struct kvm_vcpu_events {
332 	struct {
333 		__u8 injected;
334 		__u8 nr;
335 		__u8 has_error_code;
336 		__u8 pending;
337 		__u32 error_code;
338 	} exception;
339 	struct {
340 		__u8 injected;
341 		__u8 nr;
342 		__u8 soft;
343 		__u8 shadow;
344 	} interrupt;
345 	struct {
346 		__u8 injected;
347 		__u8 pending;
348 		__u8 masked;
349 		__u8 pad;
350 	} nmi;
351 	__u32 sipi_vector;
352 	__u32 flags;
353 	struct {
354 		__u8 smm;
355 		__u8 pending;
356 		__u8 smm_inside_nmi;
357 		__u8 latched_init;
358 	} smi;
359 	struct {
360 		__u8 pending;
361 	} triple_fault;
362 	__u8 reserved[26];
363 	__u8 exception_has_payload;
364 	__u64 exception_payload;
365 };
366 
367 /* for KVM_GET/SET_DEBUGREGS */
368 struct kvm_debugregs {
369 	__u64 db[4];
370 	__u64 dr6;
371 	__u64 dr7;
372 	__u64 flags;
373 	__u64 reserved[9];
374 };
375 
376 /* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
377 struct kvm_xsave {
378 	/*
379 	 * KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
380 	 * as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
381 	 * respectively, when invoked on the vm file descriptor.
382 	 *
383 	 * The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
384 	 * will always be at least 4096. Currently, it is only greater
385 	 * than 4096 if a dynamic feature has been enabled with
386 	 * ``arch_prctl()``, but this may change in the future.
387 	 *
388 	 * The offsets of the state save areas in struct kvm_xsave follow
389 	 * the contents of CPUID leaf 0xD on the host.
390 	 */
391 	__u32 region[1024];
392 	__u32 extra[];
393 };
394 
395 #define KVM_MAX_XCRS	16
396 
397 struct kvm_xcr {
398 	__u32 xcr;
399 	__u32 reserved;
400 	__u64 value;
401 };
402 
403 struct kvm_xcrs {
404 	__u32 nr_xcrs;
405 	__u32 flags;
406 	struct kvm_xcr xcrs[KVM_MAX_XCRS];
407 	__u64 padding[16];
408 };
409 
410 #define KVM_SYNC_X86_REGS      (1UL << 0)
411 #define KVM_SYNC_X86_SREGS     (1UL << 1)
412 #define KVM_SYNC_X86_EVENTS    (1UL << 2)
413 
414 #define KVM_SYNC_X86_VALID_FIELDS \
415 	(KVM_SYNC_X86_REGS| \
416 	 KVM_SYNC_X86_SREGS| \
417 	 KVM_SYNC_X86_EVENTS)
418 
419 /* kvm_sync_regs struct included by kvm_run struct */
420 struct kvm_sync_regs {
421 	/* Members of this structure are potentially malicious.
422 	 * Care must be taken by code reading, esp. interpreting,
423 	 * data fields from them inside KVM to prevent TOCTOU and
424 	 * double-fetch types of vulnerabilities.
425 	 */
426 	struct kvm_regs regs;
427 	struct kvm_sregs sregs;
428 	struct kvm_vcpu_events events;
429 };
430 
431 #define KVM_X86_QUIRK_LINT0_REENABLED		(1 << 0)
432 #define KVM_X86_QUIRK_CD_NW_CLEARED		(1 << 1)
433 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE		(1 << 2)
434 #define KVM_X86_QUIRK_OUT_7E_INC_RIP		(1 << 3)
435 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)
436 #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)
437 #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)
438 
439 #define KVM_STATE_NESTED_FORMAT_VMX	0
440 #define KVM_STATE_NESTED_FORMAT_SVM	1
441 
442 #define KVM_STATE_NESTED_GUEST_MODE	0x00000001
443 #define KVM_STATE_NESTED_RUN_PENDING	0x00000002
444 #define KVM_STATE_NESTED_EVMCS		0x00000004
445 #define KVM_STATE_NESTED_MTF_PENDING	0x00000008
446 #define KVM_STATE_NESTED_GIF_SET	0x00000100
447 
448 #define KVM_STATE_NESTED_SMM_GUEST_MODE	0x00000001
449 #define KVM_STATE_NESTED_SMM_VMXON	0x00000002
450 
451 #define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000
452 
453 #define KVM_STATE_NESTED_SVM_VMCB_SIZE	0x1000
454 
455 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE	0x00000001
456 
457 /* attributes for system fd (group 0) */
458 #define KVM_X86_XCOMP_GUEST_SUPP	0
459 
460 struct kvm_vmx_nested_state_data {
461 	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
462 	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
463 };
464 
465 struct kvm_vmx_nested_state_hdr {
466 	__u64 vmxon_pa;
467 	__u64 vmcs12_pa;
468 
469 	struct {
470 		__u16 flags;
471 	} smm;
472 
473 	__u16 pad;
474 
475 	__u32 flags;
476 	__u64 preemption_timer_deadline;
477 };
478 
479 struct kvm_svm_nested_state_data {
480 	/* Save area only used if KVM_STATE_NESTED_RUN_PENDING.  */
481 	__u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
482 };
483 
484 struct kvm_svm_nested_state_hdr {
485 	__u64 vmcb_pa;
486 };
487 
488 /* for KVM_CAP_NESTED_STATE */
489 struct kvm_nested_state {
490 	__u16 flags;
491 	__u16 format;
492 	__u32 size;
493 
494 	union {
495 		struct kvm_vmx_nested_state_hdr vmx;
496 		struct kvm_svm_nested_state_hdr svm;
497 
498 		/* Pad the header to 128 bytes.  */
499 		__u8 pad[120];
500 	} hdr;
501 
502 	/*
503 	 * Define data region as 0 bytes to preserve backwards-compatability
504 	 * to old definition of kvm_nested_state in order to avoid changing
505 	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
506 	 */
507 	union {
508 		struct kvm_vmx_nested_state_data vmx[0];
509 		struct kvm_svm_nested_state_data svm[0];
510 	} data;
511 };
512 
513 /* for KVM_CAP_PMU_EVENT_FILTER */
514 struct kvm_pmu_event_filter {
515 	__u32 action;
516 	__u32 nevents;
517 	__u32 fixed_counter_bitmap;
518 	__u32 flags;
519 	__u32 pad[4];
520 	__u64 events[];
521 };
522 
523 #define KVM_PMU_EVENT_ALLOW 0
524 #define KVM_PMU_EVENT_DENY 1
525 
526 /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
527 #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
528 #define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
529 
530 #endif /* _ASM_X86_KVM_H */
531