xref: /openbmc/qemu/include/tcg/tcg.h (revision 0885f1221e0add5529dada1e7948d2c00189cb8b)
1 /*
2  * Tiny Code Generator for QEMU
3  *
4  * Copyright (c) 2008 Fabrice Bellard
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef TCG_H
26 #define TCG_H
27 
28 #include "exec/memop.h"
29 #include "exec/memopidx.h"
30 #include "qemu/bitops.h"
31 #include "qemu/plugin.h"
32 #include "qemu/queue.h"
33 #include "tcg/tcg-mo.h"
34 #include "tcg-target-reg-bits.h"
35 #include "tcg-target.h"
36 #include "tcg/tcg-cond.h"
37 #include "tcg/debug-assert.h"
38 
39 /* XXX: make safe guess about sizes */
40 #define MAX_OP_PER_INSTR 266
41 
42 #define MAX_CALL_IARGS  7
43 
44 #define CPU_TEMP_BUF_NLONGS 128
45 #define TCG_STATIC_FRAME_SIZE  (CPU_TEMP_BUF_NLONGS * sizeof(long))
46 
47 #if TCG_TARGET_REG_BITS == 32
48 typedef int32_t tcg_target_long;
49 typedef uint32_t tcg_target_ulong;
50 #define TCG_PRIlx PRIx32
51 #define TCG_PRIld PRId32
52 #elif TCG_TARGET_REG_BITS == 64
53 typedef int64_t tcg_target_long;
54 typedef uint64_t tcg_target_ulong;
55 #define TCG_PRIlx PRIx64
56 #define TCG_PRIld PRId64
57 #else
58 #error unsupported
59 #endif
60 
61 #if TCG_TARGET_NB_REGS <= 32
62 typedef uint32_t TCGRegSet;
63 #elif TCG_TARGET_NB_REGS <= 64
64 typedef uint64_t TCGRegSet;
65 #else
66 #error unsupported
67 #endif
68 
69 #if TCG_TARGET_REG_BITS == 32
70 /* Turn some undef macros into false macros.  */
71 #define TCG_TARGET_HAS_extr_i64_i32     0
72 #define TCG_TARGET_HAS_div_i64          0
73 #define TCG_TARGET_HAS_rem_i64          0
74 #define TCG_TARGET_HAS_div2_i64         0
75 #define TCG_TARGET_HAS_rot_i64          0
76 #define TCG_TARGET_HAS_ext8s_i64        0
77 #define TCG_TARGET_HAS_ext16s_i64       0
78 #define TCG_TARGET_HAS_ext32s_i64       0
79 #define TCG_TARGET_HAS_ext8u_i64        0
80 #define TCG_TARGET_HAS_ext16u_i64       0
81 #define TCG_TARGET_HAS_ext32u_i64       0
82 #define TCG_TARGET_HAS_bswap16_i64      0
83 #define TCG_TARGET_HAS_bswap32_i64      0
84 #define TCG_TARGET_HAS_bswap64_i64      0
85 #define TCG_TARGET_HAS_neg_i64          0
86 #define TCG_TARGET_HAS_not_i64          0
87 #define TCG_TARGET_HAS_andc_i64         0
88 #define TCG_TARGET_HAS_orc_i64          0
89 #define TCG_TARGET_HAS_eqv_i64          0
90 #define TCG_TARGET_HAS_nand_i64         0
91 #define TCG_TARGET_HAS_nor_i64          0
92 #define TCG_TARGET_HAS_clz_i64          0
93 #define TCG_TARGET_HAS_ctz_i64          0
94 #define TCG_TARGET_HAS_ctpop_i64        0
95 #define TCG_TARGET_HAS_deposit_i64      0
96 #define TCG_TARGET_HAS_extract_i64      0
97 #define TCG_TARGET_HAS_sextract_i64     0
98 #define TCG_TARGET_HAS_extract2_i64     0
99 #define TCG_TARGET_HAS_movcond_i64      0
100 #define TCG_TARGET_HAS_negsetcond_i64   0
101 #define TCG_TARGET_HAS_add2_i64         0
102 #define TCG_TARGET_HAS_sub2_i64         0
103 #define TCG_TARGET_HAS_mulu2_i64        0
104 #define TCG_TARGET_HAS_muls2_i64        0
105 #define TCG_TARGET_HAS_muluh_i64        0
106 #define TCG_TARGET_HAS_mulsh_i64        0
107 /* Turn some undef macros into true macros.  */
108 #define TCG_TARGET_HAS_add2_i32         1
109 #define TCG_TARGET_HAS_sub2_i32         1
110 #endif
111 
112 #ifndef TCG_TARGET_deposit_i32_valid
113 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
114 #endif
115 #ifndef TCG_TARGET_deposit_i64_valid
116 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
117 #endif
118 #ifndef TCG_TARGET_extract_i32_valid
119 #define TCG_TARGET_extract_i32_valid(ofs, len) 1
120 #endif
121 #ifndef TCG_TARGET_extract_i64_valid
122 #define TCG_TARGET_extract_i64_valid(ofs, len) 1
123 #endif
124 
125 /* Only one of DIV or DIV2 should be defined.  */
126 #if defined(TCG_TARGET_HAS_div_i32)
127 #define TCG_TARGET_HAS_div2_i32         0
128 #elif defined(TCG_TARGET_HAS_div2_i32)
129 #define TCG_TARGET_HAS_div_i32          0
130 #define TCG_TARGET_HAS_rem_i32          0
131 #endif
132 #if defined(TCG_TARGET_HAS_div_i64)
133 #define TCG_TARGET_HAS_div2_i64         0
134 #elif defined(TCG_TARGET_HAS_div2_i64)
135 #define TCG_TARGET_HAS_div_i64          0
136 #define TCG_TARGET_HAS_rem_i64          0
137 #endif
138 
139 #if !defined(TCG_TARGET_HAS_v64) \
140     && !defined(TCG_TARGET_HAS_v128) \
141     && !defined(TCG_TARGET_HAS_v256)
142 #define TCG_TARGET_MAYBE_vec            0
143 #define TCG_TARGET_HAS_abs_vec          0
144 #define TCG_TARGET_HAS_neg_vec          0
145 #define TCG_TARGET_HAS_not_vec          0
146 #define TCG_TARGET_HAS_andc_vec         0
147 #define TCG_TARGET_HAS_orc_vec          0
148 #define TCG_TARGET_HAS_nand_vec         0
149 #define TCG_TARGET_HAS_nor_vec          0
150 #define TCG_TARGET_HAS_eqv_vec          0
151 #define TCG_TARGET_HAS_roti_vec         0
152 #define TCG_TARGET_HAS_rots_vec         0
153 #define TCG_TARGET_HAS_rotv_vec         0
154 #define TCG_TARGET_HAS_shi_vec          0
155 #define TCG_TARGET_HAS_shs_vec          0
156 #define TCG_TARGET_HAS_shv_vec          0
157 #define TCG_TARGET_HAS_mul_vec          0
158 #define TCG_TARGET_HAS_sat_vec          0
159 #define TCG_TARGET_HAS_minmax_vec       0
160 #define TCG_TARGET_HAS_bitsel_vec       0
161 #define TCG_TARGET_HAS_cmpsel_vec       0
162 #else
163 #define TCG_TARGET_MAYBE_vec            1
164 #endif
165 #ifndef TCG_TARGET_HAS_v64
166 #define TCG_TARGET_HAS_v64              0
167 #endif
168 #ifndef TCG_TARGET_HAS_v128
169 #define TCG_TARGET_HAS_v128             0
170 #endif
171 #ifndef TCG_TARGET_HAS_v256
172 #define TCG_TARGET_HAS_v256             0
173 #endif
174 
175 typedef enum TCGOpcode {
176 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
177 #include "tcg/tcg-opc.h"
178 #undef DEF
179     NB_OPS,
180 } TCGOpcode;
181 
182 #define tcg_regset_set_reg(d, r)   ((d) |= (TCGRegSet)1 << (r))
183 #define tcg_regset_reset_reg(d, r) ((d) &= ~((TCGRegSet)1 << (r)))
184 #define tcg_regset_test_reg(d, r)  (((d) >> (r)) & 1)
185 
186 #ifndef TCG_TARGET_INSN_UNIT_SIZE
187 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
188 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
189 typedef uint8_t tcg_insn_unit;
190 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
191 typedef uint16_t tcg_insn_unit;
192 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
193 typedef uint32_t tcg_insn_unit;
194 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
195 typedef uint64_t tcg_insn_unit;
196 #else
197 /* The port better have done this.  */
198 #endif
199 
200 typedef struct TCGRelocation TCGRelocation;
201 struct TCGRelocation {
202     QSIMPLEQ_ENTRY(TCGRelocation) next;
203     tcg_insn_unit *ptr;
204     intptr_t addend;
205     int type;
206 };
207 
208 typedef struct TCGOp TCGOp;
209 typedef struct TCGLabelUse TCGLabelUse;
210 struct TCGLabelUse {
211     QSIMPLEQ_ENTRY(TCGLabelUse) next;
212     TCGOp *op;
213 };
214 
215 typedef struct TCGLabel TCGLabel;
216 struct TCGLabel {
217     bool present;
218     bool has_value;
219     uint16_t id;
220     union {
221         uintptr_t value;
222         const tcg_insn_unit *value_ptr;
223     } u;
224     QSIMPLEQ_HEAD(, TCGLabelUse) branches;
225     QSIMPLEQ_HEAD(, TCGRelocation) relocs;
226     QSIMPLEQ_ENTRY(TCGLabel) next;
227 };
228 
229 typedef struct TCGPool {
230     struct TCGPool *next;
231     int size;
232     uint8_t data[] __attribute__ ((aligned));
233 } TCGPool;
234 
235 #define TCG_POOL_CHUNK_SIZE 32768
236 
237 #define TCG_MAX_TEMPS 512
238 #define TCG_MAX_INSNS 512
239 
240 /* when the size of the arguments of a called function is smaller than
241    this value, they are statically allocated in the TB stack frame */
242 #define TCG_STATIC_CALL_ARGS_SIZE 128
243 
244 typedef enum TCGType {
245     TCG_TYPE_I32,
246     TCG_TYPE_I64,
247     TCG_TYPE_I128,
248 
249     TCG_TYPE_V64,
250     TCG_TYPE_V128,
251     TCG_TYPE_V256,
252 
253     /* Number of different types (integer not enum) */
254 #define TCG_TYPE_COUNT  (TCG_TYPE_V256 + 1)
255 
256     /* An alias for the size of the host register.  */
257 #if TCG_TARGET_REG_BITS == 32
258     TCG_TYPE_REG = TCG_TYPE_I32,
259 #else
260     TCG_TYPE_REG = TCG_TYPE_I64,
261 #endif
262 
263     /* An alias for the size of the native pointer.  */
264 #if UINTPTR_MAX == UINT32_MAX
265     TCG_TYPE_PTR = TCG_TYPE_I32,
266 #else
267     TCG_TYPE_PTR = TCG_TYPE_I64,
268 #endif
269 } TCGType;
270 
271 /**
272  * tcg_type_size
273  * @t: type
274  *
275  * Return the size of the type in bytes.
276  */
277 static inline int tcg_type_size(TCGType t)
278 {
279     unsigned i = t;
280     if (i >= TCG_TYPE_V64) {
281         tcg_debug_assert(i < TCG_TYPE_COUNT);
282         i -= TCG_TYPE_V64 - 1;
283     }
284     return 4 << i;
285 }
286 
287 /**
288  * get_alignment_bits
289  * @memop: MemOp value
290  *
291  * Extract the alignment size from the memop.
292  */
293 static inline unsigned get_alignment_bits(MemOp memop)
294 {
295     unsigned a = memop & MO_AMASK;
296 
297     if (a == MO_UNALN) {
298         /* No alignment required.  */
299         a = 0;
300     } else if (a == MO_ALIGN) {
301         /* A natural alignment requirement.  */
302         a = memop & MO_SIZE;
303     } else {
304         /* A specific alignment requirement.  */
305         a = a >> MO_ASHIFT;
306     }
307     return a;
308 }
309 
310 typedef tcg_target_ulong TCGArg;
311 
312 /* Define type and accessor macros for TCG variables.
313 
314    TCG variables are the inputs and outputs of TCG ops, as described
315    in tcg/README. Target CPU front-end code uses these types to deal
316    with TCG variables as it emits TCG code via the tcg_gen_* functions.
317    They come in several flavours:
318     * TCGv_i32  : 32 bit integer type
319     * TCGv_i64  : 64 bit integer type
320     * TCGv_i128 : 128 bit integer type
321     * TCGv_ptr  : a host pointer type
322     * TCGv_vec  : a host vector type; the exact size is not exposed
323                   to the CPU front-end code.
324     * TCGv      : an integer type the same size as target_ulong
325                   (an alias for either TCGv_i32 or TCGv_i64)
326    The compiler's type checking will complain if you mix them
327    up and pass the wrong sized TCGv to a function.
328 
329    Users of tcg_gen_* don't need to know about any of the internal
330    details of these, and should treat them as opaque types.
331    You won't be able to look inside them in a debugger either.
332 
333    Internal implementation details follow:
334 
335    Note that there is no definition of the structs TCGv_i32_d etc anywhere.
336    This is deliberate, because the values we store in variables of type
337    TCGv_i32 are not really pointers-to-structures. They're just small
338    integers, but keeping them in pointer types like this means that the
339    compiler will complain if you accidentally pass a TCGv_i32 to a
340    function which takes a TCGv_i64, and so on. Only the internals of
341    TCG need to care about the actual contents of the types.  */
342 
343 typedef struct TCGv_i32_d *TCGv_i32;
344 typedef struct TCGv_i64_d *TCGv_i64;
345 typedef struct TCGv_i128_d *TCGv_i128;
346 typedef struct TCGv_ptr_d *TCGv_ptr;
347 typedef struct TCGv_vec_d *TCGv_vec;
348 typedef TCGv_ptr TCGv_env;
349 
350 /* call flags */
351 /* Helper does not read globals (either directly or through an exception). It
352    implies TCG_CALL_NO_WRITE_GLOBALS. */
353 #define TCG_CALL_NO_READ_GLOBALS    0x0001
354 /* Helper does not write globals */
355 #define TCG_CALL_NO_WRITE_GLOBALS   0x0002
356 /* Helper can be safely suppressed if the return value is not used. */
357 #define TCG_CALL_NO_SIDE_EFFECTS    0x0004
358 /* Helper is G_NORETURN.  */
359 #define TCG_CALL_NO_RETURN          0x0008
360 /* Helper is part of Plugins.  */
361 #define TCG_CALL_PLUGIN             0x0010
362 
363 /* convenience version of most used call flags */
364 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
365 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
366 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
367 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
368 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
369 
370 /*
371  * Flags for the bswap opcodes.
372  * If IZ, the input is zero-extended, otherwise unknown.
373  * If OZ or OS, the output is zero- or sign-extended respectively,
374  * otherwise the high bits are undefined.
375  */
376 enum {
377     TCG_BSWAP_IZ = 1,
378     TCG_BSWAP_OZ = 2,
379     TCG_BSWAP_OS = 4,
380 };
381 
382 typedef enum TCGTempVal {
383     TEMP_VAL_DEAD,
384     TEMP_VAL_REG,
385     TEMP_VAL_MEM,
386     TEMP_VAL_CONST,
387 } TCGTempVal;
388 
389 typedef enum TCGTempKind {
390     /*
391      * Temp is dead at the end of the extended basic block (EBB),
392      * the single-entry multiple-exit region that falls through
393      * conditional branches.
394      */
395     TEMP_EBB,
396     /* Temp is live across the entire translation block, but dead at end. */
397     TEMP_TB,
398     /* Temp is live across the entire translation block, and between them. */
399     TEMP_GLOBAL,
400     /* Temp is in a fixed register. */
401     TEMP_FIXED,
402     /* Temp is a fixed constant. */
403     TEMP_CONST,
404 } TCGTempKind;
405 
406 typedef struct TCGTemp {
407     TCGReg reg:8;
408     TCGTempVal val_type:8;
409     TCGType base_type:8;
410     TCGType type:8;
411     TCGTempKind kind:3;
412     unsigned int indirect_reg:1;
413     unsigned int indirect_base:1;
414     unsigned int mem_coherent:1;
415     unsigned int mem_allocated:1;
416     unsigned int temp_allocated:1;
417     unsigned int temp_subindex:1;
418 
419     int64_t val;
420     struct TCGTemp *mem_base;
421     intptr_t mem_offset;
422     const char *name;
423 
424     /* Pass-specific information that can be stored for a temporary.
425        One word worth of integer data, and one pointer to data
426        allocated separately.  */
427     uintptr_t state;
428     void *state_ptr;
429 } TCGTemp;
430 
431 typedef struct TCGContext TCGContext;
432 
433 typedef struct TCGTempSet {
434     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
435 } TCGTempSet;
436 
437 /*
438  * With 1 128-bit output, a 32-bit host requires 4 output parameters,
439  * which leaves a maximum of 28 other slots.  Which is enough for 7
440  * 128-bit operands.
441  */
442 #define DEAD_ARG  (1 << 4)
443 #define SYNC_ARG  (1 << 0)
444 typedef uint32_t TCGLifeData;
445 
446 struct TCGOp {
447     TCGOpcode opc   : 8;
448     unsigned nargs  : 8;
449 
450     /* Parameters for this opcode.  See below.  */
451     unsigned param1 : 8;
452     unsigned param2 : 8;
453 
454     /* Lifetime data of the operands.  */
455     TCGLifeData life;
456 
457     /* Next and previous opcodes.  */
458     QTAILQ_ENTRY(TCGOp) link;
459 
460     /* Register preferences for the output(s).  */
461     TCGRegSet output_pref[2];
462 
463     /* Arguments for the opcode.  */
464     TCGArg args[];
465 };
466 
467 #define TCGOP_CALLI(X)    (X)->param1
468 #define TCGOP_CALLO(X)    (X)->param2
469 
470 #define TCGOP_VECL(X)     (X)->param1
471 #define TCGOP_VECE(X)     (X)->param2
472 
473 /* Make sure operands fit in the bitfields above.  */
474 QEMU_BUILD_BUG_ON(NB_OPS > (1 << 8));
475 
476 static inline TCGRegSet output_pref(const TCGOp *op, unsigned i)
477 {
478     return i < ARRAY_SIZE(op->output_pref) ? op->output_pref[i] : 0;
479 }
480 
481 struct TCGContext {
482     uint8_t *pool_cur, *pool_end;
483     TCGPool *pool_first, *pool_current, *pool_first_large;
484     int nb_labels;
485     int nb_globals;
486     int nb_temps;
487     int nb_indirects;
488     int nb_ops;
489     TCGType addr_type;            /* TCG_TYPE_I32 or TCG_TYPE_I64 */
490 
491     int page_mask;
492     uint8_t page_bits;
493     uint8_t tlb_dyn_max_bits;
494     uint8_t insn_start_words;
495     TCGBar guest_mo;
496 
497     TCGRegSet reserved_regs;
498     intptr_t current_frame_offset;
499     intptr_t frame_start;
500     intptr_t frame_end;
501     TCGTemp *frame_temp;
502 
503     TranslationBlock *gen_tb;     /* tb for which code is being generated */
504     tcg_insn_unit *code_buf;      /* pointer for start of tb */
505     tcg_insn_unit *code_ptr;      /* pointer for running end of tb */
506 
507 #ifdef CONFIG_DEBUG_TCG
508     int goto_tb_issue_mask;
509     const TCGOpcode *vecop_list;
510 #endif
511 
512     /* Code generation.  Note that we specifically do not use tcg_insn_unit
513        here, because there's too much arithmetic throughout that relies
514        on addition and subtraction working on bytes.  Rely on the GCC
515        extension that allows arithmetic on void*.  */
516     void *code_gen_buffer;
517     size_t code_gen_buffer_size;
518     void *code_gen_ptr;
519     void *data_gen_ptr;
520 
521     /* Threshold to flush the translated code buffer.  */
522     void *code_gen_highwater;
523 
524     /* Track which vCPU triggers events */
525     CPUState *cpu;                      /* *_trans */
526 
527     /* These structures are private to tcg-target.c.inc.  */
528 #ifdef TCG_TARGET_NEED_LDST_LABELS
529     QSIMPLEQ_HEAD(, TCGLabelQemuLdst) ldst_labels;
530 #endif
531 #ifdef TCG_TARGET_NEED_POOL_LABELS
532     struct TCGLabelPoolData *pool_labels;
533 #endif
534 
535     TCGLabel *exitreq_label;
536 
537 #ifdef CONFIG_PLUGIN
538     /*
539      * We keep one plugin_tb struct per TCGContext. Note that on every TB
540      * translation we clear but do not free its contents; this way we
541      * avoid a lot of malloc/free churn, since after a few TB's it's
542      * unlikely that we'll need to allocate either more instructions or more
543      * space for instructions (for variable-instruction-length ISAs).
544      */
545     struct qemu_plugin_tb *plugin_tb;
546 
547     /* descriptor of the instruction being translated */
548     struct qemu_plugin_insn *plugin_insn;
549 #endif
550 
551     GHashTable *const_table[TCG_TYPE_COUNT];
552     TCGTempSet free_temps[TCG_TYPE_COUNT];
553     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
554 
555     QTAILQ_HEAD(, TCGOp) ops, free_ops;
556     QSIMPLEQ_HEAD(, TCGLabel) labels;
557 
558     /* Tells which temporary holds a given register.
559        It does not take into account fixed registers */
560     TCGTemp *reg_to_temp[TCG_TARGET_NB_REGS];
561 
562     uint16_t gen_insn_end_off[TCG_MAX_INSNS];
563     uint64_t *gen_insn_data;
564 
565     /* Exit to translator on overflow. */
566     sigjmp_buf jmp_trans;
567 };
568 
569 static inline bool temp_readonly(TCGTemp *ts)
570 {
571     return ts->kind >= TEMP_FIXED;
572 }
573 
574 #ifdef CONFIG_USER_ONLY
575 extern bool tcg_use_softmmu;
576 #else
577 #define tcg_use_softmmu  true
578 #endif
579 
580 extern __thread TCGContext *tcg_ctx;
581 extern const void *tcg_code_gen_epilogue;
582 extern uintptr_t tcg_splitwx_diff;
583 extern TCGv_env tcg_env;
584 
585 bool in_code_gen_buffer(const void *p);
586 
587 #ifdef CONFIG_DEBUG_TCG
588 const void *tcg_splitwx_to_rx(void *rw);
589 void *tcg_splitwx_to_rw(const void *rx);
590 #else
591 static inline const void *tcg_splitwx_to_rx(void *rw)
592 {
593     return rw ? rw + tcg_splitwx_diff : NULL;
594 }
595 
596 static inline void *tcg_splitwx_to_rw(const void *rx)
597 {
598     return rx ? (void *)rx - tcg_splitwx_diff : NULL;
599 }
600 #endif
601 
602 static inline TCGArg temp_arg(TCGTemp *ts)
603 {
604     return (uintptr_t)ts;
605 }
606 
607 static inline TCGTemp *arg_temp(TCGArg a)
608 {
609     return (TCGTemp *)(uintptr_t)a;
610 }
611 
612 #ifdef CONFIG_DEBUG_TCG
613 size_t temp_idx(TCGTemp *ts);
614 TCGTemp *tcgv_i32_temp(TCGv_i32 v);
615 #else
616 static inline size_t temp_idx(TCGTemp *ts)
617 {
618     return ts - tcg_ctx->temps;
619 }
620 
621 /*
622  * Using the offset of a temporary, relative to TCGContext, rather than
623  * its index means that we don't use 0.  That leaves offset 0 free for
624  * a NULL representation without having to leave index 0 unused.
625  */
626 static inline TCGTemp *tcgv_i32_temp(TCGv_i32 v)
627 {
628     return (void *)tcg_ctx + (uintptr_t)v;
629 }
630 #endif
631 
632 static inline TCGTemp *tcgv_i64_temp(TCGv_i64 v)
633 {
634     return tcgv_i32_temp((TCGv_i32)v);
635 }
636 
637 static inline TCGTemp *tcgv_i128_temp(TCGv_i128 v)
638 {
639     return tcgv_i32_temp((TCGv_i32)v);
640 }
641 
642 static inline TCGTemp *tcgv_ptr_temp(TCGv_ptr v)
643 {
644     return tcgv_i32_temp((TCGv_i32)v);
645 }
646 
647 static inline TCGTemp *tcgv_vec_temp(TCGv_vec v)
648 {
649     return tcgv_i32_temp((TCGv_i32)v);
650 }
651 
652 static inline TCGArg tcgv_i32_arg(TCGv_i32 v)
653 {
654     return temp_arg(tcgv_i32_temp(v));
655 }
656 
657 static inline TCGArg tcgv_i64_arg(TCGv_i64 v)
658 {
659     return temp_arg(tcgv_i64_temp(v));
660 }
661 
662 static inline TCGArg tcgv_i128_arg(TCGv_i128 v)
663 {
664     return temp_arg(tcgv_i128_temp(v));
665 }
666 
667 static inline TCGArg tcgv_ptr_arg(TCGv_ptr v)
668 {
669     return temp_arg(tcgv_ptr_temp(v));
670 }
671 
672 static inline TCGArg tcgv_vec_arg(TCGv_vec v)
673 {
674     return temp_arg(tcgv_vec_temp(v));
675 }
676 
677 static inline TCGv_i32 temp_tcgv_i32(TCGTemp *t)
678 {
679     (void)temp_idx(t); /* trigger embedded assert */
680     return (TCGv_i32)((void *)t - (void *)tcg_ctx);
681 }
682 
683 static inline TCGv_i64 temp_tcgv_i64(TCGTemp *t)
684 {
685     return (TCGv_i64)temp_tcgv_i32(t);
686 }
687 
688 static inline TCGv_i128 temp_tcgv_i128(TCGTemp *t)
689 {
690     return (TCGv_i128)temp_tcgv_i32(t);
691 }
692 
693 static inline TCGv_ptr temp_tcgv_ptr(TCGTemp *t)
694 {
695     return (TCGv_ptr)temp_tcgv_i32(t);
696 }
697 
698 static inline TCGv_vec temp_tcgv_vec(TCGTemp *t)
699 {
700     return (TCGv_vec)temp_tcgv_i32(t);
701 }
702 
703 static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
704 {
705     return op->args[arg];
706 }
707 
708 static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
709 {
710     op->args[arg] = v;
711 }
712 
713 static inline uint64_t tcg_get_insn_start_param(TCGOp *op, int arg)
714 {
715     if (TCG_TARGET_REG_BITS == 64) {
716         return tcg_get_insn_param(op, arg);
717     } else {
718         return deposit64(tcg_get_insn_param(op, arg * 2), 32, 32,
719                          tcg_get_insn_param(op, arg * 2 + 1));
720     }
721 }
722 
723 static inline void tcg_set_insn_start_param(TCGOp *op, int arg, uint64_t v)
724 {
725     if (TCG_TARGET_REG_BITS == 64) {
726         tcg_set_insn_param(op, arg, v);
727     } else {
728         tcg_set_insn_param(op, arg * 2, v);
729         tcg_set_insn_param(op, arg * 2 + 1, v >> 32);
730     }
731 }
732 
733 /* The last op that was emitted.  */
734 static inline TCGOp *tcg_last_op(void)
735 {
736     return QTAILQ_LAST(&tcg_ctx->ops);
737 }
738 
739 /* Test for whether to terminate the TB for using too many opcodes.  */
740 static inline bool tcg_op_buf_full(void)
741 {
742     /* This is not a hard limit, it merely stops translation when
743      * we have produced "enough" opcodes.  We want to limit TB size
744      * such that a RISC host can reasonably use a 16-bit signed
745      * branch within the TB.  We also need to be mindful of the
746      * 16-bit unsigned offsets, TranslationBlock.jmp_reset_offset[]
747      * and TCGContext.gen_insn_end_off[].
748      */
749     return tcg_ctx->nb_ops >= 4000;
750 }
751 
752 /* pool based memory allocation */
753 
754 /* user-mode: mmap_lock must be held for tcg_malloc_internal. */
755 void *tcg_malloc_internal(TCGContext *s, int size);
756 void tcg_pool_reset(TCGContext *s);
757 TranslationBlock *tcg_tb_alloc(TCGContext *s);
758 
759 void tcg_region_reset_all(void);
760 
761 size_t tcg_code_size(void);
762 size_t tcg_code_capacity(void);
763 
764 void tcg_tb_insert(TranslationBlock *tb);
765 void tcg_tb_remove(TranslationBlock *tb);
766 TranslationBlock *tcg_tb_lookup(uintptr_t tc_ptr);
767 void tcg_tb_foreach(GTraverseFunc func, gpointer user_data);
768 size_t tcg_nb_tbs(void);
769 
770 /* user-mode: Called with mmap_lock held.  */
771 static inline void *tcg_malloc(int size)
772 {
773     TCGContext *s = tcg_ctx;
774     uint8_t *ptr, *ptr_end;
775 
776     /* ??? This is a weak placeholder for minimum malloc alignment.  */
777     size = QEMU_ALIGN_UP(size, 8);
778 
779     ptr = s->pool_cur;
780     ptr_end = ptr + size;
781     if (unlikely(ptr_end > s->pool_end)) {
782         return tcg_malloc_internal(tcg_ctx, size);
783     } else {
784         s->pool_cur = ptr_end;
785         return ptr;
786     }
787 }
788 
789 void tcg_func_start(TCGContext *s);
790 
791 int tcg_gen_code(TCGContext *s, TranslationBlock *tb, uint64_t pc_start);
792 
793 void tb_target_set_jmp_target(const TranslationBlock *, int,
794                               uintptr_t, uintptr_t);
795 
796 void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t size);
797 
798 TCGTemp *tcg_global_mem_new_internal(TCGType, TCGv_ptr,
799                                      intptr_t, const char *);
800 TCGTemp *tcg_temp_new_internal(TCGType, TCGTempKind);
801 TCGv_vec tcg_temp_new_vec(TCGType type);
802 TCGv_vec tcg_temp_new_vec_matching(TCGv_vec match);
803 
804 static inline TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t offset,
805                                               const char *name)
806 {
807     TCGTemp *t = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
808     return temp_tcgv_i32(t);
809 }
810 
811 static inline TCGv_i32 tcg_temp_new_i32(void)
812 {
813     TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_I32, TEMP_TB);
814     return temp_tcgv_i32(t);
815 }
816 
817 static inline TCGv_i64 tcg_global_mem_new_i64(TCGv_ptr reg, intptr_t offset,
818                                               const char *name)
819 {
820     TCGTemp *t = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
821     return temp_tcgv_i64(t);
822 }
823 
824 static inline TCGv_i64 tcg_temp_new_i64(void)
825 {
826     TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_I64, TEMP_TB);
827     return temp_tcgv_i64(t);
828 }
829 
830 static inline TCGv_i128 tcg_temp_new_i128(void)
831 {
832     TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_I128, TEMP_TB);
833     return temp_tcgv_i128(t);
834 }
835 
836 static inline TCGv_ptr tcg_global_mem_new_ptr(TCGv_ptr reg, intptr_t offset,
837                                               const char *name)
838 {
839     TCGTemp *t = tcg_global_mem_new_internal(TCG_TYPE_PTR, reg, offset, name);
840     return temp_tcgv_ptr(t);
841 }
842 
843 static inline TCGv_ptr tcg_temp_new_ptr(void)
844 {
845     TCGTemp *t = tcg_temp_new_internal(TCG_TYPE_PTR, TEMP_TB);
846     return temp_tcgv_ptr(t);
847 }
848 
849 #define TCG_CT_CONST  1 /* any constant of register size */
850 
851 typedef struct TCGArgConstraint {
852     unsigned ct : 16;
853     unsigned alias_index : 4;
854     unsigned sort_index : 4;
855     unsigned pair_index : 4;
856     unsigned pair : 2;  /* 0: none, 1: first, 2: second, 3: second alias */
857     bool oalias : 1;
858     bool ialias : 1;
859     bool newreg : 1;
860     TCGRegSet regs;
861 } TCGArgConstraint;
862 
863 #define TCG_MAX_OP_ARGS 16
864 
865 /* Bits for TCGOpDef->flags, 8 bits available, all used.  */
866 enum {
867     /* Instruction exits the translation block.  */
868     TCG_OPF_BB_EXIT      = 0x01,
869     /* Instruction defines the end of a basic block.  */
870     TCG_OPF_BB_END       = 0x02,
871     /* Instruction clobbers call registers and potentially update globals.  */
872     TCG_OPF_CALL_CLOBBER = 0x04,
873     /* Instruction has side effects: it cannot be removed if its outputs
874        are not used, and might trigger exceptions.  */
875     TCG_OPF_SIDE_EFFECTS = 0x08,
876     /* Instruction operands are 64-bits (otherwise 32-bits).  */
877     TCG_OPF_64BIT        = 0x10,
878     /* Instruction is optional and not implemented by the host, or insn
879        is generic and should not be implemented by the host.  */
880     TCG_OPF_NOT_PRESENT  = 0x20,
881     /* Instruction operands are vectors.  */
882     TCG_OPF_VECTOR       = 0x40,
883     /* Instruction is a conditional branch. */
884     TCG_OPF_COND_BRANCH  = 0x80
885 };
886 
887 typedef struct TCGOpDef {
888     const char *name;
889     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
890     uint8_t flags;
891     TCGArgConstraint *args_ct;
892 } TCGOpDef;
893 
894 extern TCGOpDef tcg_op_defs[];
895 extern const size_t tcg_op_defs_max;
896 
897 typedef struct TCGTargetOpDef {
898     TCGOpcode op;
899     const char *args_ct_str[TCG_MAX_OP_ARGS];
900 } TCGTargetOpDef;
901 
902 bool tcg_op_supported(TCGOpcode op);
903 
904 void tcg_gen_call0(TCGHelperInfo *, TCGTemp *ret);
905 void tcg_gen_call1(TCGHelperInfo *, TCGTemp *ret, TCGTemp *);
906 void tcg_gen_call2(TCGHelperInfo *, TCGTemp *ret, TCGTemp *, TCGTemp *);
907 void tcg_gen_call3(TCGHelperInfo *, TCGTemp *ret, TCGTemp *,
908                    TCGTemp *, TCGTemp *);
909 void tcg_gen_call4(TCGHelperInfo *, TCGTemp *ret, TCGTemp *, TCGTemp *,
910                    TCGTemp *, TCGTemp *);
911 void tcg_gen_call5(TCGHelperInfo *, TCGTemp *ret, TCGTemp *, TCGTemp *,
912                    TCGTemp *, TCGTemp *, TCGTemp *);
913 void tcg_gen_call6(TCGHelperInfo *, TCGTemp *ret, TCGTemp *, TCGTemp *,
914                    TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *);
915 void tcg_gen_call7(TCGHelperInfo *, TCGTemp *ret, TCGTemp *, TCGTemp *,
916                    TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *, TCGTemp *);
917 
918 TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs);
919 void tcg_op_remove(TCGContext *s, TCGOp *op);
920 TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op,
921                             TCGOpcode opc, unsigned nargs);
922 TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op,
923                            TCGOpcode opc, unsigned nargs);
924 
925 /**
926  * tcg_remove_ops_after:
927  * @op: target operation
928  *
929  * Discard any opcodes emitted since @op.  Expected usage is to save
930  * a starting point with tcg_last_op(), speculatively emit opcodes,
931  * then decide whether or not to keep those opcodes after the fact.
932  */
933 void tcg_remove_ops_after(TCGOp *op);
934 
935 void tcg_optimize(TCGContext *s);
936 
937 /*
938  * Locate or create a read-only temporary that is a constant.
939  * This kind of temporary need not be freed, but for convenience
940  * will be silently ignored by tcg_temp_free_*.
941  */
942 TCGTemp *tcg_constant_internal(TCGType type, int64_t val);
943 
944 static inline TCGv_i32 tcg_constant_i32(int32_t val)
945 {
946     return temp_tcgv_i32(tcg_constant_internal(TCG_TYPE_I32, val));
947 }
948 
949 static inline TCGv_i64 tcg_constant_i64(int64_t val)
950 {
951     return temp_tcgv_i64(tcg_constant_internal(TCG_TYPE_I64, val));
952 }
953 
954 TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val);
955 TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val);
956 
957 #if UINTPTR_MAX == UINT32_MAX
958 # define tcg_constant_ptr(x)     ((TCGv_ptr)tcg_constant_i32((intptr_t)(x)))
959 #else
960 # define tcg_constant_ptr(x)     ((TCGv_ptr)tcg_constant_i64((intptr_t)(x)))
961 #endif
962 
963 TCGLabel *gen_new_label(void);
964 
965 /**
966  * label_arg
967  * @l: label
968  *
969  * Encode a label for storage in the TCG opcode stream.
970  */
971 
972 static inline TCGArg label_arg(TCGLabel *l)
973 {
974     return (uintptr_t)l;
975 }
976 
977 /**
978  * arg_label
979  * @i: value
980  *
981  * The opposite of label_arg.  Retrieve a label from the
982  * encoding of the TCG opcode stream.
983  */
984 
985 static inline TCGLabel *arg_label(TCGArg i)
986 {
987     return (TCGLabel *)(uintptr_t)i;
988 }
989 
990 /**
991  * tcg_ptr_byte_diff
992  * @a, @b: addresses to be differenced
993  *
994  * There are many places within the TCG backends where we need a byte
995  * difference between two pointers.  While this can be accomplished
996  * with local casting, it's easy to get wrong -- especially if one is
997  * concerned with the signedness of the result.
998  *
999  * This version relies on GCC's void pointer arithmetic to get the
1000  * correct result.
1001  */
1002 
1003 static inline ptrdiff_t tcg_ptr_byte_diff(const void *a, const void *b)
1004 {
1005     return a - b;
1006 }
1007 
1008 /**
1009  * tcg_pcrel_diff
1010  * @s: the tcg context
1011  * @target: address of the target
1012  *
1013  * Produce a pc-relative difference, from the current code_ptr
1014  * to the destination address.
1015  */
1016 
1017 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, const void *target)
1018 {
1019     return tcg_ptr_byte_diff(target, tcg_splitwx_to_rx(s->code_ptr));
1020 }
1021 
1022 /**
1023  * tcg_tbrel_diff
1024  * @s: the tcg context
1025  * @target: address of the target
1026  *
1027  * Produce a difference, from the beginning of the current TB code
1028  * to the destination address.
1029  */
1030 static inline ptrdiff_t tcg_tbrel_diff(TCGContext *s, const void *target)
1031 {
1032     return tcg_ptr_byte_diff(target, tcg_splitwx_to_rx(s->code_buf));
1033 }
1034 
1035 /**
1036  * tcg_current_code_size
1037  * @s: the tcg context
1038  *
1039  * Compute the current code size within the translation block.
1040  * This is used to fill in qemu's data structures for goto_tb.
1041  */
1042 
1043 static inline size_t tcg_current_code_size(TCGContext *s)
1044 {
1045     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
1046 }
1047 
1048 /**
1049  * tcg_qemu_tb_exec:
1050  * @env: pointer to CPUArchState for the CPU
1051  * @tb_ptr: address of generated code for the TB to execute
1052  *
1053  * Start executing code from a given translation block.
1054  * Where translation blocks have been linked, execution
1055  * may proceed from the given TB into successive ones.
1056  * Control eventually returns only when some action is needed
1057  * from the top-level loop: either control must pass to a TB
1058  * which has not yet been directly linked, or an asynchronous
1059  * event such as an interrupt needs handling.
1060  *
1061  * Return: The return value is the value passed to the corresponding
1062  * tcg_gen_exit_tb() at translation time of the last TB attempted to execute.
1063  * The value is either zero or a 4-byte aligned pointer to that TB combined
1064  * with additional information in its two least significant bits. The
1065  * additional information is encoded as follows:
1066  *  0, 1: the link between this TB and the next is via the specified
1067  *        TB index (0 or 1). That is, we left the TB via (the equivalent
1068  *        of) "goto_tb <index>". The main loop uses this to determine
1069  *        how to link the TB just executed to the next.
1070  *  2:    we are using instruction counting code generation, and we
1071  *        did not start executing this TB because the instruction counter
1072  *        would hit zero midway through it. In this case the pointer
1073  *        returned is the TB we were about to execute, and the caller must
1074  *        arrange to execute the remaining count of instructions.
1075  *  3:    we stopped because the CPU's exit_request flag was set
1076  *        (usually meaning that there is an interrupt that needs to be
1077  *        handled). The pointer returned is the TB we were about to execute
1078  *        when we noticed the pending exit request.
1079  *
1080  * If the bottom two bits indicate an exit-via-index then the CPU
1081  * state is correctly synchronised and ready for execution of the next
1082  * TB (and in particular the guest PC is the address to execute next).
1083  * Otherwise, we gave up on execution of this TB before it started, and
1084  * the caller must fix up the CPU state by calling the CPU's
1085  * synchronize_from_tb() method with the TB pointer we return (falling
1086  * back to calling the CPU's set_pc method with tb->pb if no
1087  * synchronize_from_tb() method exists).
1088  *
1089  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
1090  * to this default (which just calls the prologue.code emitted by
1091  * tcg_target_qemu_prologue()).
1092  */
1093 #define TB_EXIT_MASK      3
1094 #define TB_EXIT_IDX0      0
1095 #define TB_EXIT_IDX1      1
1096 #define TB_EXIT_IDXMAX    1
1097 #define TB_EXIT_REQUESTED 3
1098 
1099 #ifdef CONFIG_TCG_INTERPRETER
1100 uintptr_t tcg_qemu_tb_exec(CPUArchState *env, const void *tb_ptr);
1101 #else
1102 typedef uintptr_t tcg_prologue_fn(CPUArchState *env, const void *tb_ptr);
1103 extern tcg_prologue_fn *tcg_qemu_tb_exec;
1104 #endif
1105 
1106 void tcg_register_jit(const void *buf, size_t buf_size);
1107 
1108 #if TCG_TARGET_MAYBE_vec
1109 /* Return zero if the tuple (opc, type, vece) is unsupportable;
1110    return > 0 if it is directly supportable;
1111    return < 0 if we must call tcg_expand_vec_op.  */
1112 int tcg_can_emit_vec_op(TCGOpcode, TCGType, unsigned);
1113 #else
1114 static inline int tcg_can_emit_vec_op(TCGOpcode o, TCGType t, unsigned ve)
1115 {
1116     return 0;
1117 }
1118 #endif
1119 
1120 /* Expand the tuple (opc, type, vece) on the given arguments.  */
1121 void tcg_expand_vec_op(TCGOpcode, TCGType, unsigned, TCGArg, ...);
1122 
1123 /* Replicate a constant C according to the log2 of the element size.  */
1124 uint64_t dup_const(unsigned vece, uint64_t c);
1125 
1126 #define dup_const(VECE, C)                                         \
1127     (__builtin_constant_p(VECE)                                    \
1128      ? (  (VECE) == MO_8  ? 0x0101010101010101ull * (uint8_t)(C)   \
1129         : (VECE) == MO_16 ? 0x0001000100010001ull * (uint16_t)(C)  \
1130         : (VECE) == MO_32 ? 0x0000000100000001ull * (uint32_t)(C)  \
1131         : (VECE) == MO_64 ? (uint64_t)(C)                          \
1132         : (qemu_build_not_reached_always(), 0))                    \
1133      : dup_const(VECE, C))
1134 
1135 static inline const TCGOpcode *tcg_swap_vecop_list(const TCGOpcode *n)
1136 {
1137 #ifdef CONFIG_DEBUG_TCG
1138     const TCGOpcode *o = tcg_ctx->vecop_list;
1139     tcg_ctx->vecop_list = n;
1140     return o;
1141 #else
1142     return NULL;
1143 #endif
1144 }
1145 
1146 bool tcg_can_emit_vecop_list(const TCGOpcode *, TCGType, unsigned);
1147 
1148 #endif /* TCG_H */
1149