1 /* 2 * Generic vector operation expansion 3 * 4 * Copyright (c) 2018 Linaro 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2.1 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef TCG_TCG_OP_GVEC_H 21 #define TCG_TCG_OP_GVEC_H 22 23 /* 24 * "Generic" vectors. All operands are given as offsets from ENV, 25 * and therefore cannot also be allocated via tcg_global_mem_new_*. 26 * OPRSZ is the byte size of the vector upon which the operation is performed. 27 * MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared. 28 * 29 * All sizes must be 8 or any multiple of 16. 30 * When OPRSZ is 8, the alignment may be 8, otherwise must be 16. 31 * Operands may completely, but not partially, overlap. 32 */ 33 34 /* Expand a call to a gvec-style helper, with pointers to two vector 35 operands, and a descriptor (see tcg-gvec-desc.h). */ 36 typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32); 37 void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs, 38 uint32_t oprsz, uint32_t maxsz, int32_t data, 39 gen_helper_gvec_2 *fn); 40 41 /* Similarly, passing an extra data value. */ 42 typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32); 43 void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c, 44 uint32_t oprsz, uint32_t maxsz, int32_t data, 45 gen_helper_gvec_2i *fn); 46 47 /* Similarly, passing an extra pointer (e.g. env or float_status). */ 48 typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); 49 void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs, 50 TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz, 51 int32_t data, gen_helper_gvec_2_ptr *fn); 52 53 /* Similarly, with three vector operands. */ 54 typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32); 55 void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs, 56 uint32_t oprsz, uint32_t maxsz, int32_t data, 57 gen_helper_gvec_3 *fn); 58 59 /* Similarly, with four vector operands. */ 60 typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr, 61 TCGv_ptr, TCGv_i32); 62 void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs, 63 uint32_t cofs, uint32_t oprsz, uint32_t maxsz, 64 int32_t data, gen_helper_gvec_4 *fn); 65 66 /* Similarly, with five vector operands. */ 67 typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, 68 TCGv_ptr, TCGv_i32); 69 void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs, 70 uint32_t cofs, uint32_t xofs, uint32_t oprsz, 71 uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn); 72 73 typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, 74 TCGv_ptr, TCGv_i32); 75 void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, 76 TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz, 77 int32_t data, gen_helper_gvec_3_ptr *fn); 78 79 typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, 80 TCGv_ptr, TCGv_ptr, TCGv_i32); 81 void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, 82 uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz, 83 uint32_t maxsz, int32_t data, 84 gen_helper_gvec_4_ptr *fn); 85 86 typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, 87 TCGv_ptr, TCGv_ptr, TCGv_i32); 88 void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs, 89 uint32_t cofs, uint32_t eofs, TCGv_ptr ptr, 90 uint32_t oprsz, uint32_t maxsz, int32_t data, 91 gen_helper_gvec_5_ptr *fn); 92 93 /* Expand a gvec operation. Either inline or out-of-line depending on 94 the actual vector size and the operations supported by the host. */ 95 typedef struct { 96 /* Expand inline as a 64-bit or 32-bit integer. 97 Only one of these will be non-NULL. */ 98 void (*fni8)(TCGv_i64, TCGv_i64); 99 void (*fni4)(TCGv_i32, TCGv_i32); 100 /* Expand inline with a host vector type. */ 101 void (*fniv)(unsigned, TCGv_vec, TCGv_vec); 102 /* Expand out-of-line helper w/descriptor. */ 103 gen_helper_gvec_2 *fno; 104 /* The optional opcodes, if any, utilized by .fniv. */ 105 const TCGOpcode *opt_opc; 106 /* The data argument to the out-of-line helper. */ 107 int32_t data; 108 /* The vector element size, if applicable. */ 109 uint8_t vece; 110 /* Prefer i64 to v64. */ 111 bool prefer_i64; 112 } GVecGen2; 113 114 typedef struct { 115 /* Expand inline as a 64-bit or 32-bit integer. 116 Only one of these will be non-NULL. */ 117 void (*fni8)(TCGv_i64, TCGv_i64, int64_t); 118 void (*fni4)(TCGv_i32, TCGv_i32, int32_t); 119 /* Expand inline with a host vector type. */ 120 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, int64_t); 121 /* Expand out-of-line helper w/descriptor, data in descriptor. */ 122 gen_helper_gvec_2 *fno; 123 /* Expand out-of-line helper w/descriptor, data as argument. */ 124 gen_helper_gvec_2i *fnoi; 125 /* The optional opcodes, if any, utilized by .fniv. */ 126 const TCGOpcode *opt_opc; 127 /* The vector element size, if applicable. */ 128 uint8_t vece; 129 /* Prefer i64 to v64. */ 130 bool prefer_i64; 131 /* Load dest as a 3rd source operand. */ 132 bool load_dest; 133 } GVecGen2i; 134 135 typedef struct { 136 /* Expand inline as a 64-bit or 32-bit integer. 137 Only one of these will be non-NULL. */ 138 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64); 139 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32); 140 /* Expand inline with a host vector type. */ 141 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec); 142 /* Expand out-of-line helper w/descriptor. */ 143 gen_helper_gvec_2i *fno; 144 /* The optional opcodes, if any, utilized by .fniv. */ 145 const TCGOpcode *opt_opc; 146 /* The data argument to the out-of-line helper. */ 147 uint32_t data; 148 /* The vector element size, if applicable. */ 149 uint8_t vece; 150 /* Prefer i64 to v64. */ 151 bool prefer_i64; 152 /* Load scalar as 1st source operand. */ 153 bool scalar_first; 154 } GVecGen2s; 155 156 typedef struct { 157 /* Expand inline as a 64-bit or 32-bit integer. 158 Only one of these will be non-NULL. */ 159 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64); 160 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32); 161 /* Expand inline with a host vector type. */ 162 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec); 163 /* Expand out-of-line helper w/descriptor. */ 164 gen_helper_gvec_3 *fno; 165 /* The optional opcodes, if any, utilized by .fniv. */ 166 const TCGOpcode *opt_opc; 167 /* The data argument to the out-of-line helper. */ 168 int32_t data; 169 /* The vector element size, if applicable. */ 170 uint8_t vece; 171 /* Prefer i64 to v64. */ 172 bool prefer_i64; 173 /* Load dest as a 3rd source operand. */ 174 bool load_dest; 175 } GVecGen3; 176 177 typedef struct { 178 /* 179 * Expand inline as a 64-bit or 32-bit integer. Only one of these will be 180 * non-NULL. 181 */ 182 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, int64_t); 183 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, int32_t); 184 /* Expand inline with a host vector type. */ 185 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, int64_t); 186 /* Expand out-of-line helper w/descriptor, data in descriptor. */ 187 gen_helper_gvec_3 *fno; 188 /* The optional opcodes, if any, utilized by .fniv. */ 189 const TCGOpcode *opt_opc; 190 /* The vector element size, if applicable. */ 191 uint8_t vece; 192 /* Prefer i64 to v64. */ 193 bool prefer_i64; 194 /* Load dest as a 3rd source operand. */ 195 bool load_dest; 196 } GVecGen3i; 197 198 typedef struct { 199 /* Expand inline as a 64-bit or 32-bit integer. 200 Only one of these will be non-NULL. */ 201 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64); 202 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32); 203 /* Expand inline with a host vector type. */ 204 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec); 205 /* Expand out-of-line helper w/descriptor. */ 206 gen_helper_gvec_4 *fno; 207 /* The optional opcodes, if any, utilized by .fniv. */ 208 const TCGOpcode *opt_opc; 209 /* The data argument to the out-of-line helper. */ 210 int32_t data; 211 /* The vector element size, if applicable. */ 212 uint8_t vece; 213 /* Prefer i64 to v64. */ 214 bool prefer_i64; 215 /* Write aofs as a 2nd dest operand. */ 216 bool write_aofs; 217 } GVecGen4; 218 219 void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs, 220 uint32_t oprsz, uint32_t maxsz, const GVecGen2 *); 221 void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz, 222 uint32_t maxsz, int64_t c, const GVecGen2i *); 223 void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz, 224 uint32_t maxsz, TCGv_i64 c, const GVecGen2s *); 225 void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs, 226 uint32_t oprsz, uint32_t maxsz, const GVecGen3 *); 227 void tcg_gen_gvec_3i(uint32_t dofs, uint32_t aofs, uint32_t bofs, 228 uint32_t oprsz, uint32_t maxsz, int64_t c, 229 const GVecGen3i *); 230 void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs, 231 uint32_t oprsz, uint32_t maxsz, const GVecGen4 *); 232 233 /* Expand a specific vector operation. */ 234 235 void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs, 236 uint32_t oprsz, uint32_t maxsz); 237 void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs, 238 uint32_t oprsz, uint32_t maxsz); 239 void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs, 240 uint32_t oprsz, uint32_t maxsz); 241 void tcg_gen_gvec_abs(unsigned vece, uint32_t dofs, uint32_t aofs, 242 uint32_t oprsz, uint32_t maxsz); 243 244 void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs, 245 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 246 void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs, 247 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 248 void tcg_gen_gvec_mul(unsigned vece, uint32_t dofs, uint32_t aofs, 249 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 250 251 void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs, 252 int64_t c, uint32_t oprsz, uint32_t maxsz); 253 void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs, 254 int64_t c, uint32_t oprsz, uint32_t maxsz); 255 256 void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs, 257 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); 258 void tcg_gen_gvec_subs(unsigned vece, uint32_t dofs, uint32_t aofs, 259 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); 260 void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs, 261 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); 262 263 /* Saturated arithmetic. */ 264 void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs, 265 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 266 void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs, 267 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 268 void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs, 269 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 270 void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs, 271 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 272 273 /* Min/max. */ 274 void tcg_gen_gvec_smin(unsigned vece, uint32_t dofs, uint32_t aofs, 275 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 276 void tcg_gen_gvec_umin(unsigned vece, uint32_t dofs, uint32_t aofs, 277 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 278 void tcg_gen_gvec_smax(unsigned vece, uint32_t dofs, uint32_t aofs, 279 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 280 void tcg_gen_gvec_umax(unsigned vece, uint32_t dofs, uint32_t aofs, 281 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 282 283 void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs, 284 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 285 void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs, 286 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 287 void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs, 288 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 289 void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs, 290 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 291 void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs, 292 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 293 void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs, 294 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 295 void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs, 296 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 297 void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs, 298 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 299 300 void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs, 301 int64_t c, uint32_t oprsz, uint32_t maxsz); 302 void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs, 303 int64_t c, uint32_t oprsz, uint32_t maxsz); 304 void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs, 305 int64_t c, uint32_t oprsz, uint32_t maxsz); 306 307 void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs, 308 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); 309 void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs, 310 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); 311 void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs, 312 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz); 313 314 void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs, 315 uint32_t s, uint32_t m); 316 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s, 317 uint32_t m, TCGv_i32); 318 void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s, 319 uint32_t m, TCGv_i64); 320 321 void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t s, uint32_t m, uint8_t x); 322 void tcg_gen_gvec_dup16i(uint32_t dofs, uint32_t s, uint32_t m, uint16_t x); 323 void tcg_gen_gvec_dup32i(uint32_t dofs, uint32_t s, uint32_t m, uint32_t x); 324 void tcg_gen_gvec_dup64i(uint32_t dofs, uint32_t s, uint32_t m, uint64_t x); 325 326 void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs, 327 int64_t shift, uint32_t oprsz, uint32_t maxsz); 328 void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs, 329 int64_t shift, uint32_t oprsz, uint32_t maxsz); 330 void tcg_gen_gvec_sari(unsigned vece, uint32_t dofs, uint32_t aofs, 331 int64_t shift, uint32_t oprsz, uint32_t maxsz); 332 333 void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs, 334 TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); 335 void tcg_gen_gvec_shrs(unsigned vece, uint32_t dofs, uint32_t aofs, 336 TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); 337 void tcg_gen_gvec_sars(unsigned vece, uint32_t dofs, uint32_t aofs, 338 TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz); 339 340 /* 341 * Perform vector shift by vector element, modulo the element size. 342 * E.g. D[i] = A[i] << (B[i] % (8 << vece)). 343 */ 344 void tcg_gen_gvec_shlv(unsigned vece, uint32_t dofs, uint32_t aofs, 345 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 346 void tcg_gen_gvec_shrv(unsigned vece, uint32_t dofs, uint32_t aofs, 347 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 348 void tcg_gen_gvec_sarv(unsigned vece, uint32_t dofs, uint32_t aofs, 349 uint32_t bofs, uint32_t oprsz, uint32_t maxsz); 350 351 void tcg_gen_gvec_cmp(TCGCond cond, unsigned vece, uint32_t dofs, 352 uint32_t aofs, uint32_t bofs, 353 uint32_t oprsz, uint32_t maxsz); 354 355 /* 356 * Perform vector bit select: d = (b & a) | (c & ~a). 357 */ 358 void tcg_gen_gvec_bitsel(unsigned vece, uint32_t dofs, uint32_t aofs, 359 uint32_t bofs, uint32_t cofs, 360 uint32_t oprsz, uint32_t maxsz); 361 362 /* 363 * 64-bit vector operations. Use these when the register has been allocated 364 * with tcg_global_mem_new_i64, and so we cannot also address it via pointer. 365 * OPRSZ = MAXSZ = 8. 366 */ 367 368 void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a); 369 void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a); 370 void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a); 371 372 void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); 373 void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); 374 void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); 375 376 void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); 377 void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); 378 void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b); 379 380 void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); 381 void tcg_gen_vec_shl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); 382 void tcg_gen_vec_shr8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); 383 void tcg_gen_vec_shr16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); 384 void tcg_gen_vec_sar8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); 385 void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t); 386 387 #endif 388