1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Target independent generic vector operation expansion
4  *
5  * Copyright (c) 2018 Linaro
6  */
7 
8 #ifndef TCG_TCG_OP_GVEC_COMMON_H
9 #define TCG_TCG_OP_GVEC_COMMON_H
10 
11 /*
12  * "Generic" vectors.  All operands are given as offsets from ENV,
13  * and therefore cannot also be allocated via tcg_global_mem_new_*.
14  * OPRSZ is the byte size of the vector upon which the operation is performed.
15  * MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared.
16  *
17  * All sizes must be 8 or any multiple of 16.
18  * When OPRSZ is 8, the alignment may be 8, otherwise must be 16.
19  * Operands may completely, but not partially, overlap.
20  */
21 
22 /* Expand a call to a gvec-style helper, with pointers to two vector
23    operands, and a descriptor (see tcg-gvec-desc.h).  */
24 typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
25 void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
26                         uint32_t oprsz, uint32_t maxsz, int32_t data,
27                         gen_helper_gvec_2 *fn);
28 
29 /* Similarly, passing an extra data value.  */
30 typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32);
31 void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
32                          uint32_t oprsz, uint32_t maxsz, int32_t data,
33                          gen_helper_gvec_2i *fn);
34 
35 /* Similarly, passing an extra pointer (e.g. env or float_status).  */
36 typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
37 void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
38                         TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
39                         int32_t data, gen_helper_gvec_2_ptr *fn);
40 
41 /* Similarly, with three vector operands.  */
42 typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
43 void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
44                         uint32_t oprsz, uint32_t maxsz, int32_t data,
45                         gen_helper_gvec_3 *fn);
46 
47 /* Similarly, with four vector operands.  */
48 typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr,
49                                TCGv_ptr, TCGv_i32);
50 void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
51                         uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
52                         int32_t data, gen_helper_gvec_4 *fn);
53 
54 /* Similarly, with five vector operands.  */
55 typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
56                                TCGv_ptr, TCGv_i32);
57 void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
58                         uint32_t cofs, uint32_t xofs, uint32_t oprsz,
59                         uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);
60 
61 typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
62                                    TCGv_ptr, TCGv_i32);
63 void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
64                         TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
65                         int32_t data, gen_helper_gvec_3_ptr *fn);
66 
67 typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
68                                    TCGv_ptr, TCGv_ptr, TCGv_i32);
69 void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
70                         uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz,
71                         uint32_t maxsz, int32_t data,
72                         gen_helper_gvec_4_ptr *fn);
73 
74 typedef void gen_helper_gvec_5_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
75                                    TCGv_ptr, TCGv_ptr, TCGv_i32);
76 void tcg_gen_gvec_5_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
77                         uint32_t cofs, uint32_t eofs, TCGv_ptr ptr,
78                         uint32_t oprsz, uint32_t maxsz, int32_t data,
79                         gen_helper_gvec_5_ptr *fn);
80 
81 /* Expand a gvec operation.  Either inline or out-of-line depending on
82    the actual vector size and the operations supported by the host.  */
83 typedef struct {
84     /* Expand inline as a 64-bit or 32-bit integer.
85        Only one of these will be non-NULL.  */
86     void (*fni8)(TCGv_i64, TCGv_i64);
87     void (*fni4)(TCGv_i32, TCGv_i32);
88     /* Expand inline with a host vector type.  */
89     void (*fniv)(unsigned, TCGv_vec, TCGv_vec);
90     /* Expand out-of-line helper w/descriptor.  */
91     gen_helper_gvec_2 *fno;
92     /* The optional opcodes, if any, utilized by .fniv.  */
93     const TCGOpcode *opt_opc;
94     /* The data argument to the out-of-line helper.  */
95     int32_t data;
96     /* The vector element size, if applicable.  */
97     uint8_t vece;
98     /* Prefer i64 to v64.  */
99     bool prefer_i64;
100     /* Load dest as a 2nd source operand.  */
101     bool load_dest;
102 } GVecGen2;
103 
104 typedef struct {
105     /* Expand inline as a 64-bit or 32-bit integer.
106        Only one of these will be non-NULL.  */
107     void (*fni8)(TCGv_i64, TCGv_i64, int64_t);
108     void (*fni4)(TCGv_i32, TCGv_i32, int32_t);
109     /* Expand inline with a host vector type.  */
110     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, int64_t);
111     /* Expand out-of-line helper w/descriptor, data in descriptor.  */
112     gen_helper_gvec_2 *fno;
113     /* Expand out-of-line helper w/descriptor, data as argument.  */
114     gen_helper_gvec_2i *fnoi;
115     /* The optional opcodes, if any, utilized by .fniv.  */
116     const TCGOpcode *opt_opc;
117     /* The vector element size, if applicable.  */
118     uint8_t vece;
119     /* Prefer i64 to v64.  */
120     bool prefer_i64;
121     /* Load dest as a 3rd source operand.  */
122     bool load_dest;
123 } GVecGen2i;
124 
125 typedef struct {
126     /* Expand inline as a 64-bit or 32-bit integer.
127        Only one of these will be non-NULL.  */
128     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
129     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
130     /* Expand inline with a host vector type.  */
131     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
132     /* Expand out-of-line helper w/descriptor.  */
133     gen_helper_gvec_2i *fno;
134     /* The optional opcodes, if any, utilized by .fniv.  */
135     const TCGOpcode *opt_opc;
136     /* The data argument to the out-of-line helper.  */
137     uint32_t data;
138     /* The vector element size, if applicable.  */
139     uint8_t vece;
140     /* Prefer i64 to v64.  */
141     bool prefer_i64;
142     /* Load scalar as 1st source operand.  */
143     bool scalar_first;
144 } GVecGen2s;
145 
146 typedef struct {
147     /* Expand inline as a 64-bit or 32-bit integer.
148        Only one of these will be non-NULL.  */
149     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
150     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
151     /* Expand inline with a host vector type.  */
152     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
153     /* Expand out-of-line helper w/descriptor.  */
154     gen_helper_gvec_3 *fno;
155     /* The optional opcodes, if any, utilized by .fniv.  */
156     const TCGOpcode *opt_opc;
157     /* The data argument to the out-of-line helper.  */
158     int32_t data;
159     /* The vector element size, if applicable.  */
160     uint8_t vece;
161     /* Prefer i64 to v64.  */
162     bool prefer_i64;
163     /* Load dest as a 3rd source operand.  */
164     bool load_dest;
165 } GVecGen3;
166 
167 typedef struct {
168     /*
169      * Expand inline as a 64-bit or 32-bit integer. Only one of these will be
170      * non-NULL.
171      */
172     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, int64_t);
173     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, int32_t);
174     /* Expand inline with a host vector type.  */
175     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, int64_t);
176     /* Expand out-of-line helper w/descriptor, data in descriptor.  */
177     gen_helper_gvec_3 *fno;
178     /* The optional opcodes, if any, utilized by .fniv.  */
179     const TCGOpcode *opt_opc;
180     /* The vector element size, if applicable.  */
181     uint8_t vece;
182     /* Prefer i64 to v64.  */
183     bool prefer_i64;
184     /* Load dest as a 3rd source operand.  */
185     bool load_dest;
186     /* Write aofs as a 2nd dest operand.  */
187     bool write_aofs;
188 } GVecGen3i;
189 
190 typedef struct {
191     /* Expand inline as a 64-bit or 32-bit integer.
192        Only one of these will be non-NULL.  */
193     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64);
194     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
195     /* Expand inline with a host vector type.  */
196     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec);
197     /* Expand out-of-line helper w/descriptor.  */
198     gen_helper_gvec_4 *fno;
199     /* The optional opcodes, if any, utilized by .fniv.  */
200     const TCGOpcode *opt_opc;
201     /* The data argument to the out-of-line helper.  */
202     int32_t data;
203     /* The vector element size, if applicable.  */
204     uint8_t vece;
205     /* Prefer i64 to v64.  */
206     bool prefer_i64;
207     /* Write aofs as a 2nd dest operand.  */
208     bool write_aofs;
209 } GVecGen4;
210 
211 typedef struct {
212     /*
213      * Expand inline as a 64-bit or 32-bit integer. Only one of these will be
214      * non-NULL.
215      */
216     void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64, int64_t);
217     void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32, int32_t);
218     /* Expand inline with a host vector type.  */
219     void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec, int64_t);
220     /* Expand out-of-line helper w/descriptor, data in descriptor.  */
221     gen_helper_gvec_4 *fno;
222     /* The optional opcodes, if any, utilized by .fniv.  */
223     const TCGOpcode *opt_opc;
224     /* The vector element size, if applicable.  */
225     uint8_t vece;
226     /* Prefer i64 to v64.  */
227     bool prefer_i64;
228 } GVecGen4i;
229 
230 void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
231                     uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
232 void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
233                      uint32_t maxsz, int64_t c, const GVecGen2i *);
234 void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
235                      uint32_t maxsz, TCGv_i64 c, const GVecGen2s *);
236 void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
237                     uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
238 void tcg_gen_gvec_3i(uint32_t dofs, uint32_t aofs, uint32_t bofs,
239                      uint32_t oprsz, uint32_t maxsz, int64_t c,
240                      const GVecGen3i *);
241 void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
242                     uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);
243 void tcg_gen_gvec_4i(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
244                      uint32_t oprsz, uint32_t maxsz, int64_t c,
245                      const GVecGen4i *);
246 
247 /* Expand a specific vector operation.  */
248 
249 void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
250                       uint32_t oprsz, uint32_t maxsz);
251 void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
252                       uint32_t oprsz, uint32_t maxsz);
253 void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
254                       uint32_t oprsz, uint32_t maxsz);
255 void tcg_gen_gvec_abs(unsigned vece, uint32_t dofs, uint32_t aofs,
256                       uint32_t oprsz, uint32_t maxsz);
257 
258 void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
259                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
260 void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
261                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
262 void tcg_gen_gvec_mul(unsigned vece, uint32_t dofs, uint32_t aofs,
263                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
264 
265 void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs,
266                        int64_t c, uint32_t oprsz, uint32_t maxsz);
267 void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs,
268                        int64_t c, uint32_t oprsz, uint32_t maxsz);
269 
270 void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs,
271                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
272 void tcg_gen_gvec_subs(unsigned vece, uint32_t dofs, uint32_t aofs,
273                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
274 void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs,
275                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
276 
277 /* Saturated arithmetic.  */
278 void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs,
279                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
280 void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs,
281                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
282 void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
283                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
284 void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
285                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
286 
287 /* Min/max.  */
288 void tcg_gen_gvec_smin(unsigned vece, uint32_t dofs, uint32_t aofs,
289                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
290 void tcg_gen_gvec_umin(unsigned vece, uint32_t dofs, uint32_t aofs,
291                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
292 void tcg_gen_gvec_smax(unsigned vece, uint32_t dofs, uint32_t aofs,
293                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
294 void tcg_gen_gvec_umax(unsigned vece, uint32_t dofs, uint32_t aofs,
295                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
296 
297 void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
298                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
299 void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
300                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
301 void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
302                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
303 void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
304                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
305 void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
306                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
307 void tcg_gen_gvec_nand(unsigned vece, uint32_t dofs, uint32_t aofs,
308                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
309 void tcg_gen_gvec_nor(unsigned vece, uint32_t dofs, uint32_t aofs,
310                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
311 void tcg_gen_gvec_eqv(unsigned vece, uint32_t dofs, uint32_t aofs,
312                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
313 
314 void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
315                        int64_t c, uint32_t oprsz, uint32_t maxsz);
316 void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs,
317                        int64_t c, uint32_t oprsz, uint32_t maxsz);
318 void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs,
319                       int64_t c, uint32_t oprsz, uint32_t maxsz);
320 
321 void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs,
322                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
323 void tcg_gen_gvec_andcs(unsigned vece, uint32_t dofs, uint32_t aofs,
324                         TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
325 void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs,
326                        TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
327 void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
328                       TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
329 
330 void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
331                           uint32_t s, uint32_t m);
332 void tcg_gen_gvec_dup_imm(unsigned vece, uint32_t dofs, uint32_t s,
333                           uint32_t m, uint64_t imm);
334 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
335                           uint32_t m, TCGv_i32);
336 void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
337                           uint32_t m, TCGv_i64);
338 
339 void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs,
340                        int64_t shift, uint32_t oprsz, uint32_t maxsz);
341 void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs,
342                        int64_t shift, uint32_t oprsz, uint32_t maxsz);
343 void tcg_gen_gvec_sari(unsigned vece, uint32_t dofs, uint32_t aofs,
344                        int64_t shift, uint32_t oprsz, uint32_t maxsz);
345 void tcg_gen_gvec_rotli(unsigned vece, uint32_t dofs, uint32_t aofs,
346                         int64_t shift, uint32_t oprsz, uint32_t maxsz);
347 void tcg_gen_gvec_rotri(unsigned vece, uint32_t dofs, uint32_t aofs,
348                         int64_t shift, uint32_t oprsz, uint32_t maxsz);
349 
350 void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs,
351                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
352 void tcg_gen_gvec_shrs(unsigned vece, uint32_t dofs, uint32_t aofs,
353                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
354 void tcg_gen_gvec_sars(unsigned vece, uint32_t dofs, uint32_t aofs,
355                        TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
356 void tcg_gen_gvec_rotls(unsigned vece, uint32_t dofs, uint32_t aofs,
357                         TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
358 void tcg_gen_gvec_rotrs(unsigned vece, uint32_t dofs, uint32_t aofs,
359                         TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz);
360 
361 /*
362  * Perform vector shift by vector element, modulo the element size.
363  * E.g.  D[i] = A[i] << (B[i] % (8 << vece)).
364  */
365 void tcg_gen_gvec_shlv(unsigned vece, uint32_t dofs, uint32_t aofs,
366                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
367 void tcg_gen_gvec_shrv(unsigned vece, uint32_t dofs, uint32_t aofs,
368                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
369 void tcg_gen_gvec_sarv(unsigned vece, uint32_t dofs, uint32_t aofs,
370                        uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
371 void tcg_gen_gvec_rotlv(unsigned vece, uint32_t dofs, uint32_t aofs,
372                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
373 void tcg_gen_gvec_rotrv(unsigned vece, uint32_t dofs, uint32_t aofs,
374                         uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
375 
376 void tcg_gen_gvec_cmp(TCGCond cond, unsigned vece, uint32_t dofs,
377                       uint32_t aofs, uint32_t bofs,
378                       uint32_t oprsz, uint32_t maxsz);
379 void tcg_gen_gvec_cmpi(TCGCond cond, unsigned vece, uint32_t dofs,
380                        uint32_t aofs, int64_t c,
381                        uint32_t oprsz, uint32_t maxsz);
382 void tcg_gen_gvec_cmps(TCGCond cond, unsigned vece, uint32_t dofs,
383                        uint32_t aofs, TCGv_i64 c,
384                        uint32_t oprsz, uint32_t maxsz);
385 
386 /*
387  * Perform vector bit select: d = (b & a) | (c & ~a).
388  */
389 void tcg_gen_gvec_bitsel(unsigned vece, uint32_t dofs, uint32_t aofs,
390                          uint32_t bofs, uint32_t cofs,
391                          uint32_t oprsz, uint32_t maxsz);
392 
393 /*
394  * 64-bit vector operations.  Use these when the register has been allocated
395  * with tcg_global_mem_new_i64, and so we cannot also address it via pointer.
396  * OPRSZ = MAXSZ = 8.
397  */
398 
399 void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a);
400 void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a);
401 void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a);
402 
403 void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
404 void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
405 void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
406 
407 void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
408 void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
409 void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
410 
411 void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
412 void tcg_gen_vec_shl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
413 void tcg_gen_vec_shr8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
414 void tcg_gen_vec_shr16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
415 void tcg_gen_vec_sar8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
416 void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
417 void tcg_gen_vec_rotl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c);
418 void tcg_gen_vec_rotl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t c);
419 
420 /* 32-bit vector operations. */
421 void tcg_gen_vec_add8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
422 void tcg_gen_vec_add16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
423 
424 void tcg_gen_vec_sub8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
425 void tcg_gen_vec_sub16_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b);
426 
427 void tcg_gen_vec_shl8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
428 void tcg_gen_vec_shl16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
429 void tcg_gen_vec_shr8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
430 void tcg_gen_vec_shr16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
431 void tcg_gen_vec_sar8i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
432 void tcg_gen_vec_sar16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t);
433 
434 #endif
435