1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Target independent opcode generation functions. 4 * 5 * Copyright (c) 2008 Fabrice Bellard 6 */ 7 8 #ifndef TCG_TCG_OP_COMMON_H 9 #define TCG_TCG_OP_COMMON_H 10 11 #include "tcg/tcg.h" 12 #include "exec/helper-proto-common.h" 13 #include "exec/helper-gen-common.h" 14 15 /* Basic output routines. Not for general consumption. */ 16 17 void tcg_gen_op1(TCGOpcode, TCGArg); 18 void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg); 19 void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg); 20 void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg); 21 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg); 22 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg); 23 24 void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg); 25 void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg); 26 void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg); 27 28 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) 29 { 30 tcg_gen_op1(opc, tcgv_i32_arg(a1)); 31 } 32 33 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) 34 { 35 tcg_gen_op1(opc, tcgv_i64_arg(a1)); 36 } 37 38 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) 39 { 40 tcg_gen_op1(opc, a1); 41 } 42 43 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2) 44 { 45 tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2)); 46 } 47 48 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2) 49 { 50 tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2)); 51 } 52 53 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) 54 { 55 tcg_gen_op2(opc, tcgv_i32_arg(a1), a2); 56 } 57 58 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2) 59 { 60 tcg_gen_op2(opc, tcgv_i64_arg(a1), a2); 61 } 62 63 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) 64 { 65 tcg_gen_op2(opc, a1, a2); 66 } 67 68 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, 69 TCGv_i32 a2, TCGv_i32 a3) 70 { 71 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3)); 72 } 73 74 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, 75 TCGv_i64 a2, TCGv_i64 a3) 76 { 77 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3)); 78 } 79 80 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, 81 TCGv_i32 a2, TCGArg a3) 82 { 83 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3); 84 } 85 86 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, 87 TCGv_i64 a2, TCGArg a3) 88 { 89 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3); 90 } 91 92 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, 93 TCGv_ptr base, TCGArg offset) 94 { 95 tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset); 96 } 97 98 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val, 99 TCGv_ptr base, TCGArg offset) 100 { 101 tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset); 102 } 103 104 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 105 TCGv_i32 a3, TCGv_i32 a4) 106 { 107 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 108 tcgv_i32_arg(a3), tcgv_i32_arg(a4)); 109 } 110 111 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 112 TCGv_i64 a3, TCGv_i64 a4) 113 { 114 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 115 tcgv_i64_arg(a3), tcgv_i64_arg(a4)); 116 } 117 118 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 119 TCGv_i32 a3, TCGArg a4) 120 { 121 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 122 tcgv_i32_arg(a3), a4); 123 } 124 125 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 126 TCGv_i64 a3, TCGArg a4) 127 { 128 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 129 tcgv_i64_arg(a3), a4); 130 } 131 132 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 133 TCGArg a3, TCGArg a4) 134 { 135 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4); 136 } 137 138 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 139 TCGArg a3, TCGArg a4) 140 { 141 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4); 142 } 143 144 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 145 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5) 146 { 147 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 148 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5)); 149 } 150 151 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 152 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5) 153 { 154 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 155 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5)); 156 } 157 158 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 159 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5) 160 { 161 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 162 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5); 163 } 164 165 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 166 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5) 167 { 168 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 169 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5); 170 } 171 172 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 173 TCGv_i32 a3, TCGArg a4, TCGArg a5) 174 { 175 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 176 tcgv_i32_arg(a3), a4, a5); 177 } 178 179 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 180 TCGv_i64 a3, TCGArg a4, TCGArg a5) 181 { 182 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 183 tcgv_i64_arg(a3), a4, a5); 184 } 185 186 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 187 TCGv_i32 a3, TCGv_i32 a4, 188 TCGv_i32 a5, TCGv_i32 a6) 189 { 190 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 191 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), 192 tcgv_i32_arg(a6)); 193 } 194 195 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 196 TCGv_i64 a3, TCGv_i64 a4, 197 TCGv_i64 a5, TCGv_i64 a6) 198 { 199 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 200 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), 201 tcgv_i64_arg(a6)); 202 } 203 204 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 205 TCGv_i32 a3, TCGv_i32 a4, 206 TCGv_i32 a5, TCGArg a6) 207 { 208 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 209 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6); 210 } 211 212 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 213 TCGv_i64 a3, TCGv_i64 a4, 214 TCGv_i64 a5, TCGArg a6) 215 { 216 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 217 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6); 218 } 219 220 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, 221 TCGv_i32 a3, TCGv_i32 a4, 222 TCGArg a5, TCGArg a6) 223 { 224 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), 225 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6); 226 } 227 228 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, 229 TCGv_i64 a3, TCGv_i64 a4, 230 TCGArg a5, TCGArg a6) 231 { 232 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), 233 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6); 234 } 235 236 237 /* Generic ops. */ 238 239 static inline void gen_set_label(TCGLabel *l) 240 { 241 l->present = 1; 242 tcg_gen_op1(INDEX_op_set_label, label_arg(l)); 243 } 244 245 void tcg_gen_br(TCGLabel *l); 246 void tcg_gen_mb(TCGBar); 247 248 /** 249 * tcg_gen_exit_tb() - output exit_tb TCG operation 250 * @tb: The TranslationBlock from which we are exiting 251 * @idx: Direct jump slot index, or exit request 252 * 253 * See tcg/README for more info about this TCG operation. 254 * See also tcg.h and the block comment above TB_EXIT_MASK. 255 * 256 * For a normal exit from the TB, back to the main loop, @tb should 257 * be NULL and @idx should be 0. Otherwise, @tb should be valid and 258 * @idx should be one of the TB_EXIT_ values. 259 */ 260 void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx); 261 262 /** 263 * tcg_gen_goto_tb() - output goto_tb TCG operation 264 * @idx: Direct jump slot index (0 or 1) 265 * 266 * See tcg/README for more info about this TCG operation. 267 * 268 * NOTE: In system emulation, direct jumps with goto_tb are only safe within 269 * the pages this TB resides in because we don't take care of direct jumps when 270 * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a 271 * static address translation, so the destination address is always valid, TBs 272 * are always invalidated properly, and direct jumps are reset when mapping 273 * changes. 274 */ 275 void tcg_gen_goto_tb(unsigned idx); 276 277 /** 278 * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid 279 * @addr: Guest address of the target TB 280 * 281 * If the TB is not valid, jump to the epilogue. 282 * 283 * This operation is optional. If the TCG backend does not implement goto_ptr, 284 * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument. 285 */ 286 void tcg_gen_lookup_and_goto_ptr(void); 287 288 static inline void tcg_gen_plugin_cb_start(unsigned from, unsigned type, 289 unsigned wr) 290 { 291 tcg_gen_op3(INDEX_op_plugin_cb_start, from, type, wr); 292 } 293 294 static inline void tcg_gen_plugin_cb_end(void) 295 { 296 tcg_emit_op(INDEX_op_plugin_cb_end, 0); 297 } 298 299 /* 32 bit ops */ 300 301 void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg); 302 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 303 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2); 304 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 305 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 306 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 307 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 308 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 309 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 310 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 311 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 312 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 313 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 314 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 315 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 316 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 317 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 318 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 319 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 320 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 321 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 322 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 323 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2); 324 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2); 325 void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg); 326 void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2); 327 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 328 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 329 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); 330 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2); 331 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, 332 unsigned int ofs, unsigned int len); 333 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg, 334 unsigned int ofs, unsigned int len); 335 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg, 336 unsigned int ofs, unsigned int len); 337 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg, 338 unsigned int ofs, unsigned int len); 339 void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah, 340 unsigned int ofs); 341 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *); 342 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *); 343 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret, 344 TCGv_i32 arg1, TCGv_i32 arg2); 345 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret, 346 TCGv_i32 arg1, int32_t arg2); 347 void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret, 348 TCGv_i32 arg1, TCGv_i32 arg2); 349 void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret, 350 TCGv_i32 arg1, int32_t arg2); 351 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1, 352 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2); 353 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, 354 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh); 355 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, 356 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh); 357 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2); 358 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2); 359 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2); 360 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg); 361 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg); 362 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg); 363 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg); 364 void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc); 365 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags); 366 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg); 367 void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg); 368 void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); 369 void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); 370 void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); 371 void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); 372 void tcg_gen_abs_i32(TCGv_i32, TCGv_i32); 373 374 /* Replicate a value of size @vece from @in to all the lanes in @out */ 375 void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in); 376 377 static inline void tcg_gen_discard_i32(TCGv_i32 arg) 378 { 379 tcg_gen_op1_i32(INDEX_op_discard, arg); 380 } 381 382 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg) 383 { 384 if (ret != arg) { 385 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg); 386 } 387 } 388 389 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, 390 tcg_target_long offset) 391 { 392 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset); 393 } 394 395 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, 396 tcg_target_long offset) 397 { 398 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset); 399 } 400 401 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, 402 tcg_target_long offset) 403 { 404 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset); 405 } 406 407 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, 408 tcg_target_long offset) 409 { 410 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset); 411 } 412 413 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, 414 tcg_target_long offset) 415 { 416 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset); 417 } 418 419 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, 420 tcg_target_long offset) 421 { 422 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset); 423 } 424 425 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, 426 tcg_target_long offset) 427 { 428 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset); 429 } 430 431 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, 432 tcg_target_long offset) 433 { 434 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset); 435 } 436 437 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 438 { 439 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2); 440 } 441 442 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 443 { 444 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2); 445 } 446 447 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 448 { 449 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2); 450 } 451 452 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 453 { 454 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2); 455 } 456 457 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 458 { 459 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2); 460 } 461 462 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 463 { 464 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2); 465 } 466 467 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 468 { 469 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2); 470 } 471 472 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 473 { 474 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2); 475 } 476 477 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) 478 { 479 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2); 480 } 481 482 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg) 483 { 484 if (TCG_TARGET_HAS_neg_i32) { 485 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg); 486 } else { 487 tcg_gen_subfi_i32(ret, 0, arg); 488 } 489 } 490 491 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg) 492 { 493 if (TCG_TARGET_HAS_not_i32) { 494 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg); 495 } else { 496 tcg_gen_xori_i32(ret, arg, -1); 497 } 498 } 499 500 /* 64 bit ops */ 501 502 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg); 503 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 504 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2); 505 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 506 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 507 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 508 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 509 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 510 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 511 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 512 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 513 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 514 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 515 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 516 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 517 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 518 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 519 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 520 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 521 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 522 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 523 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 524 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2); 525 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2); 526 void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg); 527 void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2); 528 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 529 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 530 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 531 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2); 532 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, 533 unsigned int ofs, unsigned int len); 534 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg, 535 unsigned int ofs, unsigned int len); 536 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg, 537 unsigned int ofs, unsigned int len); 538 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg, 539 unsigned int ofs, unsigned int len); 540 void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah, 541 unsigned int ofs); 542 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *); 543 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *); 544 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret, 545 TCGv_i64 arg1, TCGv_i64 arg2); 546 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret, 547 TCGv_i64 arg1, int64_t arg2); 548 void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret, 549 TCGv_i64 arg1, TCGv_i64 arg2); 550 void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret, 551 TCGv_i64 arg1, int64_t arg2); 552 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, 553 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2); 554 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al, 555 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh); 556 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al, 557 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh); 558 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2); 559 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2); 560 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2); 561 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg); 562 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg); 563 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg); 564 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg); 565 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg); 566 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg); 567 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg); 568 void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc); 569 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); 570 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); 571 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg); 572 void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg); 573 void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg); 574 void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); 575 void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); 576 void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); 577 void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); 578 void tcg_gen_abs_i64(TCGv_i64, TCGv_i64); 579 580 /* Replicate a value of size @vece from @in to all the lanes in @out */ 581 void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in); 582 583 #if TCG_TARGET_REG_BITS == 64 584 static inline void tcg_gen_discard_i64(TCGv_i64 arg) 585 { 586 tcg_gen_op1_i64(INDEX_op_discard, arg); 587 } 588 589 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg) 590 { 591 if (ret != arg) { 592 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg); 593 } 594 } 595 596 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, 597 tcg_target_long offset) 598 { 599 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset); 600 } 601 602 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, 603 tcg_target_long offset) 604 { 605 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset); 606 } 607 608 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, 609 tcg_target_long offset) 610 { 611 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset); 612 } 613 614 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, 615 tcg_target_long offset) 616 { 617 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset); 618 } 619 620 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, 621 tcg_target_long offset) 622 { 623 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset); 624 } 625 626 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, 627 tcg_target_long offset) 628 { 629 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset); 630 } 631 632 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, 633 tcg_target_long offset) 634 { 635 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset); 636 } 637 638 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, 639 tcg_target_long offset) 640 { 641 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset); 642 } 643 644 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, 645 tcg_target_long offset) 646 { 647 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset); 648 } 649 650 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, 651 tcg_target_long offset) 652 { 653 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset); 654 } 655 656 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, 657 tcg_target_long offset) 658 { 659 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset); 660 } 661 662 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 663 { 664 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2); 665 } 666 667 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 668 { 669 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2); 670 } 671 672 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 673 { 674 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2); 675 } 676 677 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 678 { 679 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2); 680 } 681 682 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 683 { 684 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2); 685 } 686 687 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 688 { 689 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2); 690 } 691 692 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 693 { 694 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2); 695 } 696 697 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 698 { 699 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2); 700 } 701 702 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) 703 { 704 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2); 705 } 706 #else /* TCG_TARGET_REG_BITS == 32 */ 707 void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset); 708 void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset); 709 void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset); 710 711 void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 712 void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 713 714 void tcg_gen_discard_i64(TCGv_i64 arg); 715 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg); 716 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 717 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 718 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 719 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 720 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 721 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 722 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset); 723 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset); 724 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 725 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 726 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 727 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 728 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 729 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 730 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); 731 #endif /* TCG_TARGET_REG_BITS */ 732 733 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg) 734 { 735 if (TCG_TARGET_HAS_neg_i64) { 736 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg); 737 } else { 738 tcg_gen_subfi_i64(ret, 0, arg); 739 } 740 } 741 742 /* Size changing operations. */ 743 744 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg); 745 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg); 746 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high); 747 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg); 748 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg); 749 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg); 750 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg); 751 752 void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src); 753 void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg); 754 void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi); 755 756 void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset); 757 void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset); 758 759 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi) 760 { 761 tcg_gen_deposit_i64(ret, lo, hi, 32, 32); 762 } 763 764 /* Local load/store bit ops */ 765 766 void tcg_gen_qemu_ld_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType); 767 void tcg_gen_qemu_st_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType); 768 void tcg_gen_qemu_ld_i64_chk(TCGv_i64, TCGTemp *, TCGArg, MemOp, TCGType); 769 void tcg_gen_qemu_st_i64_chk(TCGv_i64, TCGTemp *, TCGArg, MemOp, TCGType); 770 void tcg_gen_qemu_ld_i128_chk(TCGv_i128, TCGTemp *, TCGArg, MemOp, TCGType); 771 void tcg_gen_qemu_st_i128_chk(TCGv_i128, TCGTemp *, TCGArg, MemOp, TCGType); 772 773 /* Atomic ops */ 774 775 void tcg_gen_atomic_cmpxchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, TCGv_i32, 776 TCGArg, MemOp, TCGType); 777 void tcg_gen_atomic_cmpxchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, TCGv_i64, 778 TCGArg, MemOp, TCGType); 779 void tcg_gen_atomic_cmpxchg_i128_chk(TCGv_i128, TCGTemp *, TCGv_i128, 780 TCGv_i128, TCGArg, MemOp, TCGType); 781 782 void tcg_gen_nonatomic_cmpxchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, TCGv_i32, 783 TCGArg, MemOp, TCGType); 784 void tcg_gen_nonatomic_cmpxchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, TCGv_i64, 785 TCGArg, MemOp, TCGType); 786 void tcg_gen_nonatomic_cmpxchg_i128_chk(TCGv_i128, TCGTemp *, TCGv_i128, 787 TCGv_i128, TCGArg, MemOp, TCGType); 788 789 void tcg_gen_atomic_xchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 790 TCGArg, MemOp, TCGType); 791 void tcg_gen_atomic_xchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 792 TCGArg, MemOp, TCGType); 793 794 void tcg_gen_atomic_fetch_add_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 795 TCGArg, MemOp, TCGType); 796 void tcg_gen_atomic_fetch_add_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 797 TCGArg, MemOp, TCGType); 798 void tcg_gen_atomic_fetch_and_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 799 TCGArg, MemOp, TCGType); 800 void tcg_gen_atomic_fetch_and_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 801 TCGArg, MemOp, TCGType); 802 void tcg_gen_atomic_fetch_or_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 803 TCGArg, MemOp, TCGType); 804 void tcg_gen_atomic_fetch_or_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 805 TCGArg, MemOp, TCGType); 806 void tcg_gen_atomic_fetch_xor_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 807 TCGArg, MemOp, TCGType); 808 void tcg_gen_atomic_fetch_xor_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 809 TCGArg, MemOp, TCGType); 810 void tcg_gen_atomic_fetch_smin_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 811 TCGArg, MemOp, TCGType); 812 void tcg_gen_atomic_fetch_smin_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 813 TCGArg, MemOp, TCGType); 814 void tcg_gen_atomic_fetch_umin_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 815 TCGArg, MemOp, TCGType); 816 void tcg_gen_atomic_fetch_umin_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 817 TCGArg, MemOp, TCGType); 818 void tcg_gen_atomic_fetch_smax_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 819 TCGArg, MemOp, TCGType); 820 void tcg_gen_atomic_fetch_smax_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 821 TCGArg, MemOp, TCGType); 822 void tcg_gen_atomic_fetch_umax_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 823 TCGArg, MemOp, TCGType); 824 void tcg_gen_atomic_fetch_umax_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 825 TCGArg, MemOp, TCGType); 826 827 void tcg_gen_atomic_add_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 828 TCGArg, MemOp, TCGType); 829 void tcg_gen_atomic_add_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 830 TCGArg, MemOp, TCGType); 831 void tcg_gen_atomic_and_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 832 TCGArg, MemOp, TCGType); 833 void tcg_gen_atomic_and_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 834 TCGArg, MemOp, TCGType); 835 void tcg_gen_atomic_or_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 836 TCGArg, MemOp, TCGType); 837 void tcg_gen_atomic_or_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 838 TCGArg, MemOp, TCGType); 839 void tcg_gen_atomic_xor_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 840 TCGArg, MemOp, TCGType); 841 void tcg_gen_atomic_xor_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 842 TCGArg, MemOp, TCGType); 843 void tcg_gen_atomic_smin_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 844 TCGArg, MemOp, TCGType); 845 void tcg_gen_atomic_smin_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 846 TCGArg, MemOp, TCGType); 847 void tcg_gen_atomic_umin_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 848 TCGArg, MemOp, TCGType); 849 void tcg_gen_atomic_umin_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 850 TCGArg, MemOp, TCGType); 851 void tcg_gen_atomic_smax_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 852 TCGArg, MemOp, TCGType); 853 void tcg_gen_atomic_smax_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 854 TCGArg, MemOp, TCGType); 855 void tcg_gen_atomic_umax_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, 856 TCGArg, MemOp, TCGType); 857 void tcg_gen_atomic_umax_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, 858 TCGArg, MemOp, TCGType); 859 860 /* Vector ops */ 861 862 void tcg_gen_mov_vec(TCGv_vec, TCGv_vec); 863 void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32); 864 void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64); 865 void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long); 866 void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t); 867 void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 868 void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 869 void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 870 void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 871 void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 872 void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 873 void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 874 void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 875 void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 876 void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 877 void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 878 void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a); 879 void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a); 880 void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a); 881 void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 882 void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 883 void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 884 void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 885 void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 886 void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 887 void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 888 void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 889 890 void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i); 891 void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i); 892 void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i); 893 void tcg_gen_rotli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i); 894 void tcg_gen_rotri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i); 895 896 void tcg_gen_shls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); 897 void tcg_gen_shrs_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); 898 void tcg_gen_sars_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); 899 void tcg_gen_rotls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s); 900 901 void tcg_gen_shlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); 902 void tcg_gen_shrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); 903 void tcg_gen_sarv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); 904 void tcg_gen_rotlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); 905 void tcg_gen_rotrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s); 906 907 void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r, 908 TCGv_vec a, TCGv_vec b); 909 910 void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a, 911 TCGv_vec b, TCGv_vec c); 912 void tcg_gen_cmpsel_vec(TCGCond cond, unsigned vece, TCGv_vec r, 913 TCGv_vec a, TCGv_vec b, TCGv_vec c, TCGv_vec d); 914 915 void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset); 916 void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset); 917 void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t); 918 919 /* Host pointer ops */ 920 921 #if UINTPTR_MAX == UINT32_MAX 922 # define PTR i32 923 # define NAT TCGv_i32 924 #else 925 # define PTR i64 926 # define NAT TCGv_i64 927 #endif 928 929 static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o) 930 { 931 glue(tcg_gen_ld_,PTR)((NAT)r, a, o); 932 } 933 934 static inline void tcg_gen_st_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o) 935 { 936 glue(tcg_gen_st_, PTR)((NAT)r, a, o); 937 } 938 939 static inline void tcg_gen_discard_ptr(TCGv_ptr a) 940 { 941 glue(tcg_gen_discard_,PTR)((NAT)a); 942 } 943 944 static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b) 945 { 946 glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b); 947 } 948 949 static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b) 950 { 951 glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b); 952 } 953 954 static inline void tcg_gen_mov_ptr(TCGv_ptr d, TCGv_ptr s) 955 { 956 glue(tcg_gen_mov_,PTR)((NAT)d, (NAT)s); 957 } 958 959 static inline void tcg_gen_movi_ptr(TCGv_ptr d, intptr_t s) 960 { 961 glue(tcg_gen_movi_,PTR)((NAT)d, s); 962 } 963 964 static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a, 965 intptr_t b, TCGLabel *label) 966 { 967 glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label); 968 } 969 970 static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a) 971 { 972 #if UINTPTR_MAX == UINT32_MAX 973 tcg_gen_mov_i32((NAT)r, a); 974 #else 975 tcg_gen_ext_i32_i64((NAT)r, a); 976 #endif 977 } 978 979 static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a) 980 { 981 #if UINTPTR_MAX == UINT32_MAX 982 tcg_gen_extrl_i64_i32((NAT)r, a); 983 #else 984 tcg_gen_mov_i64((NAT)r, a); 985 #endif 986 } 987 988 static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a) 989 { 990 #if UINTPTR_MAX == UINT32_MAX 991 tcg_gen_extu_i32_i64(r, (NAT)a); 992 #else 993 tcg_gen_mov_i64(r, (NAT)a); 994 #endif 995 } 996 997 static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a) 998 { 999 #if UINTPTR_MAX == UINT32_MAX 1000 tcg_gen_mov_i32(r, (NAT)a); 1001 #else 1002 tcg_gen_extrl_i64_i32(r, (NAT)a); 1003 #endif 1004 } 1005 1006 #undef PTR 1007 #undef NAT 1008 1009 #endif /* TCG_TCG_OP_COMMON_H */ 1010