1 /* SPDX-License-Identifier: MIT */ 2 /****************************************************************************** 3 * xen.h 4 * 5 * Guest OS interface to Xen. 6 * 7 * Copyright (c) 2004, K A Fraser 8 */ 9 10 #ifndef __XEN_PUBLIC_XEN_H__ 11 #define __XEN_PUBLIC_XEN_H__ 12 13 #include "xen-compat.h" 14 15 #if defined(__i386__) || defined(__x86_64__) 16 #include "arch-x86/xen.h" 17 #elif defined(__arm__) || defined (__aarch64__) 18 #include "arch-arm.h" 19 #else 20 #error "Unsupported architecture" 21 #endif 22 23 #ifndef __ASSEMBLY__ 24 /* Guest handles for primitive C types. */ 25 DEFINE_XEN_GUEST_HANDLE(char); 26 __DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char); 27 DEFINE_XEN_GUEST_HANDLE(int); 28 __DEFINE_XEN_GUEST_HANDLE(uint, unsigned int); 29 #if __XEN_INTERFACE_VERSION__ < 0x00040300 30 DEFINE_XEN_GUEST_HANDLE(long); 31 __DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long); 32 #endif 33 DEFINE_XEN_GUEST_HANDLE(void); 34 35 DEFINE_XEN_GUEST_HANDLE(uint64_t); 36 DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); 37 DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); 38 39 /* Define a variable length array (depends on compiler). */ 40 #if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L 41 #define XEN_FLEX_ARRAY_DIM 42 #elif defined(__GNUC__) 43 #define XEN_FLEX_ARRAY_DIM 0 44 #else 45 #define XEN_FLEX_ARRAY_DIM 1 /* variable size */ 46 #endif 47 48 /* Turn a plain number into a C unsigned (long (long)) constant. */ 49 #define __xen_mk_uint(x) x ## U 50 #define __xen_mk_ulong(x) x ## UL 51 #ifndef __xen_mk_ullong 52 # define __xen_mk_ullong(x) x ## ULL 53 #endif 54 #define xen_mk_uint(x) __xen_mk_uint(x) 55 #define xen_mk_ulong(x) __xen_mk_ulong(x) 56 #define xen_mk_ullong(x) __xen_mk_ullong(x) 57 58 #else 59 60 /* In assembly code we cannot use C numeric constant suffixes. */ 61 #define xen_mk_uint(x) x 62 #define xen_mk_ulong(x) x 63 #define xen_mk_ullong(x) x 64 65 #endif 66 67 /* 68 * HYPERCALLS 69 */ 70 71 /* `incontents 100 hcalls List of hypercalls 72 * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*() 73 */ 74 75 #define __HYPERVISOR_set_trap_table 0 76 #define __HYPERVISOR_mmu_update 1 77 #define __HYPERVISOR_set_gdt 2 78 #define __HYPERVISOR_stack_switch 3 79 #define __HYPERVISOR_set_callbacks 4 80 #define __HYPERVISOR_fpu_taskswitch 5 81 #define __HYPERVISOR_sched_op_compat 6 /* compat since 0x00030101 */ 82 #define __HYPERVISOR_platform_op 7 83 #define __HYPERVISOR_set_debugreg 8 84 #define __HYPERVISOR_get_debugreg 9 85 #define __HYPERVISOR_update_descriptor 10 86 #define __HYPERVISOR_memory_op 12 87 #define __HYPERVISOR_multicall 13 88 #define __HYPERVISOR_update_va_mapping 14 89 #define __HYPERVISOR_set_timer_op 15 90 #define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */ 91 #define __HYPERVISOR_xen_version 17 92 #define __HYPERVISOR_console_io 18 93 #define __HYPERVISOR_physdev_op_compat 19 /* compat since 0x00030202 */ 94 #define __HYPERVISOR_grant_table_op 20 95 #define __HYPERVISOR_vm_assist 21 96 #define __HYPERVISOR_update_va_mapping_otherdomain 22 97 #define __HYPERVISOR_iret 23 /* x86 only */ 98 #define __HYPERVISOR_vcpu_op 24 99 #define __HYPERVISOR_set_segment_base 25 /* x86/64 only */ 100 #define __HYPERVISOR_mmuext_op 26 101 #define __HYPERVISOR_xsm_op 27 102 #define __HYPERVISOR_nmi_op 28 103 #define __HYPERVISOR_sched_op 29 104 #define __HYPERVISOR_callback_op 30 105 #define __HYPERVISOR_xenoprof_op 31 106 #define __HYPERVISOR_event_channel_op 32 107 #define __HYPERVISOR_physdev_op 33 108 #define __HYPERVISOR_hvm_op 34 109 #define __HYPERVISOR_sysctl 35 110 #define __HYPERVISOR_domctl 36 111 #define __HYPERVISOR_kexec_op 37 112 #define __HYPERVISOR_tmem_op 38 113 #define __HYPERVISOR_argo_op 39 114 #define __HYPERVISOR_xenpmu_op 40 115 #define __HYPERVISOR_dm_op 41 116 #define __HYPERVISOR_hypfs_op 42 117 118 /* Architecture-specific hypercall definitions. */ 119 #define __HYPERVISOR_arch_0 48 120 #define __HYPERVISOR_arch_1 49 121 #define __HYPERVISOR_arch_2 50 122 #define __HYPERVISOR_arch_3 51 123 #define __HYPERVISOR_arch_4 52 124 #define __HYPERVISOR_arch_5 53 125 #define __HYPERVISOR_arch_6 54 126 #define __HYPERVISOR_arch_7 55 127 128 /* ` } */ 129 130 /* 131 * HYPERCALL COMPATIBILITY. 132 */ 133 134 /* New sched_op hypercall introduced in 0x00030101. */ 135 #if __XEN_INTERFACE_VERSION__ < 0x00030101 136 #undef __HYPERVISOR_sched_op 137 #define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat 138 #endif 139 140 /* New event-channel and physdev hypercalls introduced in 0x00030202. */ 141 #if __XEN_INTERFACE_VERSION__ < 0x00030202 142 #undef __HYPERVISOR_event_channel_op 143 #define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat 144 #undef __HYPERVISOR_physdev_op 145 #define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat 146 #endif 147 148 /* New platform_op hypercall introduced in 0x00030204. */ 149 #if __XEN_INTERFACE_VERSION__ < 0x00030204 150 #define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op 151 #endif 152 153 /* 154 * VIRTUAL INTERRUPTS 155 * 156 * Virtual interrupts that a guest OS may receive from Xen. 157 * 158 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a 159 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound. 160 * The latter can be allocated only once per guest: they must initially be 161 * allocated to VCPU0 but can subsequently be re-bound. 162 */ 163 /* ` enum virq { */ 164 #define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */ 165 #define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */ 166 #define VIRQ_CONSOLE 2 /* G. (DOM0) Bytes received on emergency console. */ 167 #define VIRQ_DOM_EXC 3 /* G. (DOM0) Exceptional event for some domain. */ 168 #define VIRQ_TBUF 4 /* G. (DOM0) Trace buffer has records available. */ 169 #define VIRQ_DEBUGGER 6 /* G. (DOM0) A domain has paused for debugging. */ 170 #define VIRQ_XENOPROF 7 /* V. XenOprofile interrupt: new sample available */ 171 #define VIRQ_CON_RING 8 /* G. (DOM0) Bytes received on console */ 172 #define VIRQ_PCPU_STATE 9 /* G. (DOM0) PCPU state changed */ 173 #define VIRQ_MEM_EVENT 10 /* G. (DOM0) A memory event has occurred */ 174 #define VIRQ_ARGO 11 /* G. Argo interdomain message notification */ 175 #define VIRQ_ENOMEM 12 /* G. (DOM0) Low on heap memory */ 176 #define VIRQ_XENPMU 13 /* V. PMC interrupt */ 177 178 /* Architecture-specific VIRQ definitions. */ 179 #define VIRQ_ARCH_0 16 180 #define VIRQ_ARCH_1 17 181 #define VIRQ_ARCH_2 18 182 #define VIRQ_ARCH_3 19 183 #define VIRQ_ARCH_4 20 184 #define VIRQ_ARCH_5 21 185 #define VIRQ_ARCH_6 22 186 #define VIRQ_ARCH_7 23 187 /* ` } */ 188 189 #define NR_VIRQS 24 190 191 /* 192 * ` enum neg_errnoval 193 * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[], 194 * ` unsigned count, unsigned *done_out, 195 * ` unsigned foreigndom) 196 * ` 197 * @reqs is an array of mmu_update_t structures ((ptr, val) pairs). 198 * @count is the length of the above array. 199 * @pdone is an output parameter indicating number of completed operations 200 * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this 201 * hypercall invocation. Can be DOMID_SELF. 202 * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced 203 * in this hypercall invocation. The value of this field 204 * (x) encodes the PFD as follows: 205 * x == 0 => PFD == DOMID_SELF 206 * x != 0 => PFD == x - 1 207 * 208 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command. 209 * ------------- 210 * ptr[1:0] == MMU_NORMAL_PT_UPDATE: 211 * Updates an entry in a page table belonging to PFD. If updating an L1 table, 212 * and the new table entry is valid/present, the mapped frame must belong to 213 * FD. If attempting to map an I/O page then the caller assumes the privilege 214 * of the FD. 215 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. 216 * FD == DOMID_XEN: Map restricted areas of Xen's heap space. 217 * ptr[:2] -- Machine address of the page-table entry to modify. 218 * val -- Value to write. 219 * 220 * There also certain implicit requirements when using this hypercall. The 221 * pages that make up a pagetable must be mapped read-only in the guest. 222 * This prevents uncontrolled guest updates to the pagetable. Xen strictly 223 * enforces this, and will disallow any pagetable update which will end up 224 * mapping pagetable page RW, and will disallow using any writable page as a 225 * pagetable. In practice it means that when constructing a page table for a 226 * process, thread, etc, we MUST be very dilligient in following these rules: 227 * 1). Start with top-level page (PGD or in Xen language: L4). Fill out 228 * the entries. 229 * 2). Keep on going, filling out the upper (PUD or L3), and middle (PMD 230 * or L2). 231 * 3). Start filling out the PTE table (L1) with the PTE entries. Once 232 * done, make sure to set each of those entries to RO (so writeable bit 233 * is unset). Once that has been completed, set the PMD (L2) for this 234 * PTE table as RO. 235 * 4). When completed with all of the PMD (L2) entries, and all of them have 236 * been set to RO, make sure to set RO the PUD (L3). Do the same 237 * operation on PGD (L4) pagetable entries that have a PUD (L3) entry. 238 * 5). Now before you can use those pages (so setting the cr3), you MUST also 239 * pin them so that the hypervisor can verify the entries. This is done 240 * via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame 241 * number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op( 242 * MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be 243 * issued. 244 * For 32-bit guests, the L4 is not used (as there is less pagetables), so 245 * instead use L3. 246 * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE 247 * hypercall. Also if so desired the OS can also try to write to the PTE 248 * and be trapped by the hypervisor (as the PTE entry is RO). 249 * 250 * To deallocate the pages, the operations are the reverse of the steps 251 * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the 252 * pagetable MUST not be in use (meaning that the cr3 is not set to it). 253 * 254 * ptr[1:0] == MMU_MACHPHYS_UPDATE: 255 * Updates an entry in the machine->pseudo-physical mapping table. 256 * ptr[:2] -- Machine address within the frame whose mapping to modify. 257 * The frame must belong to the FD, if one is specified. 258 * val -- Value to write into the mapping entry. 259 * 260 * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: 261 * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed 262 * with those in @val. 263 * 264 * ptr[1:0] == MMU_PT_UPDATE_NO_TRANSLATE: 265 * As MMU_NORMAL_PT_UPDATE above, but @val is not translated though FD 266 * page tables. 267 * 268 * @val is usually the machine frame number along with some attributes. 269 * The attributes by default follow the architecture defined bits. Meaning that 270 * if this is a X86_64 machine and four page table layout is used, the layout 271 * of val is: 272 * - 63 if set means No execute (NX) 273 * - 46-13 the machine frame number 274 * - 12 available for guest 275 * - 11 available for guest 276 * - 10 available for guest 277 * - 9 available for guest 278 * - 8 global 279 * - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages) 280 * - 6 dirty 281 * - 5 accessed 282 * - 4 page cached disabled 283 * - 3 page write through 284 * - 2 userspace accessible 285 * - 1 writeable 286 * - 0 present 287 * 288 * The one bits that does not fit with the default layout is the PAGE_PSE 289 * also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the 290 * HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB 291 * (or 2MB) instead of using the PAGE_PSE bit. 292 * 293 * The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen 294 * using it as the Page Attribute Table (PAT) bit - for details on it please 295 * refer to Intel SDM 10.12. The PAT allows to set the caching attributes of 296 * pages instead of using MTRRs. 297 * 298 * The PAT MSR is as follows (it is a 64-bit value, each entry is 8 bits): 299 * PAT4 PAT0 300 * +-----+-----+----+----+----+-----+----+----+ 301 * | UC | UC- | WC | WB | UC | UC- | WC | WB | <= Linux 302 * +-----+-----+----+----+----+-----+----+----+ 303 * | UC | UC- | WT | WB | UC | UC- | WT | WB | <= BIOS (default when machine boots) 304 * +-----+-----+----+----+----+-----+----+----+ 305 * | rsv | rsv | WP | WC | UC | UC- | WT | WB | <= Xen 306 * +-----+-----+----+----+----+-----+----+----+ 307 * 308 * The lookup of this index table translates to looking up 309 * Bit 7, Bit 4, and Bit 3 of val entry: 310 * 311 * PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3). 312 * 313 * If all bits are off, then we are using PAT0. If bit 3 turned on, 314 * then we are using PAT1, if bit 3 and bit 4, then PAT2.. 315 * 316 * As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means 317 * that if a guest that follows Linux's PAT setup and would like to set Write 318 * Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is 319 * set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the 320 * caching as: 321 * 322 * WB = none (so PAT0) 323 * WC = PWT (bit 3 on) 324 * UC = PWT | PCD (bit 3 and 4 are on). 325 * 326 * To make it work with Xen, it needs to translate the WC bit as so: 327 * 328 * PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3 329 * 330 * And to translate back it would: 331 * 332 * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7. 333 */ 334 #define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */ 335 #define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */ 336 #define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */ 337 #define MMU_PT_UPDATE_NO_TRANSLATE 3 /* checked '*ptr = val'. ptr is MA. */ 338 /* val never translated. */ 339 340 /* 341 * MMU EXTENDED OPERATIONS 342 * 343 * ` enum neg_errnoval 344 * ` HYPERVISOR_mmuext_op(mmuext_op_t uops[], 345 * ` unsigned int count, 346 * ` unsigned int *pdone, 347 * ` unsigned int foreigndom) 348 */ 349 /* HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures. 350 * A foreigndom (FD) can be specified (or DOMID_SELF for none). 351 * Where the FD has some effect, it is described below. 352 * 353 * cmd: MMUEXT_(UN)PIN_*_TABLE 354 * mfn: Machine frame number to be (un)pinned as a p.t. page. 355 * The frame must belong to the FD, if one is specified. 356 * 357 * cmd: MMUEXT_NEW_BASEPTR 358 * mfn: Machine frame number of new page-table base to install in MMU. 359 * 360 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only] 361 * mfn: Machine frame number of new page-table base to install in MMU 362 * when in user space. 363 * 364 * cmd: MMUEXT_TLB_FLUSH_LOCAL 365 * No additional arguments. Flushes local TLB. 366 * 367 * cmd: MMUEXT_INVLPG_LOCAL 368 * linear_addr: Linear address to be flushed from the local TLB. 369 * 370 * cmd: MMUEXT_TLB_FLUSH_MULTI 371 * vcpumask: Pointer to bitmap of VCPUs to be flushed. 372 * 373 * cmd: MMUEXT_INVLPG_MULTI 374 * linear_addr: Linear address to be flushed. 375 * vcpumask: Pointer to bitmap of VCPUs to be flushed. 376 * 377 * cmd: MMUEXT_TLB_FLUSH_ALL 378 * No additional arguments. Flushes all VCPUs' TLBs. 379 * 380 * cmd: MMUEXT_INVLPG_ALL 381 * linear_addr: Linear address to be flushed from all VCPUs' TLBs. 382 * 383 * cmd: MMUEXT_FLUSH_CACHE 384 * No additional arguments. Writes back and flushes cache contents. 385 * 386 * cmd: MMUEXT_FLUSH_CACHE_GLOBAL 387 * No additional arguments. Writes back and flushes cache contents 388 * on all CPUs in the system. 389 * 390 * cmd: MMUEXT_SET_LDT 391 * linear_addr: Linear address of LDT base (NB. must be page-aligned). 392 * nr_ents: Number of entries in LDT. 393 * 394 * cmd: MMUEXT_CLEAR_PAGE 395 * mfn: Machine frame number to be cleared. 396 * 397 * cmd: MMUEXT_COPY_PAGE 398 * mfn: Machine frame number of the destination page. 399 * src_mfn: Machine frame number of the source page. 400 * 401 * cmd: MMUEXT_[UN]MARK_SUPER 402 * mfn: Machine frame number of head of superpage to be [un]marked. 403 */ 404 /* ` enum mmuext_cmd { */ 405 #define MMUEXT_PIN_L1_TABLE 0 406 #define MMUEXT_PIN_L2_TABLE 1 407 #define MMUEXT_PIN_L3_TABLE 2 408 #define MMUEXT_PIN_L4_TABLE 3 409 #define MMUEXT_UNPIN_TABLE 4 410 #define MMUEXT_NEW_BASEPTR 5 411 #define MMUEXT_TLB_FLUSH_LOCAL 6 412 #define MMUEXT_INVLPG_LOCAL 7 413 #define MMUEXT_TLB_FLUSH_MULTI 8 414 #define MMUEXT_INVLPG_MULTI 9 415 #define MMUEXT_TLB_FLUSH_ALL 10 416 #define MMUEXT_INVLPG_ALL 11 417 #define MMUEXT_FLUSH_CACHE 12 418 #define MMUEXT_SET_LDT 13 419 #define MMUEXT_NEW_USER_BASEPTR 15 420 #define MMUEXT_CLEAR_PAGE 16 421 #define MMUEXT_COPY_PAGE 17 422 #define MMUEXT_FLUSH_CACHE_GLOBAL 18 423 #define MMUEXT_MARK_SUPER 19 424 #define MMUEXT_UNMARK_SUPER 20 425 /* ` } */ 426 427 #ifndef __ASSEMBLY__ 428 struct mmuext_op { 429 unsigned int cmd; /* => enum mmuext_cmd */ 430 union { 431 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR 432 * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */ 433 xen_pfn_t mfn; 434 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */ 435 unsigned long linear_addr; 436 } arg1; 437 union { 438 /* SET_LDT */ 439 unsigned int nr_ents; 440 /* TLB_FLUSH_MULTI, INVLPG_MULTI */ 441 #if __XEN_INTERFACE_VERSION__ >= 0x00030205 442 XEN_GUEST_HANDLE(const_void) vcpumask; 443 #else 444 const void *vcpumask; 445 #endif 446 /* COPY_PAGE */ 447 xen_pfn_t src_mfn; 448 } arg2; 449 }; 450 typedef struct mmuext_op mmuext_op_t; 451 DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); 452 #endif 453 454 /* 455 * ` enum neg_errnoval 456 * ` HYPERVISOR_update_va_mapping(unsigned long va, u64 val, 457 * ` enum uvm_flags flags) 458 * ` 459 * ` enum neg_errnoval 460 * ` HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, u64 val, 461 * ` enum uvm_flags flags, 462 * ` domid_t domid) 463 * ` 464 * ` @va: The virtual address whose mapping we want to change 465 * ` @val: The new page table entry, must contain a machine address 466 * ` @flags: Control TLB flushes 467 */ 468 /* These are passed as 'flags' to update_va_mapping. They can be ORed. */ 469 /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */ 470 /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */ 471 /* ` enum uvm_flags { */ 472 #define UVMF_NONE (xen_mk_ulong(0)<<0) /* No flushing at all. */ 473 #define UVMF_TLB_FLUSH (xen_mk_ulong(1)<<0) /* Flush entire TLB(s). */ 474 #define UVMF_INVLPG (xen_mk_ulong(2)<<0) /* Flush only one entry. */ 475 #define UVMF_FLUSHTYPE_MASK (xen_mk_ulong(3)<<0) 476 #define UVMF_MULTI (xen_mk_ulong(0)<<2) /* Flush subset of TLBs. */ 477 #define UVMF_LOCAL (xen_mk_ulong(0)<<2) /* Flush local TLB. */ 478 #define UVMF_ALL (xen_mk_ulong(1)<<2) /* Flush all TLBs. */ 479 /* ` } */ 480 481 /* 482 * ` int 483 * ` HYPERVISOR_console_io(unsigned int cmd, 484 * ` unsigned int count, 485 * ` char buffer[]); 486 * 487 * @cmd: Command (see below) 488 * @count: Size of the buffer to read/write 489 * @buffer: Pointer in the guest memory 490 * 491 * List of commands: 492 * 493 * * CONSOLEIO_write: Write the buffer to Xen console. 494 * For the hardware domain, all the characters in the buffer will 495 * be written. Characters will be printed directly to the console. 496 * For all the other domains, only the printable characters will be 497 * written. Characters may be buffered until a newline (i.e '\n') is 498 * found. 499 * @return 0 on success, otherwise return an error code. 500 * * CONSOLEIO_read: Attempts to read up to @count characters from Xen 501 * console. The maximum buffer size (i.e. @count) supported is 2GB. 502 * @return the number of characters read on success, otherwise return 503 * an error code. 504 */ 505 #define CONSOLEIO_write 0 506 #define CONSOLEIO_read 1 507 508 /* 509 * Commands to HYPERVISOR_vm_assist(). 510 */ 511 #define VMASST_CMD_enable 0 512 #define VMASST_CMD_disable 1 513 514 /* x86/32 guests: simulate full 4GB segment limits. */ 515 #define VMASST_TYPE_4gb_segments 0 516 517 /* x86/32 guests: trap (vector 15) whenever above vmassist is used. */ 518 #define VMASST_TYPE_4gb_segments_notify 1 519 520 /* 521 * x86 guests: support writes to bottom-level PTEs. 522 * NB1. Page-directory entries cannot be written. 523 * NB2. Guest must continue to remove all writable mappings of PTEs. 524 */ 525 #define VMASST_TYPE_writable_pagetables 2 526 527 /* x86/PAE guests: support PDPTs above 4GB. */ 528 #define VMASST_TYPE_pae_extended_cr3 3 529 530 /* 531 * x86 guests: Sane behaviour for virtual iopl 532 * - virtual iopl updated from do_iret() hypercalls. 533 * - virtual iopl reported in bounce frames. 534 * - guest kernels assumed to be level 0 for the purpose of iopl checks. 535 */ 536 #define VMASST_TYPE_architectural_iopl 4 537 538 /* 539 * All guests: activate update indicator in vcpu_runstate_info 540 * Enable setting the XEN_RUNSTATE_UPDATE flag in guest memory mapped 541 * vcpu_runstate_info during updates of the runstate information. 542 */ 543 #define VMASST_TYPE_runstate_update_flag 5 544 545 /* 546 * x86/64 guests: strictly hide M2P from user mode. 547 * This allows the guest to control respective hypervisor behavior: 548 * - when not set, L4 tables get created with the respective slot blank, 549 * and whenever the L4 table gets used as a kernel one the missing 550 * mapping gets inserted, 551 * - when set, L4 tables get created with the respective slot initialized 552 * as before, and whenever the L4 table gets used as a user one the 553 * mapping gets zapped. 554 */ 555 #define VMASST_TYPE_m2p_strict 32 556 557 #if __XEN_INTERFACE_VERSION__ < 0x00040600 558 #define MAX_VMASST_TYPE 3 559 #endif 560 561 /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ 562 #define DOMID_FIRST_RESERVED xen_mk_uint(0x7FF0) 563 564 /* DOMID_SELF is used in certain contexts to refer to oneself. */ 565 #define DOMID_SELF xen_mk_uint(0x7FF0) 566 567 /* 568 * DOMID_IO is used to restrict page-table updates to mapping I/O memory. 569 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO 570 * is useful to ensure that no mappings to the OS's own heap are accidentally 571 * installed. (e.g., in Linux this could cause havoc as reference counts 572 * aren't adjusted on the I/O-mapping code path). 573 * This only makes sense as HYPERVISOR_mmu_update()'s and 574 * HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument. For 575 * HYPERVISOR_mmu_update() context it can be specified by any calling domain, 576 * otherwise it's only permitted if the caller is privileged. 577 */ 578 #define DOMID_IO xen_mk_uint(0x7FF1) 579 580 /* 581 * DOMID_XEN is used to allow privileged domains to map restricted parts of 582 * Xen's heap space (e.g., the machine_to_phys table). 583 * This only makes sense as 584 * - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or 585 * HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument, 586 * - with XENMAPSPACE_gmfn_foreign, 587 * and is only permitted if the caller is privileged. 588 */ 589 #define DOMID_XEN xen_mk_uint(0x7FF2) 590 591 /* 592 * DOMID_COW is used as the owner of sharable pages */ 593 #define DOMID_COW xen_mk_uint(0x7FF3) 594 595 /* DOMID_INVALID is used to identify pages with unknown owner. */ 596 #define DOMID_INVALID xen_mk_uint(0x7FF4) 597 598 /* Idle domain. */ 599 #define DOMID_IDLE xen_mk_uint(0x7FFF) 600 601 /* Mask for valid domain id values */ 602 #define DOMID_MASK xen_mk_uint(0x7FFF) 603 604 #ifndef __ASSEMBLY__ 605 606 typedef uint16_t domid_t; 607 608 /* 609 * Send an array of these to HYPERVISOR_mmu_update(). 610 * NB. The fields are natural pointer/address size for this architecture. 611 */ 612 struct mmu_update { 613 uint64_t ptr; /* Machine address of PTE. */ 614 uint64_t val; /* New contents of PTE. */ 615 }; 616 typedef struct mmu_update mmu_update_t; 617 DEFINE_XEN_GUEST_HANDLE(mmu_update_t); 618 619 /* 620 * ` enum neg_errnoval 621 * ` HYPERVISOR_multicall(multicall_entry_t call_list[], 622 * ` uint32_t nr_calls); 623 * 624 * NB. The fields are logically the natural register size for this 625 * architecture. In cases where xen_ulong_t is larger than this then 626 * any unused bits in the upper portion must be zero. 627 */ 628 struct multicall_entry { 629 xen_ulong_t op, result; 630 xen_ulong_t args[6]; 631 }; 632 typedef struct multicall_entry multicall_entry_t; 633 DEFINE_XEN_GUEST_HANDLE(multicall_entry_t); 634 635 #if __XEN_INTERFACE_VERSION__ < 0x00040400 636 /* 637 * Event channel endpoints per domain (when using the 2-level ABI): 638 * 1024 if a long is 32 bits; 4096 if a long is 64 bits. 639 */ 640 #define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS 641 #endif 642 643 struct vcpu_time_info { 644 /* 645 * Updates to the following values are preceded and followed by an 646 * increment of 'version'. The guest can therefore detect updates by 647 * looking for changes to 'version'. If the least-significant bit of 648 * the version number is set then an update is in progress and the guest 649 * must wait to read a consistent set of values. 650 * The correct way to interact with the version number is similar to 651 * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry. 652 */ 653 uint32_t version; 654 uint32_t pad0; 655 uint64_t tsc_timestamp; /* TSC at last update of time vals. */ 656 uint64_t system_time; /* Time, in nanosecs, since boot. */ 657 /* 658 * Current system time: 659 * system_time + 660 * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32) 661 * CPU frequency (Hz): 662 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift 663 */ 664 uint32_t tsc_to_system_mul; 665 int8_t tsc_shift; 666 #if __XEN_INTERFACE_VERSION__ > 0x040600 667 uint8_t flags; 668 uint8_t pad1[2]; 669 #else 670 int8_t pad1[3]; 671 #endif 672 }; /* 32 bytes */ 673 typedef struct vcpu_time_info vcpu_time_info_t; 674 675 #define XEN_PVCLOCK_TSC_STABLE_BIT (1 << 0) 676 #define XEN_PVCLOCK_GUEST_STOPPED (1 << 1) 677 678 struct vcpu_info { 679 /* 680 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate 681 * a pending notification for a particular VCPU. It is then cleared 682 * by the guest OS /before/ checking for pending work, thus avoiding 683 * a set-and-check race. Note that the mask is only accessed by Xen 684 * on the CPU that is currently hosting the VCPU. This means that the 685 * pending and mask flags can be updated by the guest without special 686 * synchronisation (i.e., no need for the x86 LOCK prefix). 687 * This may seem suboptimal because if the pending flag is set by 688 * a different CPU then an IPI may be scheduled even when the mask 689 * is set. However, note: 690 * 1. The task of 'interrupt holdoff' is covered by the per-event- 691 * channel mask bits. A 'noisy' event that is continually being 692 * triggered can be masked at source at this very precise 693 * granularity. 694 * 2. The main purpose of the per-VCPU mask is therefore to restrict 695 * reentrant execution: whether for concurrency control, or to 696 * prevent unbounded stack usage. Whatever the purpose, we expect 697 * that the mask will be asserted only for short periods at a time, 698 * and so the likelihood of a 'spurious' IPI is suitably small. 699 * The mask is read before making an event upcall to the guest: a 700 * non-zero mask therefore guarantees that the VCPU will not receive 701 * an upcall activation. The mask is cleared when the VCPU requests 702 * to block: this avoids wakeup-waiting races. 703 */ 704 uint8_t evtchn_upcall_pending; 705 #ifdef XEN_HAVE_PV_UPCALL_MASK 706 uint8_t evtchn_upcall_mask; 707 #else /* XEN_HAVE_PV_UPCALL_MASK */ 708 uint8_t pad0; 709 #endif /* XEN_HAVE_PV_UPCALL_MASK */ 710 xen_ulong_t evtchn_pending_sel; 711 struct arch_vcpu_info arch; 712 vcpu_time_info_t time; 713 }; /* 64 bytes (x86) */ 714 #ifndef __XEN__ 715 typedef struct vcpu_info vcpu_info_t; 716 #endif 717 718 /* 719 * `incontents 200 startofday_shared Start-of-day shared data structure 720 * Xen/kernel shared data -- pointer provided in start_info. 721 * 722 * This structure is defined to be both smaller than a page, and the 723 * only data on the shared page, but may vary in actual size even within 724 * compatible Xen versions; guests should not rely on the size 725 * of this structure remaining constant. 726 */ 727 struct shared_info { 728 struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS]; 729 730 /* 731 * A domain can create "event channels" on which it can send and receive 732 * asynchronous event notifications. There are three classes of event that 733 * are delivered by this mechanism: 734 * 1. Bi-directional inter- and intra-domain connections. Domains must 735 * arrange out-of-band to set up a connection (usually by allocating 736 * an unbound 'listener' port and avertising that via a storage service 737 * such as xenstore). 738 * 2. Physical interrupts. A domain with suitable hardware-access 739 * privileges can bind an event-channel port to a physical interrupt 740 * source. 741 * 3. Virtual interrupts ('events'). A domain can bind an event-channel 742 * port to a virtual interrupt source, such as the virtual-timer 743 * device or the emergency console. 744 * 745 * Event channels are addressed by a "port index". Each channel is 746 * associated with two bits of information: 747 * 1. PENDING -- notifies the domain that there is a pending notification 748 * to be processed. This bit is cleared by the guest. 749 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING 750 * will cause an asynchronous upcall to be scheduled. This bit is only 751 * updated by the guest. It is read-only within Xen. If a channel 752 * becomes pending while the channel is masked then the 'edge' is lost 753 * (i.e., when the channel is unmasked, the guest must manually handle 754 * pending notifications as no upcall will be scheduled by Xen). 755 * 756 * To expedite scanning of pending notifications, any 0->1 pending 757 * transition on an unmasked channel causes a corresponding bit in a 758 * per-vcpu selector word to be set. Each bit in the selector covers a 759 * 'C long' in the PENDING bitfield array. 760 */ 761 xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8]; 762 xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8]; 763 764 /* 765 * Wallclock time: updated by control software or RTC emulation. 766 * Guests should base their gettimeofday() syscall on this 767 * wallclock-base value. 768 * The values of wc_sec and wc_nsec are offsets from the Unix epoch 769 * adjusted by the domain's 'time offset' (in seconds) as set either 770 * by XEN_DOMCTL_settimeoffset, or adjusted via a guest write to the 771 * emulated RTC. 772 */ 773 uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */ 774 uint32_t wc_sec; 775 uint32_t wc_nsec; 776 #if !defined(__i386__) 777 uint32_t wc_sec_hi; 778 # define xen_wc_sec_hi wc_sec_hi 779 #elif !defined(__XEN__) && !defined(__XEN_TOOLS__) 780 # define xen_wc_sec_hi arch.wc_sec_hi 781 #endif 782 783 struct arch_shared_info arch; 784 785 }; 786 #ifndef __XEN__ 787 typedef struct shared_info shared_info_t; 788 #endif 789 790 /* 791 * `incontents 200 startofday Start-of-day memory layout 792 * 793 * 1. The domain is started within contiguous virtual-memory region. 794 * 2. The contiguous region ends on an aligned 4MB boundary. 795 * 3. This the order of bootstrap elements in the initial virtual region: 796 * a. relocated kernel image 797 * b. initial ram disk [mod_start, mod_len] 798 * (may be omitted) 799 * c. list of allocated page frames [mfn_list, nr_pages] 800 * (unless relocated due to XEN_ELFNOTE_INIT_P2M) 801 * d. start_info_t structure [register rSI (x86)] 802 * in case of dom0 this page contains the console info, too 803 * e. unless dom0: xenstore ring page 804 * f. unless dom0: console ring page 805 * g. bootstrap page tables [pt_base and CR3 (x86)] 806 * h. bootstrap stack [register ESP (x86)] 807 * 4. Bootstrap elements are packed together, but each is 4kB-aligned. 808 * 5. The list of page frames forms a contiguous 'pseudo-physical' memory 809 * layout for the domain. In particular, the bootstrap virtual-memory 810 * region is a 1:1 mapping to the first section of the pseudo-physical map. 811 * 6. All bootstrap elements are mapped read-writable for the guest OS. The 812 * only exception is the bootstrap page table, which is mapped read-only. 813 * 7. There is guaranteed to be at least 512kB padding after the final 814 * bootstrap element. If necessary, the bootstrap virtual region is 815 * extended by an extra 4MB to ensure this. 816 * 817 * Note: Prior to 25833:bb85bbccb1c9. ("x86/32-on-64 adjust Dom0 initial page 818 * table layout") a bug caused the pt_base (3.g above) and cr3 to not point 819 * to the start of the guest page tables (it was offset by two pages). 820 * This only manifested itself on 32-on-64 dom0 kernels and not 32-on-64 domU 821 * or 64-bit kernels of any colour. The page tables for a 32-on-64 dom0 got 822 * allocated in the order: 'first L1','first L2', 'first L3', so the offset 823 * to the page table base is by two pages back. The initial domain if it is 824 * 32-bit and runs under a 64-bit hypervisor should _NOT_ use two of the 825 * pages preceding pt_base and mark them as reserved/unused. 826 */ 827 #ifdef XEN_HAVE_PV_GUEST_ENTRY 828 struct start_info { 829 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */ 830 char magic[32]; /* "xen-<version>-<platform>". */ 831 unsigned long nr_pages; /* Total pages allocated to this domain. */ 832 unsigned long shared_info; /* MACHINE address of shared info struct. */ 833 uint32_t flags; /* SIF_xxx flags. */ 834 xen_pfn_t store_mfn; /* MACHINE page number of shared page. */ 835 uint32_t store_evtchn; /* Event channel for store communication. */ 836 union { 837 struct { 838 xen_pfn_t mfn; /* MACHINE page number of console page. */ 839 uint32_t evtchn; /* Event channel for console page. */ 840 } domU; 841 struct { 842 uint32_t info_off; /* Offset of console_info struct. */ 843 uint32_t info_size; /* Size of console_info struct from start.*/ 844 } dom0; 845 } console; 846 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */ 847 unsigned long pt_base; /* VIRTUAL address of page directory. */ 848 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */ 849 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */ 850 unsigned long mod_start; /* VIRTUAL address of pre-loaded module */ 851 /* (PFN of pre-loaded module if */ 852 /* SIF_MOD_START_PFN set in flags). */ 853 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */ 854 #define MAX_GUEST_CMDLINE 1024 855 int8_t cmd_line[MAX_GUEST_CMDLINE]; 856 /* The pfn range here covers both page table and p->m table frames. */ 857 unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table. */ 858 unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table. */ 859 }; 860 typedef struct start_info start_info_t; 861 862 /* New console union for dom0 introduced in 0x00030203. */ 863 #if __XEN_INTERFACE_VERSION__ < 0x00030203 864 #define console_mfn console.domU.mfn 865 #define console_evtchn console.domU.evtchn 866 #endif 867 #endif /* XEN_HAVE_PV_GUEST_ENTRY */ 868 869 /* These flags are passed in the 'flags' field of start_info_t. */ 870 #define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */ 871 #define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */ 872 #define SIF_MULTIBOOT_MOD (1<<2) /* Is mod_start a multiboot module? */ 873 #define SIF_MOD_START_PFN (1<<3) /* Is mod_start a PFN? */ 874 #define SIF_VIRT_P2M_4TOOLS (1<<4) /* Do Xen tools understand a virt. mapped */ 875 /* P->M making the 3 level tree obsolete? */ 876 #define SIF_PM_MASK (0xFF<<8) /* reserve 1 byte for xen-pm options */ 877 878 /* 879 * A multiboot module is a package containing modules very similar to a 880 * multiboot module array. The only differences are: 881 * - the array of module descriptors is by convention simply at the beginning 882 * of the multiboot module, 883 * - addresses in the module descriptors are based on the beginning of the 884 * multiboot module, 885 * - the number of modules is determined by a termination descriptor that has 886 * mod_start == 0. 887 * 888 * This permits to both build it statically and reference it in a configuration 889 * file, and let the PV guest easily rebase the addresses to virtual addresses 890 * and at the same time count the number of modules. 891 */ 892 struct xen_multiboot_mod_list 893 { 894 /* Address of first byte of the module */ 895 uint32_t mod_start; 896 /* Address of last byte of the module (inclusive) */ 897 uint32_t mod_end; 898 /* Address of zero-terminated command line */ 899 uint32_t cmdline; 900 /* Unused, must be zero */ 901 uint32_t pad; 902 }; 903 /* 904 * `incontents 200 startofday_dom0_console Dom0_console 905 * 906 * The console structure in start_info.console.dom0 907 * 908 * This structure includes a variety of information required to 909 * have a working VGA/VESA console. 910 */ 911 typedef struct dom0_vga_console_info { 912 uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */ 913 #define XEN_VGATYPE_TEXT_MODE_3 0x03 914 #define XEN_VGATYPE_VESA_LFB 0x23 915 #define XEN_VGATYPE_EFI_LFB 0x70 916 917 union { 918 struct { 919 /* Font height, in pixels. */ 920 uint16_t font_height; 921 /* Cursor location (column, row). */ 922 uint16_t cursor_x, cursor_y; 923 /* Number of rows and columns (dimensions in characters). */ 924 uint16_t rows, columns; 925 } text_mode_3; 926 927 struct { 928 /* Width and height, in pixels. */ 929 uint16_t width, height; 930 /* Bytes per scan line. */ 931 uint16_t bytes_per_line; 932 /* Bits per pixel. */ 933 uint16_t bits_per_pixel; 934 /* LFB physical address, and size (in units of 64kB). */ 935 uint32_t lfb_base; 936 uint32_t lfb_size; 937 /* RGB mask offsets and sizes, as defined by VBE 1.2+ */ 938 uint8_t red_pos, red_size; 939 uint8_t green_pos, green_size; 940 uint8_t blue_pos, blue_size; 941 uint8_t rsvd_pos, rsvd_size; 942 #if __XEN_INTERFACE_VERSION__ >= 0x00030206 943 /* VESA capabilities (offset 0xa, VESA command 0x4f00). */ 944 uint32_t gbl_caps; 945 /* Mode attributes (offset 0x0, VESA command 0x4f01). */ 946 uint16_t mode_attrs; 947 uint16_t pad; 948 #endif 949 #if __XEN_INTERFACE_VERSION__ >= 0x00040d00 950 /* high 32 bits of lfb_base */ 951 uint32_t ext_lfb_base; 952 #endif 953 } vesa_lfb; 954 } u; 955 } dom0_vga_console_info_t; 956 #define xen_vga_console_info dom0_vga_console_info 957 #define xen_vga_console_info_t dom0_vga_console_info_t 958 959 typedef uint8_t xen_domain_handle_t[16]; 960 961 __DEFINE_XEN_GUEST_HANDLE(uint8, uint8_t); 962 __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t); 963 __DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t); 964 __DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t); 965 966 typedef struct { 967 uint8_t a[16]; 968 } xen_uuid_t; 969 970 /* 971 * XEN_DEFINE_UUID(0x00112233, 0x4455, 0x6677, 0x8899, 972 * 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff) 973 * will construct UUID 00112233-4455-6677-8899-aabbccddeeff presented as 974 * {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 975 * 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff}; 976 * 977 * NB: This is compatible with Linux kernel and with libuuid, but it is not 978 * compatible with Microsoft, as they use mixed-endian encoding (some 979 * components are little-endian, some are big-endian). 980 */ 981 #define XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 982 {{((a) >> 24) & 0xFF, ((a) >> 16) & 0xFF, \ 983 ((a) >> 8) & 0xFF, ((a) >> 0) & 0xFF, \ 984 ((b) >> 8) & 0xFF, ((b) >> 0) & 0xFF, \ 985 ((c) >> 8) & 0xFF, ((c) >> 0) & 0xFF, \ 986 ((d) >> 8) & 0xFF, ((d) >> 0) & 0xFF, \ 987 e1, e2, e3, e4, e5, e6}} 988 989 #if defined(__STDC_VERSION__) ? __STDC_VERSION__ >= 199901L : defined(__GNUC__) 990 #define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 991 ((xen_uuid_t)XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6)) 992 #else 993 #define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 994 XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) 995 #endif /* __STDC_VERSION__ / __GNUC__ */ 996 997 #endif /* !__ASSEMBLY__ */ 998 999 /* Default definitions for macros used by domctl/sysctl. */ 1000 #if defined(__XEN__) || defined(__XEN_TOOLS__) 1001 1002 #ifndef int64_aligned_t 1003 #define int64_aligned_t int64_t 1004 #endif 1005 #ifndef uint64_aligned_t 1006 #define uint64_aligned_t uint64_t 1007 #endif 1008 #ifndef XEN_GUEST_HANDLE_64 1009 #define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) 1010 #endif 1011 1012 #ifndef __ASSEMBLY__ 1013 struct xenctl_bitmap { 1014 XEN_GUEST_HANDLE_64(uint8) bitmap; 1015 uint32_t nr_bits; 1016 }; 1017 typedef struct xenctl_bitmap xenctl_bitmap_t; 1018 #endif 1019 1020 #endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ 1021 1022 #endif /* __XEN_PUBLIC_XEN_H__ */ 1023 1024 /* 1025 * Local variables: 1026 * mode: C 1027 * c-file-style: "BSD" 1028 * c-basic-offset: 4 1029 * tab-width: 4 1030 * indent-tabs-mode: nil 1031 * End: 1032 */ 1033