xref: /openbmc/qemu/include/hw/xen/interface/arch-arm.h (revision 05caa062)
1 /* SPDX-License-Identifier: MIT */
2 /******************************************************************************
3  * arch-arm.h
4  *
5  * Guest OS interface to ARM Xen.
6  *
7  * Copyright 2011 (C) Citrix Systems
8  */
9 
10 #ifndef __XEN_PUBLIC_ARCH_ARM_H__
11 #define __XEN_PUBLIC_ARCH_ARM_H__
12 
13 /*
14  * `incontents 50 arm_abi Hypercall Calling Convention
15  *
16  * A hypercall is issued using the ARM HVC instruction.
17  *
18  * A hypercall can take up to 5 arguments. These are passed in
19  * registers, the first argument in x0/r0 (for arm64/arm32 guests
20  * respectively irrespective of whether the underlying hypervisor is
21  * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2,
22  * the forth in x3/r3 and the fifth in x4/r4.
23  *
24  * The hypercall number is passed in r12 (arm) or x16 (arm64). In both
25  * cases the relevant ARM procedure calling convention specifies this
26  * is an inter-procedure-call scratch register (e.g. for use in linker
27  * stubs). This use does not conflict with use during a hypercall.
28  *
29  * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG.
30  *
31  * The return value is in x0/r0.
32  *
33  * The hypercall will clobber x16/r12 and the argument registers used
34  * by that hypercall (except r0 which is the return value) i.e. in
35  * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a
36  * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3.
37  *
38  * Parameter structs passed to hypercalls are laid out according to
39  * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA
40  * EABI) and Procedure Call Standard for the ARM 64-bit Architecture
41  * (AAPCS64). Where there is a conflict the 64-bit standard should be
42  * used regardless of guest type. Structures which are passed as
43  * hypercall arguments are always little endian.
44  *
45  * All memory which is shared with other entities in the system
46  * (including the hypervisor and other guests) must reside in memory
47  * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable.
48  * This applies to:
49  *  - hypercall arguments passed via a pointer to guest memory.
50  *  - memory shared via the grant table mechanism (including PV I/O
51  *    rings etc).
52  *  - memory shared with the hypervisor (struct shared_info, struct
53  *    vcpu_info, the grant table, etc).
54  *
55  * Any cache allocation hints are acceptable.
56  */
57 
58 /*
59  * `incontents 55 arm_hcall Supported Hypercalls
60  *
61  * Xen on ARM makes extensive use of hardware facilities and therefore
62  * only a subset of the potential hypercalls are required.
63  *
64  * Since ARM uses second stage paging any machine/physical addresses
65  * passed to hypercalls are Guest Physical Addresses (Intermediate
66  * Physical Addresses) unless otherwise noted.
67  *
68  * The following hypercalls (and sub operations) are supported on the
69  * ARM platform. Other hypercalls should be considered
70  * unavailable/unsupported.
71  *
72  *  HYPERVISOR_memory_op
73  *   All generic sub-operations
74  *
75  *  HYPERVISOR_domctl
76  *   All generic sub-operations, with the exception of:
77  *    * XEN_DOMCTL_irq_permission (not yet implemented)
78  *
79  *  HYPERVISOR_sched_op
80  *   All generic sub-operations, with the exception of:
81  *    * SCHEDOP_block -- prefer wfi hardware instruction
82  *
83  *  HYPERVISOR_console_io
84  *   All generic sub-operations
85  *
86  *  HYPERVISOR_xen_version
87  *   All generic sub-operations
88  *
89  *  HYPERVISOR_event_channel_op
90  *   All generic sub-operations
91  *
92  *  HYPERVISOR_physdev_op
93  *   Exactly these sub-operations are supported:
94  *   PHYSDEVOP_pci_device_add
95  *   PHYSDEVOP_pci_device_remove
96  *
97  *  HYPERVISOR_sysctl
98  *   All generic sub-operations, with the exception of:
99  *    * XEN_SYSCTL_page_offline_op
100  *    * XEN_SYSCTL_get_pmstat
101  *    * XEN_SYSCTL_pm_op
102  *
103  *  HYPERVISOR_hvm_op
104  *   Exactly these sub-operations are supported:
105  *    * HVMOP_set_param
106  *    * HVMOP_get_param
107  *
108  *  HYPERVISOR_grant_table_op
109  *   All generic sub-operations
110  *
111  *  HYPERVISOR_vcpu_op
112  *   Exactly these sub-operations are supported:
113  *    * VCPUOP_register_vcpu_info
114  *    * VCPUOP_register_runstate_memory_area
115  *
116  *  HYPERVISOR_argo_op
117  *   All generic sub-operations
118  *
119  * Other notes on the ARM ABI:
120  *
121  * - struct start_info is not exported to ARM guests.
122  *
123  * - struct shared_info is mapped by ARM guests using the
124  *   HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing
125  *   XENMAPSPACE_shared_info as space parameter.
126  *
127  * - All the per-cpu struct vcpu_info are mapped by ARM guests using the
128  *   HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0
129  *   struct vcpu_info.
130  *
131  * - The grant table is mapped using the HYPERVISOR_memory_op sub-op
132  *   XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space
133  *   parameter. The memory range specified under the Xen compatible
134  *   hypervisor node on device tree can be used as target gpfn for the
135  *   mapping.
136  *
137  * - Xenstore is initialized by using the two hvm_params
138  *   HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read
139  *   with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
140  *
141  * - The paravirtualized console is initialized by using the two
142  *   hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They
143  *   can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param.
144  *
145  * - Event channel notifications are delivered using the percpu GIC
146  *   interrupt specified under the Xen compatible hypervisor node on
147  *   device tree.
148  *
149  * - The device tree Xen compatible node is fully described under Linux
150  *   at Documentation/devicetree/bindings/arm/xen.txt.
151  */
152 
153 #define XEN_HYPERCALL_TAG   0XEA1
154 
155 #define  int64_aligned_t  int64_t __attribute__((aligned(8)))
156 #define uint64_aligned_t uint64_t __attribute__((aligned(8)))
157 
158 #ifndef __ASSEMBLY__
159 #define ___DEFINE_XEN_GUEST_HANDLE(name, type)                  \
160     typedef union { type *p; unsigned long q; }                 \
161         __guest_handle_ ## name;                                \
162     typedef union { type *p; uint64_aligned_t q; }              \
163         __guest_handle_64_ ## name
164 
165 /*
166  * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field
167  * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes
168  * aligned.
169  * XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an
170  * hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64.
171  */
172 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \
173     ___DEFINE_XEN_GUEST_HANDLE(name, type);   \
174     ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type)
175 #define DEFINE_XEN_GUEST_HANDLE(name)   __DEFINE_XEN_GUEST_HANDLE(name, name)
176 #define __XEN_GUEST_HANDLE(name)        __guest_handle_64_ ## name
177 #define XEN_GUEST_HANDLE(name)          __XEN_GUEST_HANDLE(name)
178 #define XEN_GUEST_HANDLE_PARAM(name)    __guest_handle_ ## name
179 #define set_xen_guest_handle_raw(hnd, val)                  \
180     do {                                                    \
181         __typeof__(&(hnd)) _sxghr_tmp = &(hnd);             \
182         _sxghr_tmp->q = 0;                                  \
183         _sxghr_tmp->p = val;                                \
184     } while ( 0 )
185 #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val)
186 
187 typedef uint64_t xen_pfn_t;
188 #define PRI_xen_pfn PRIx64
189 #define PRIu_xen_pfn PRIu64
190 
191 /*
192  * Maximum number of virtual CPUs in legacy multi-processor guests.
193  * Only one. All other VCPUS must use VCPUOP_register_vcpu_info.
194  */
195 #define XEN_LEGACY_MAX_VCPUS 1
196 
197 typedef uint64_t xen_ulong_t;
198 #define PRI_xen_ulong PRIx64
199 
200 #if defined(__XEN__) || defined(__XEN_TOOLS__)
201 #if defined(__GNUC__) && !defined(__STRICT_ANSI__)
202 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
203 # define __DECL_REG(n64, n32) union {          \
204         uint64_t n64;                          \
205         uint32_t n32;                          \
206     }
207 #else
208 /* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
209 #define __DECL_REG(n64, n32) uint64_t n64
210 #endif
211 
212 struct vcpu_guest_core_regs
213 {
214     /*         Aarch64       Aarch32 */
215     __DECL_REG(x0,           r0_usr);
216     __DECL_REG(x1,           r1_usr);
217     __DECL_REG(x2,           r2_usr);
218     __DECL_REG(x3,           r3_usr);
219     __DECL_REG(x4,           r4_usr);
220     __DECL_REG(x5,           r5_usr);
221     __DECL_REG(x6,           r6_usr);
222     __DECL_REG(x7,           r7_usr);
223     __DECL_REG(x8,           r8_usr);
224     __DECL_REG(x9,           r9_usr);
225     __DECL_REG(x10,          r10_usr);
226     __DECL_REG(x11,          r11_usr);
227     __DECL_REG(x12,          r12_usr);
228 
229     __DECL_REG(x13,          sp_usr);
230     __DECL_REG(x14,          lr_usr);
231 
232     __DECL_REG(x15,          __unused_sp_hyp);
233 
234     __DECL_REG(x16,          lr_irq);
235     __DECL_REG(x17,          sp_irq);
236 
237     __DECL_REG(x18,          lr_svc);
238     __DECL_REG(x19,          sp_svc);
239 
240     __DECL_REG(x20,          lr_abt);
241     __DECL_REG(x21,          sp_abt);
242 
243     __DECL_REG(x22,          lr_und);
244     __DECL_REG(x23,          sp_und);
245 
246     __DECL_REG(x24,          r8_fiq);
247     __DECL_REG(x25,          r9_fiq);
248     __DECL_REG(x26,          r10_fiq);
249     __DECL_REG(x27,          r11_fiq);
250     __DECL_REG(x28,          r12_fiq);
251 
252     __DECL_REG(x29,          sp_fiq);
253     __DECL_REG(x30,          lr_fiq);
254 
255     /* Return address and mode */
256     __DECL_REG(pc64,         pc32);             /* ELR_EL2 */
257     uint64_t cpsr;                              /* SPSR_EL2 */
258 
259     union {
260         uint64_t spsr_el1;       /* AArch64 */
261         uint32_t spsr_svc;       /* AArch32 */
262     };
263 
264     /* AArch32 guests only */
265     uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
266 
267     /* AArch64 guests only */
268     uint64_t sp_el0;
269     uint64_t sp_el1, elr_el1;
270 };
271 typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t;
272 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t);
273 
274 #undef __DECL_REG
275 
276 struct vcpu_guest_context {
277 #define _VGCF_online                   0
278 #define VGCF_online                    (1<<_VGCF_online)
279     uint32_t flags;                         /* VGCF_* */
280 
281     struct vcpu_guest_core_regs user_regs;  /* Core CPU registers */
282 
283     uint64_t sctlr;
284     uint64_t ttbcr, ttbr0, ttbr1;
285 };
286 typedef struct vcpu_guest_context vcpu_guest_context_t;
287 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
288 
289 /*
290  * struct xen_arch_domainconfig's ABI is covered by
291  * XEN_DOMCTL_INTERFACE_VERSION.
292  */
293 #define XEN_DOMCTL_CONFIG_GIC_NATIVE    0
294 #define XEN_DOMCTL_CONFIG_GIC_V2        1
295 #define XEN_DOMCTL_CONFIG_GIC_V3        2
296 
297 #define XEN_DOMCTL_CONFIG_TEE_NONE      0
298 #define XEN_DOMCTL_CONFIG_TEE_OPTEE     1
299 
300 struct xen_arch_domainconfig {
301     /* IN/OUT */
302     uint8_t gic_version;
303     /* IN */
304     uint16_t tee_type;
305     /* IN */
306     uint32_t nr_spis;
307     /*
308      * OUT
309      * Based on the property clock-frequency in the DT timer node.
310      * The property may be present when the bootloader/firmware doesn't
311      * set correctly CNTFRQ which hold the timer frequency.
312      *
313      * As it's not possible to trap this register, we have to replicate
314      * the value in the guest DT.
315      *
316      * = 0 => property not present
317      * > 0 => Value of the property
318      *
319      */
320     uint32_t clock_frequency;
321 };
322 #endif /* __XEN__ || __XEN_TOOLS__ */
323 
324 struct arch_vcpu_info {
325 };
326 typedef struct arch_vcpu_info arch_vcpu_info_t;
327 
328 struct arch_shared_info {
329 };
330 typedef struct arch_shared_info arch_shared_info_t;
331 typedef uint64_t xen_callback_t;
332 
333 #endif
334 
335 #if defined(__XEN__) || defined(__XEN_TOOLS__)
336 
337 /* PSR bits (CPSR, SPSR) */
338 
339 #define PSR_THUMB       (1<<5)        /* Thumb Mode enable */
340 #define PSR_FIQ_MASK    (1<<6)        /* Fast Interrupt mask */
341 #define PSR_IRQ_MASK    (1<<7)        /* Interrupt mask */
342 #define PSR_ABT_MASK    (1<<8)        /* Asynchronous Abort mask */
343 #define PSR_BIG_ENDIAN  (1<<9)        /* arm32: Big Endian Mode */
344 #define PSR_DBG_MASK    (1<<9)        /* arm64: Debug Exception mask */
345 #define PSR_IT_MASK     (0x0600fc00)  /* Thumb If-Then Mask */
346 #define PSR_JAZELLE     (1<<24)       /* Jazelle Mode */
347 #define PSR_Z           (1<<30)       /* Zero condition flag */
348 
349 /* 32 bit modes */
350 #define PSR_MODE_USR 0x10
351 #define PSR_MODE_FIQ 0x11
352 #define PSR_MODE_IRQ 0x12
353 #define PSR_MODE_SVC 0x13
354 #define PSR_MODE_MON 0x16
355 #define PSR_MODE_ABT 0x17
356 #define PSR_MODE_HYP 0x1a
357 #define PSR_MODE_UND 0x1b
358 #define PSR_MODE_SYS 0x1f
359 
360 /* 64 bit modes */
361 #define PSR_MODE_BIT  0x10 /* Set iff AArch32 */
362 #define PSR_MODE_EL3h 0x0d
363 #define PSR_MODE_EL3t 0x0c
364 #define PSR_MODE_EL2h 0x09
365 #define PSR_MODE_EL2t 0x08
366 #define PSR_MODE_EL1h 0x05
367 #define PSR_MODE_EL1t 0x04
368 #define PSR_MODE_EL0t 0x00
369 
370 /*
371  * We set PSR_Z to be able to boot Linux kernel versions with an invalid
372  * encoding of the first 8 NOP instructions. See commit a92882a4d270 in
373  * Linux.
374  *
375  * Note that PSR_Z is also set by U-Boot and QEMU -kernel when loading
376  * zImage kernels on aarch32.
377  */
378 #define PSR_GUEST32_INIT (PSR_Z|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
379 #define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
380 
381 #define SCTLR_GUEST_INIT    xen_mk_ullong(0x00c50078)
382 
383 /*
384  * Virtual machine platform (memory layout, interrupts)
385  *
386  * These are defined for consistency between the tools and the
387  * hypervisor. Guests must not rely on these hardcoded values but
388  * should instead use the FDT.
389  */
390 
391 /* Physical Address Space */
392 
393 /* Virtio MMIO mappings */
394 #define GUEST_VIRTIO_MMIO_BASE   xen_mk_ullong(0x02000000)
395 #define GUEST_VIRTIO_MMIO_SIZE   xen_mk_ullong(0x00100000)
396 
397 /*
398  * vGIC mappings: Only one set of mapping is used by the guest.
399  * Therefore they can overlap.
400  */
401 
402 /* vGIC v2 mappings */
403 #define GUEST_GICD_BASE   xen_mk_ullong(0x03001000)
404 #define GUEST_GICD_SIZE   xen_mk_ullong(0x00001000)
405 #define GUEST_GICC_BASE   xen_mk_ullong(0x03002000)
406 #define GUEST_GICC_SIZE   xen_mk_ullong(0x00002000)
407 
408 /* vGIC v3 mappings */
409 #define GUEST_GICV3_GICD_BASE      xen_mk_ullong(0x03001000)
410 #define GUEST_GICV3_GICD_SIZE      xen_mk_ullong(0x00010000)
411 
412 #define GUEST_GICV3_RDIST_REGIONS  1
413 
414 #define GUEST_GICV3_GICR0_BASE     xen_mk_ullong(0x03020000) /* vCPU0..127 */
415 #define GUEST_GICV3_GICR0_SIZE     xen_mk_ullong(0x01000000)
416 
417 /*
418  * 256 MB is reserved for VPCI configuration space based on calculation
419  * 256 buses x 32 devices x 8 functions x 4 KB = 256 MB
420  */
421 #define GUEST_VPCI_ECAM_BASE    xen_mk_ullong(0x10000000)
422 #define GUEST_VPCI_ECAM_SIZE    xen_mk_ullong(0x10000000)
423 
424 /* ACPI tables physical address */
425 #define GUEST_ACPI_BASE xen_mk_ullong(0x20000000)
426 #define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000)
427 
428 /* PL011 mappings */
429 #define GUEST_PL011_BASE    xen_mk_ullong(0x22000000)
430 #define GUEST_PL011_SIZE    xen_mk_ullong(0x00001000)
431 
432 /* Guest PCI-PCIe memory space where config space and BAR will be available.*/
433 #define GUEST_VPCI_ADDR_TYPE_MEM            xen_mk_ullong(0x02000000)
434 #define GUEST_VPCI_MEM_ADDR                 xen_mk_ullong(0x23000000)
435 #define GUEST_VPCI_MEM_SIZE                 xen_mk_ullong(0x10000000)
436 
437 /*
438  * 16MB == 4096 pages reserved for guest to use as a region to map its
439  * grant table in.
440  */
441 #define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000)
442 #define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000)
443 
444 #define GUEST_MAGIC_BASE  xen_mk_ullong(0x39000000)
445 #define GUEST_MAGIC_SIZE  xen_mk_ullong(0x01000000)
446 
447 #define GUEST_RAM_BANKS   2
448 
449 /*
450  * The way to find the extended regions (to be exposed to the guest as unused
451  * address space) relies on the fact that the regions reserved for the RAM
452  * below are big enough to also accommodate such regions.
453  */
454 #define GUEST_RAM0_BASE   xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */
455 #define GUEST_RAM0_SIZE   xen_mk_ullong(0xc0000000)
456 
457 /* 4GB @ 4GB Prefetch Memory for VPCI */
458 #define GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM   xen_mk_ullong(0x42000000)
459 #define GUEST_VPCI_PREFETCH_MEM_ADDR        xen_mk_ullong(0x100000000)
460 #define GUEST_VPCI_PREFETCH_MEM_SIZE        xen_mk_ullong(0x100000000)
461 
462 #define GUEST_RAM1_BASE   xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */
463 #define GUEST_RAM1_SIZE   xen_mk_ullong(0xfe00000000)
464 
465 #define GUEST_RAM_BASE    GUEST_RAM0_BASE /* Lowest RAM address */
466 /* Largest amount of actual RAM, not including holes */
467 #define GUEST_RAM_MAX     (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
468 /* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */
469 #define GUEST_RAM_BANK_BASES   { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
470 #define GUEST_RAM_BANK_SIZES   { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
471 
472 /* Current supported guest VCPUs */
473 #define GUEST_MAX_VCPUS 128
474 
475 /* Interrupts */
476 #define GUEST_TIMER_VIRT_PPI    27
477 #define GUEST_TIMER_PHYS_S_PPI  29
478 #define GUEST_TIMER_PHYS_NS_PPI 30
479 #define GUEST_EVTCHN_PPI        31
480 
481 #define GUEST_VPL011_SPI        32
482 
483 #define GUEST_VIRTIO_MMIO_SPI_FIRST   33
484 #define GUEST_VIRTIO_MMIO_SPI_LAST    43
485 
486 /* PSCI functions */
487 #define PSCI_cpu_suspend 0
488 #define PSCI_cpu_off     1
489 #define PSCI_cpu_on      2
490 #define PSCI_migrate     3
491 
492 #endif
493 
494 #ifndef __ASSEMBLY__
495 /* Stub definition of PMU structure */
496 typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t;
497 #endif
498 
499 #endif /*  __XEN_PUBLIC_ARCH_ARM_H__ */
500 
501 /*
502  * Local variables:
503  * mode: C
504  * c-file-style: "BSD"
505  * c-basic-offset: 4
506  * tab-width: 4
507  * indent-tabs-mode: nil
508  * End:
509  */
510