1050c2ea0SPeter Maydell /*
2050c2ea0SPeter Maydell  * ARM CMSDK APB watchdog emulation
3050c2ea0SPeter Maydell  *
4050c2ea0SPeter Maydell  * Copyright (c) 2018 Linaro Limited
5050c2ea0SPeter Maydell  * Written by Peter Maydell
6050c2ea0SPeter Maydell  *
7050c2ea0SPeter Maydell  *  This program is free software; you can redistribute it and/or modify
8050c2ea0SPeter Maydell  *  it under the terms of the GNU General Public License version 2 or
9050c2ea0SPeter Maydell  *  (at your option) any later version.
10050c2ea0SPeter Maydell  */
11050c2ea0SPeter Maydell 
12050c2ea0SPeter Maydell /*
13050c2ea0SPeter Maydell  * This is a model of the "APB watchdog" which is part of the Cortex-M
14050c2ea0SPeter Maydell  * System Design Kit (CMSDK) and documented in the Cortex-M System
15050c2ea0SPeter Maydell  * Design Kit Technical Reference Manual (ARM DDI0479C):
16050c2ea0SPeter Maydell  * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit
17050c2ea0SPeter Maydell  *
18050c2ea0SPeter Maydell  * QEMU interface:
19050c2ea0SPeter Maydell  *  + QOM property "wdogclk-frq": frequency at which the watchdog is clocked
20050c2ea0SPeter Maydell  *  + sysbus MMIO region 0: the register bank
21050c2ea0SPeter Maydell  *  + sysbus IRQ 0: watchdog interrupt
22050c2ea0SPeter Maydell  *
23050c2ea0SPeter Maydell  * In real hardware the watchdog's reset output is just a GPIO line
24050c2ea0SPeter Maydell  * which can then be masked by the board or treated as a simple interrupt.
25050c2ea0SPeter Maydell  * (For instance the IoTKit does this with the non-secure watchdog, so that
26050c2ea0SPeter Maydell  * secure code can control whether non-secure code can perform a system
27050c2ea0SPeter Maydell  * reset via its watchdog.) In QEMU, we just wire up the watchdog reset
28050c2ea0SPeter Maydell  * to watchdog_perform_action(), at least for the moment.
29050c2ea0SPeter Maydell  */
30050c2ea0SPeter Maydell 
31050c2ea0SPeter Maydell #ifndef CMSDK_APB_WATCHDOG_H
32050c2ea0SPeter Maydell #define CMSDK_APB_WATCHDOG_H
33050c2ea0SPeter Maydell 
34050c2ea0SPeter Maydell #include "hw/sysbus.h"
35050c2ea0SPeter Maydell #include "hw/ptimer.h"
36db1015e9SEduardo Habkost #include "qom/object.h"
37050c2ea0SPeter Maydell 
38050c2ea0SPeter Maydell #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog"
39*8063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBWatchdog, CMSDK_APB_WATCHDOG)
40050c2ea0SPeter Maydell 
41566528f8SMichel Heily /*
42566528f8SMichel Heily  * This shares the same struct (and cast macro) as the base
43566528f8SMichel Heily  * cmsdk-apb-watchdog device.
44566528f8SMichel Heily  */
45566528f8SMichel Heily #define TYPE_LUMINARY_WATCHDOG "luminary-watchdog"
46566528f8SMichel Heily 
47db1015e9SEduardo Habkost struct CMSDKAPBWatchdog {
48050c2ea0SPeter Maydell     /*< private >*/
49050c2ea0SPeter Maydell     SysBusDevice parent_obj;
50050c2ea0SPeter Maydell 
51050c2ea0SPeter Maydell     /*< public >*/
52050c2ea0SPeter Maydell     MemoryRegion iomem;
53050c2ea0SPeter Maydell     qemu_irq wdogint;
54050c2ea0SPeter Maydell     uint32_t wdogclk_frq;
55566528f8SMichel Heily     bool is_luminary;
56050c2ea0SPeter Maydell     struct ptimer_state *timer;
57050c2ea0SPeter Maydell 
58050c2ea0SPeter Maydell     uint32_t control;
59050c2ea0SPeter Maydell     uint32_t intstatus;
60050c2ea0SPeter Maydell     uint32_t lock;
61050c2ea0SPeter Maydell     uint32_t itcr;
62050c2ea0SPeter Maydell     uint32_t itop;
63050c2ea0SPeter Maydell     uint32_t resetstatus;
64566528f8SMichel Heily     const uint32_t *id;
65db1015e9SEduardo Habkost };
66050c2ea0SPeter Maydell 
67050c2ea0SPeter Maydell #endif
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