1*050c2ea0SPeter Maydell /* 2*050c2ea0SPeter Maydell * ARM CMSDK APB watchdog emulation 3*050c2ea0SPeter Maydell * 4*050c2ea0SPeter Maydell * Copyright (c) 2018 Linaro Limited 5*050c2ea0SPeter Maydell * Written by Peter Maydell 6*050c2ea0SPeter Maydell * 7*050c2ea0SPeter Maydell * This program is free software; you can redistribute it and/or modify 8*050c2ea0SPeter Maydell * it under the terms of the GNU General Public License version 2 or 9*050c2ea0SPeter Maydell * (at your option) any later version. 10*050c2ea0SPeter Maydell */ 11*050c2ea0SPeter Maydell 12*050c2ea0SPeter Maydell /* 13*050c2ea0SPeter Maydell * This is a model of the "APB watchdog" which is part of the Cortex-M 14*050c2ea0SPeter Maydell * System Design Kit (CMSDK) and documented in the Cortex-M System 15*050c2ea0SPeter Maydell * Design Kit Technical Reference Manual (ARM DDI0479C): 16*050c2ea0SPeter Maydell * https://developer.arm.com/products/system-design/system-design-kits/cortex-m-system-design-kit 17*050c2ea0SPeter Maydell * 18*050c2ea0SPeter Maydell * QEMU interface: 19*050c2ea0SPeter Maydell * + QOM property "wdogclk-frq": frequency at which the watchdog is clocked 20*050c2ea0SPeter Maydell * + sysbus MMIO region 0: the register bank 21*050c2ea0SPeter Maydell * + sysbus IRQ 0: watchdog interrupt 22*050c2ea0SPeter Maydell * 23*050c2ea0SPeter Maydell * In real hardware the watchdog's reset output is just a GPIO line 24*050c2ea0SPeter Maydell * which can then be masked by the board or treated as a simple interrupt. 25*050c2ea0SPeter Maydell * (For instance the IoTKit does this with the non-secure watchdog, so that 26*050c2ea0SPeter Maydell * secure code can control whether non-secure code can perform a system 27*050c2ea0SPeter Maydell * reset via its watchdog.) In QEMU, we just wire up the watchdog reset 28*050c2ea0SPeter Maydell * to watchdog_perform_action(), at least for the moment. 29*050c2ea0SPeter Maydell */ 30*050c2ea0SPeter Maydell 31*050c2ea0SPeter Maydell #ifndef CMSDK_APB_WATCHDOG_H 32*050c2ea0SPeter Maydell #define CMSDK_APB_WATCHDOG_H 33*050c2ea0SPeter Maydell 34*050c2ea0SPeter Maydell #include "hw/sysbus.h" 35*050c2ea0SPeter Maydell #include "hw/ptimer.h" 36*050c2ea0SPeter Maydell 37*050c2ea0SPeter Maydell #define TYPE_CMSDK_APB_WATCHDOG "cmsdk-apb-watchdog" 38*050c2ea0SPeter Maydell #define CMSDK_APB_WATCHDOG(obj) OBJECT_CHECK(CMSDKAPBWatchdog, (obj), \ 39*050c2ea0SPeter Maydell TYPE_CMSDK_APB_WATCHDOG) 40*050c2ea0SPeter Maydell 41*050c2ea0SPeter Maydell typedef struct CMSDKAPBWatchdog { 42*050c2ea0SPeter Maydell /*< private >*/ 43*050c2ea0SPeter Maydell SysBusDevice parent_obj; 44*050c2ea0SPeter Maydell 45*050c2ea0SPeter Maydell /*< public >*/ 46*050c2ea0SPeter Maydell MemoryRegion iomem; 47*050c2ea0SPeter Maydell qemu_irq wdogint; 48*050c2ea0SPeter Maydell uint32_t wdogclk_frq; 49*050c2ea0SPeter Maydell struct ptimer_state *timer; 50*050c2ea0SPeter Maydell 51*050c2ea0SPeter Maydell uint32_t control; 52*050c2ea0SPeter Maydell uint32_t intstatus; 53*050c2ea0SPeter Maydell uint32_t lock; 54*050c2ea0SPeter Maydell uint32_t itcr; 55*050c2ea0SPeter Maydell uint32_t itop; 56*050c2ea0SPeter Maydell uint32_t resetstatus; 57*050c2ea0SPeter Maydell } CMSDKAPBWatchdog; 58*050c2ea0SPeter Maydell 59*050c2ea0SPeter Maydell #endif 60