1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #ifndef HW_VIRTIO_GPU_H 15 #define HW_VIRTIO_GPU_H 16 17 #include "qemu/queue.h" 18 #include "ui/qemu-pixman.h" 19 #include "ui/console.h" 20 #include "hw/virtio/virtio.h" 21 #include "qemu/log.h" 22 #include "sysemu/vhost-user-backend.h" 23 24 #include "standard-headers/linux/virtio_gpu.h" 25 #include "standard-headers/linux/virtio_ids.h" 26 #include "qom/object.h" 27 28 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" 29 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass, 30 VIRTIO_GPU_BASE) 31 32 #define TYPE_VIRTIO_GPU "virtio-gpu-device" 33 OBJECT_DECLARE_TYPE(VirtIOGPU, VirtIOGPUClass, VIRTIO_GPU) 34 35 #define TYPE_VIRTIO_GPU_GL "virtio-gpu-gl-device" 36 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL, VIRTIO_GPU_GL) 37 38 #define TYPE_VHOST_USER_GPU "vhost-user-gpu" 39 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU) 40 41 struct virtio_gpu_simple_resource { 42 uint32_t resource_id; 43 uint32_t width; 44 uint32_t height; 45 uint32_t format; 46 uint64_t *addrs; 47 struct iovec *iov; 48 unsigned int iov_cnt; 49 uint32_t scanout_bitmask; 50 pixman_image_t *image; 51 #ifdef WIN32 52 HANDLE handle; 53 #endif 54 uint64_t hostmem; 55 56 uint64_t blob_size; 57 void *blob; 58 int dmabuf_fd; 59 uint8_t *remapped; 60 61 QTAILQ_ENTRY(virtio_gpu_simple_resource) next; 62 }; 63 64 struct virtio_gpu_framebuffer { 65 pixman_format_code_t format; 66 uint32_t bytes_pp; 67 uint32_t width, height; 68 uint32_t stride; 69 uint32_t offset; 70 }; 71 72 struct virtio_gpu_scanout { 73 QemuConsole *con; 74 DisplaySurface *ds; 75 uint32_t width, height; 76 int x, y; 77 int invalidate; 78 uint32_t resource_id; 79 struct virtio_gpu_update_cursor cursor; 80 QEMUCursor *current_cursor; 81 }; 82 83 struct virtio_gpu_requested_state { 84 uint16_t width_mm, height_mm; 85 uint32_t width, height; 86 uint32_t refresh_rate; 87 int x, y; 88 }; 89 90 enum virtio_gpu_base_conf_flags { 91 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1, 92 VIRTIO_GPU_FLAG_STATS_ENABLED, 93 VIRTIO_GPU_FLAG_EDID_ENABLED, 94 VIRTIO_GPU_FLAG_DMABUF_ENABLED, 95 VIRTIO_GPU_FLAG_BLOB_ENABLED, 96 }; 97 98 #define virtio_gpu_virgl_enabled(_cfg) \ 99 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED)) 100 #define virtio_gpu_stats_enabled(_cfg) \ 101 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED)) 102 #define virtio_gpu_edid_enabled(_cfg) \ 103 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED)) 104 #define virtio_gpu_dmabuf_enabled(_cfg) \ 105 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) 106 #define virtio_gpu_blob_enabled(_cfg) \ 107 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) 108 109 struct virtio_gpu_base_conf { 110 uint32_t max_outputs; 111 uint32_t flags; 112 uint32_t xres; 113 uint32_t yres; 114 }; 115 116 struct virtio_gpu_ctrl_command { 117 VirtQueueElement elem; 118 VirtQueue *vq; 119 struct virtio_gpu_ctrl_hdr cmd_hdr; 120 uint32_t error; 121 bool finished; 122 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; 123 }; 124 125 struct VirtIOGPUBase { 126 VirtIODevice parent_obj; 127 128 Error *migration_blocker; 129 130 struct virtio_gpu_base_conf conf; 131 struct virtio_gpu_config virtio_config; 132 const GraphicHwOps *hw_ops; 133 134 int renderer_blocked; 135 int enable; 136 137 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; 138 139 int enabled_output_bitmask; 140 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; 141 }; 142 143 struct VirtIOGPUBaseClass { 144 VirtioDeviceClass parent; 145 146 void (*gl_flushed)(VirtIOGPUBase *g); 147 }; 148 149 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ 150 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ 151 DEFINE_PROP_BIT("edid", _state, _conf.flags, \ 152 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \ 153 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1280), \ 154 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 800) 155 156 typedef struct VGPUDMABuf { 157 QemuDmaBuf buf; 158 uint32_t scanout_id; 159 QTAILQ_ENTRY(VGPUDMABuf) next; 160 } VGPUDMABuf; 161 162 struct VirtIOGPU { 163 VirtIOGPUBase parent_obj; 164 165 uint64_t conf_max_hostmem; 166 167 VirtQueue *ctrl_vq; 168 VirtQueue *cursor_vq; 169 170 QEMUBH *ctrl_bh; 171 QEMUBH *cursor_bh; 172 QEMUBH *reset_bh; 173 QemuCond reset_cond; 174 bool reset_finished; 175 176 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist; 177 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq; 178 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq; 179 180 uint64_t hostmem; 181 182 bool processing_cmdq; 183 QEMUTimer *fence_poll; 184 QEMUTimer *print_stats; 185 186 uint32_t inflight; 187 struct { 188 uint32_t max_inflight; 189 uint32_t requests; 190 uint32_t req_3d; 191 uint32_t bytes_3d; 192 } stats; 193 194 struct { 195 QTAILQ_HEAD(, VGPUDMABuf) bufs; 196 VGPUDMABuf *primary[VIRTIO_GPU_MAX_SCANOUTS]; 197 } dmabuf; 198 }; 199 200 struct VirtIOGPUClass { 201 VirtIOGPUBaseClass parent; 202 203 void (*handle_ctrl)(VirtIODevice *vdev, VirtQueue *vq); 204 void (*process_cmd)(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); 205 void (*update_cursor_data)(VirtIOGPU *g, 206 struct virtio_gpu_scanout *s, 207 uint32_t resource_id); 208 }; 209 210 struct VirtIOGPUGL { 211 struct VirtIOGPU parent_obj; 212 213 bool renderer_inited; 214 bool renderer_reset; 215 }; 216 217 struct VhostUserGPU { 218 VirtIOGPUBase parent_obj; 219 220 VhostUserBackend *vhost; 221 int vhost_gpu_fd; /* closed by the chardev */ 222 CharBackend vhost_chr; 223 QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS]; 224 bool backend_blocked; 225 }; 226 227 #define VIRTIO_GPU_FILL_CMD(out) do { \ 228 size_t s; \ 229 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \ 230 &out, sizeof(out)); \ 231 if (s != sizeof(out)) { \ 232 qemu_log_mask(LOG_GUEST_ERROR, \ 233 "%s: command size incorrect %zu vs %zu\n", \ 234 __func__, s, sizeof(out)); \ 235 return; \ 236 } \ 237 } while (0) 238 239 /* virtio-gpu-base.c */ 240 bool virtio_gpu_base_device_realize(DeviceState *qdev, 241 VirtIOHandleOutput ctrl_cb, 242 VirtIOHandleOutput cursor_cb, 243 Error **errp); 244 void virtio_gpu_base_device_unrealize(DeviceState *qdev); 245 void virtio_gpu_base_reset(VirtIOGPUBase *g); 246 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, 247 struct virtio_gpu_resp_display_info *dpy_info); 248 249 void virtio_gpu_base_generate_edid(VirtIOGPUBase *g, int scanout, 250 struct virtio_gpu_resp_edid *edid); 251 /* virtio-gpu.c */ 252 void virtio_gpu_ctrl_response(VirtIOGPU *g, 253 struct virtio_gpu_ctrl_command *cmd, 254 struct virtio_gpu_ctrl_hdr *resp, 255 size_t resp_len); 256 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 257 struct virtio_gpu_ctrl_command *cmd, 258 enum virtio_gpu_ctrl_type type); 259 void virtio_gpu_get_display_info(VirtIOGPU *g, 260 struct virtio_gpu_ctrl_command *cmd); 261 void virtio_gpu_get_edid(VirtIOGPU *g, 262 struct virtio_gpu_ctrl_command *cmd); 263 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 264 uint32_t nr_entries, uint32_t offset, 265 struct virtio_gpu_ctrl_command *cmd, 266 uint64_t **addr, struct iovec **iov, 267 uint32_t *niov); 268 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 269 struct iovec *iov, uint32_t count); 270 void virtio_gpu_process_cmdq(VirtIOGPU *g); 271 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp); 272 void virtio_gpu_reset(VirtIODevice *vdev); 273 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd); 274 void virtio_gpu_update_cursor_data(VirtIOGPU *g, 275 struct virtio_gpu_scanout *s, 276 uint32_t resource_id); 277 278 /* virtio-gpu-udmabuf.c */ 279 bool virtio_gpu_have_udmabuf(void); 280 void virtio_gpu_init_udmabuf(struct virtio_gpu_simple_resource *res); 281 void virtio_gpu_fini_udmabuf(struct virtio_gpu_simple_resource *res); 282 int virtio_gpu_update_dmabuf(VirtIOGPU *g, 283 uint32_t scanout_id, 284 struct virtio_gpu_simple_resource *res, 285 struct virtio_gpu_framebuffer *fb, 286 struct virtio_gpu_rect *r); 287 288 /* virtio-gpu-3d.c */ 289 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 290 struct virtio_gpu_ctrl_command *cmd); 291 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); 292 void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); 293 void virtio_gpu_virgl_reset(VirtIOGPU *g); 294 int virtio_gpu_virgl_init(VirtIOGPU *g); 295 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); 296 297 #endif 298