1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #ifndef HW_VIRTIO_GPU_H 15 #define HW_VIRTIO_GPU_H 16 17 #include "qemu/queue.h" 18 #include "ui/qemu-pixman.h" 19 #include "ui/console.h" 20 #include "hw/virtio/virtio.h" 21 #include "hw/pci/pci.h" 22 #include "qemu/log.h" 23 24 #include "standard-headers/linux/virtio_gpu.h" 25 #define TYPE_VIRTIO_GPU "virtio-gpu-device" 26 #define VIRTIO_GPU(obj) \ 27 OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU) 28 29 #define VIRTIO_ID_GPU 16 30 31 struct virtio_gpu_simple_resource { 32 uint32_t resource_id; 33 uint32_t width; 34 uint32_t height; 35 uint32_t format; 36 uint64_t *addrs; 37 struct iovec *iov; 38 unsigned int iov_cnt; 39 uint32_t scanout_bitmask; 40 pixman_image_t *image; 41 uint64_t hostmem; 42 QTAILQ_ENTRY(virtio_gpu_simple_resource) next; 43 }; 44 45 struct virtio_gpu_scanout { 46 QemuConsole *con; 47 DisplaySurface *ds; 48 uint32_t width, height; 49 int x, y; 50 int invalidate; 51 uint32_t resource_id; 52 struct virtio_gpu_update_cursor cursor; 53 QEMUCursor *current_cursor; 54 }; 55 56 struct virtio_gpu_requested_state { 57 uint32_t width, height; 58 int x, y; 59 }; 60 61 enum virtio_gpu_conf_flags { 62 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1, 63 VIRTIO_GPU_FLAG_STATS_ENABLED, 64 }; 65 66 #define virtio_gpu_virgl_enabled(_cfg) \ 67 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED)) 68 #define virtio_gpu_stats_enabled(_cfg) \ 69 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED)) 70 71 struct virtio_gpu_conf { 72 uint64_t max_hostmem; 73 uint32_t max_outputs; 74 uint32_t flags; 75 uint32_t xres; 76 uint32_t yres; 77 }; 78 79 struct virtio_gpu_ctrl_command { 80 VirtQueueElement elem; 81 VirtQueue *vq; 82 struct virtio_gpu_ctrl_hdr cmd_hdr; 83 uint32_t error; 84 bool waiting; 85 bool finished; 86 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; 87 }; 88 89 typedef struct VirtIOGPU { 90 VirtIODevice parent_obj; 91 92 QEMUBH *ctrl_bh; 93 QEMUBH *cursor_bh; 94 VirtQueue *ctrl_vq; 95 VirtQueue *cursor_vq; 96 97 int enable; 98 99 int config_size; 100 DeviceState *qdev; 101 102 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist; 103 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq; 104 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq; 105 106 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; 107 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; 108 109 struct virtio_gpu_conf conf; 110 uint64_t hostmem; 111 int enabled_output_bitmask; 112 struct virtio_gpu_config virtio_config; 113 114 bool use_virgl_renderer; 115 bool renderer_inited; 116 int renderer_blocked; 117 QEMUTimer *fence_poll; 118 QEMUTimer *print_stats; 119 120 uint32_t inflight; 121 struct { 122 uint32_t max_inflight; 123 uint32_t requests; 124 uint32_t req_3d; 125 uint32_t bytes_3d; 126 } stats; 127 128 Error *migration_blocker; 129 } VirtIOGPU; 130 131 extern const GraphicHwOps virtio_gpu_ops; 132 133 /* to share between PCI and VGA */ 134 #define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state) \ 135 DEFINE_PROP_BIT("ioeventfd", _state, flags, \ 136 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \ 137 DEFINE_PROP_UINT32("vectors", _state, nvectors, 3) 138 139 #define VIRTIO_GPU_FILL_CMD(out) do { \ 140 size_t s; \ 141 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \ 142 &out, sizeof(out)); \ 143 if (s != sizeof(out)) { \ 144 qemu_log_mask(LOG_GUEST_ERROR, \ 145 "%s: command size incorrect %zu vs %zu\n", \ 146 __func__, s, sizeof(out)); \ 147 return; \ 148 } \ 149 } while (0) 150 151 /* virtio-gpu.c */ 152 void virtio_gpu_ctrl_response(VirtIOGPU *g, 153 struct virtio_gpu_ctrl_command *cmd, 154 struct virtio_gpu_ctrl_hdr *resp, 155 size_t resp_len); 156 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 157 struct virtio_gpu_ctrl_command *cmd, 158 enum virtio_gpu_ctrl_type type); 159 void virtio_gpu_get_display_info(VirtIOGPU *g, 160 struct virtio_gpu_ctrl_command *cmd); 161 int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab, 162 struct virtio_gpu_ctrl_command *cmd, 163 uint64_t **addr, struct iovec **iov); 164 void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count); 165 void virtio_gpu_process_cmdq(VirtIOGPU *g); 166 167 /* virtio-gpu-3d.c */ 168 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 169 struct virtio_gpu_ctrl_command *cmd); 170 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); 171 void virtio_gpu_virgl_reset(VirtIOGPU *g); 172 void virtio_gpu_gl_block(void *opaque, bool block); 173 int virtio_gpu_virgl_init(VirtIOGPU *g); 174 175 #endif 176