1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #ifndef HW_VIRTIO_GPU_H 15 #define HW_VIRTIO_GPU_H 16 17 #include "qemu/queue.h" 18 #include "ui/qemu-pixman.h" 19 #include "ui/console.h" 20 #include "hw/virtio/virtio.h" 21 #include "qemu/log.h" 22 #include "sysemu/vhost-user-backend.h" 23 24 #include "standard-headers/linux/virtio_gpu.h" 25 #include "qom/object.h" 26 27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" 28 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass, 29 VIRTIO_GPU_BASE) 30 31 #define TYPE_VIRTIO_GPU "virtio-gpu-device" 32 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPU, VIRTIO_GPU) 33 34 #define TYPE_VHOST_USER_GPU "vhost-user-gpu" 35 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU) 36 37 #define VIRTIO_ID_GPU 16 38 39 struct virtio_gpu_simple_resource { 40 uint32_t resource_id; 41 uint32_t width; 42 uint32_t height; 43 uint32_t format; 44 uint64_t *addrs; 45 struct iovec *iov; 46 unsigned int iov_cnt; 47 uint32_t scanout_bitmask; 48 pixman_image_t *image; 49 uint64_t hostmem; 50 QTAILQ_ENTRY(virtio_gpu_simple_resource) next; 51 }; 52 53 struct virtio_gpu_scanout { 54 QemuConsole *con; 55 DisplaySurface *ds; 56 uint32_t width, height; 57 int x, y; 58 int invalidate; 59 uint32_t resource_id; 60 struct virtio_gpu_update_cursor cursor; 61 QEMUCursor *current_cursor; 62 }; 63 64 struct virtio_gpu_requested_state { 65 uint16_t width_mm, height_mm; 66 uint32_t width, height; 67 int x, y; 68 }; 69 70 enum virtio_gpu_base_conf_flags { 71 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1, 72 VIRTIO_GPU_FLAG_STATS_ENABLED, 73 VIRTIO_GPU_FLAG_EDID_ENABLED, 74 }; 75 76 #define virtio_gpu_virgl_enabled(_cfg) \ 77 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED)) 78 #define virtio_gpu_stats_enabled(_cfg) \ 79 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED)) 80 #define virtio_gpu_edid_enabled(_cfg) \ 81 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED)) 82 83 struct virtio_gpu_base_conf { 84 uint32_t max_outputs; 85 uint32_t flags; 86 uint32_t xres; 87 uint32_t yres; 88 }; 89 90 struct virtio_gpu_ctrl_command { 91 VirtQueueElement elem; 92 VirtQueue *vq; 93 struct virtio_gpu_ctrl_hdr cmd_hdr; 94 uint32_t error; 95 bool finished; 96 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; 97 }; 98 99 struct VirtIOGPUBase { 100 VirtIODevice parent_obj; 101 102 Error *migration_blocker; 103 104 struct virtio_gpu_base_conf conf; 105 struct virtio_gpu_config virtio_config; 106 const GraphicHwOps *hw_ops; 107 108 bool use_virgl_renderer; 109 int renderer_blocked; 110 int enable; 111 112 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; 113 114 int enabled_output_bitmask; 115 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; 116 }; 117 118 struct VirtIOGPUBaseClass { 119 VirtioDeviceClass parent; 120 121 void (*gl_unblock)(VirtIOGPUBase *g); 122 }; 123 124 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ 125 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ 126 DEFINE_PROP_BIT("edid", _state, _conf.flags, \ 127 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \ 128 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \ 129 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768) 130 131 struct VirtIOGPU { 132 VirtIOGPUBase parent_obj; 133 134 uint64_t conf_max_hostmem; 135 136 VirtQueue *ctrl_vq; 137 VirtQueue *cursor_vq; 138 139 QEMUBH *ctrl_bh; 140 QEMUBH *cursor_bh; 141 142 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist; 143 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq; 144 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq; 145 146 uint64_t hostmem; 147 148 bool renderer_inited; 149 bool renderer_reset; 150 QEMUTimer *fence_poll; 151 QEMUTimer *print_stats; 152 153 uint32_t inflight; 154 struct { 155 uint32_t max_inflight; 156 uint32_t requests; 157 uint32_t req_3d; 158 uint32_t bytes_3d; 159 } stats; 160 }; 161 162 struct VhostUserGPU { 163 VirtIOGPUBase parent_obj; 164 165 VhostUserBackend *vhost; 166 int vhost_gpu_fd; /* closed by the chardev */ 167 CharBackend vhost_chr; 168 QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS]; 169 bool backend_blocked; 170 }; 171 172 #define VIRTIO_GPU_FILL_CMD(out) do { \ 173 size_t s; \ 174 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \ 175 &out, sizeof(out)); \ 176 if (s != sizeof(out)) { \ 177 qemu_log_mask(LOG_GUEST_ERROR, \ 178 "%s: command size incorrect %zu vs %zu\n", \ 179 __func__, s, sizeof(out)); \ 180 return; \ 181 } \ 182 } while (0) 183 184 /* virtio-gpu-base.c */ 185 bool virtio_gpu_base_device_realize(DeviceState *qdev, 186 VirtIOHandleOutput ctrl_cb, 187 VirtIOHandleOutput cursor_cb, 188 Error **errp); 189 void virtio_gpu_base_reset(VirtIOGPUBase *g); 190 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, 191 struct virtio_gpu_resp_display_info *dpy_info); 192 193 /* virtio-gpu.c */ 194 void virtio_gpu_ctrl_response(VirtIOGPU *g, 195 struct virtio_gpu_ctrl_command *cmd, 196 struct virtio_gpu_ctrl_hdr *resp, 197 size_t resp_len); 198 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 199 struct virtio_gpu_ctrl_command *cmd, 200 enum virtio_gpu_ctrl_type type); 201 void virtio_gpu_get_display_info(VirtIOGPU *g, 202 struct virtio_gpu_ctrl_command *cmd); 203 void virtio_gpu_get_edid(VirtIOGPU *g, 204 struct virtio_gpu_ctrl_command *cmd); 205 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 206 struct virtio_gpu_resource_attach_backing *ab, 207 struct virtio_gpu_ctrl_command *cmd, 208 uint64_t **addr, struct iovec **iov); 209 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 210 struct iovec *iov, uint32_t count); 211 void virtio_gpu_process_cmdq(VirtIOGPU *g); 212 213 /* virtio-gpu-3d.c */ 214 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 215 struct virtio_gpu_ctrl_command *cmd); 216 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); 217 void virtio_gpu_virgl_reset(VirtIOGPU *g); 218 int virtio_gpu_virgl_init(VirtIOGPU *g); 219 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); 220 221 #endif 222