1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #ifndef HW_VIRTIO_GPU_H 15 #define HW_VIRTIO_GPU_H 16 17 #include "qemu/queue.h" 18 #include "ui/qemu-pixman.h" 19 #include "ui/console.h" 20 #include "hw/virtio/virtio.h" 21 #include "qemu/log.h" 22 #include "sysemu/vhost-user-backend.h" 23 24 #include "standard-headers/linux/virtio_gpu.h" 25 #include "qom/object.h" 26 27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base" 28 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass, 29 virtio_gpu_base, VIRTIO_GPU_BASE) 30 31 #define TYPE_VIRTIO_GPU "virtio-gpu-device" 32 typedef struct VirtIOGPU VirtIOGPU; 33 DECLARE_INSTANCE_CHECKER(VirtIOGPU, VIRTIO_GPU, 34 TYPE_VIRTIO_GPU) 35 36 #define TYPE_VHOST_USER_GPU "vhost-user-gpu" 37 typedef struct VhostUserGPU VhostUserGPU; 38 DECLARE_INSTANCE_CHECKER(VhostUserGPU, VHOST_USER_GPU, 39 TYPE_VHOST_USER_GPU) 40 41 #define VIRTIO_ID_GPU 16 42 43 struct virtio_gpu_simple_resource { 44 uint32_t resource_id; 45 uint32_t width; 46 uint32_t height; 47 uint32_t format; 48 uint64_t *addrs; 49 struct iovec *iov; 50 unsigned int iov_cnt; 51 uint32_t scanout_bitmask; 52 pixman_image_t *image; 53 uint64_t hostmem; 54 QTAILQ_ENTRY(virtio_gpu_simple_resource) next; 55 }; 56 57 struct virtio_gpu_scanout { 58 QemuConsole *con; 59 DisplaySurface *ds; 60 uint32_t width, height; 61 int x, y; 62 int invalidate; 63 uint32_t resource_id; 64 struct virtio_gpu_update_cursor cursor; 65 QEMUCursor *current_cursor; 66 }; 67 68 struct virtio_gpu_requested_state { 69 uint32_t width, height; 70 int x, y; 71 }; 72 73 enum virtio_gpu_base_conf_flags { 74 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1, 75 VIRTIO_GPU_FLAG_STATS_ENABLED, 76 VIRTIO_GPU_FLAG_EDID_ENABLED, 77 }; 78 79 #define virtio_gpu_virgl_enabled(_cfg) \ 80 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED)) 81 #define virtio_gpu_stats_enabled(_cfg) \ 82 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED)) 83 #define virtio_gpu_edid_enabled(_cfg) \ 84 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED)) 85 86 struct virtio_gpu_base_conf { 87 uint32_t max_outputs; 88 uint32_t flags; 89 uint32_t xres; 90 uint32_t yres; 91 }; 92 93 struct virtio_gpu_ctrl_command { 94 VirtQueueElement elem; 95 VirtQueue *vq; 96 struct virtio_gpu_ctrl_hdr cmd_hdr; 97 uint32_t error; 98 bool finished; 99 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; 100 }; 101 102 struct VirtIOGPUBase { 103 VirtIODevice parent_obj; 104 105 Error *migration_blocker; 106 107 struct virtio_gpu_base_conf conf; 108 struct virtio_gpu_config virtio_config; 109 const GraphicHwOps *hw_ops; 110 111 bool use_virgl_renderer; 112 int renderer_blocked; 113 int enable; 114 115 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; 116 117 int enabled_output_bitmask; 118 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; 119 }; 120 121 struct VirtIOGPUBaseClass { 122 VirtioDeviceClass parent; 123 124 void (*gl_unblock)(VirtIOGPUBase *g); 125 }; 126 127 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \ 128 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \ 129 DEFINE_PROP_BIT("edid", _state, _conf.flags, \ 130 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \ 131 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \ 132 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768) 133 134 struct VirtIOGPU { 135 VirtIOGPUBase parent_obj; 136 137 uint64_t conf_max_hostmem; 138 139 VirtQueue *ctrl_vq; 140 VirtQueue *cursor_vq; 141 142 QEMUBH *ctrl_bh; 143 QEMUBH *cursor_bh; 144 145 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist; 146 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq; 147 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq; 148 149 uint64_t hostmem; 150 151 bool renderer_inited; 152 bool renderer_reset; 153 QEMUTimer *fence_poll; 154 QEMUTimer *print_stats; 155 156 uint32_t inflight; 157 struct { 158 uint32_t max_inflight; 159 uint32_t requests; 160 uint32_t req_3d; 161 uint32_t bytes_3d; 162 } stats; 163 }; 164 165 struct VhostUserGPU { 166 VirtIOGPUBase parent_obj; 167 168 VhostUserBackend *vhost; 169 int vhost_gpu_fd; /* closed by the chardev */ 170 CharBackend vhost_chr; 171 QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS]; 172 bool backend_blocked; 173 }; 174 175 #define VIRTIO_GPU_FILL_CMD(out) do { \ 176 size_t s; \ 177 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \ 178 &out, sizeof(out)); \ 179 if (s != sizeof(out)) { \ 180 qemu_log_mask(LOG_GUEST_ERROR, \ 181 "%s: command size incorrect %zu vs %zu\n", \ 182 __func__, s, sizeof(out)); \ 183 return; \ 184 } \ 185 } while (0) 186 187 /* virtio-gpu-base.c */ 188 bool virtio_gpu_base_device_realize(DeviceState *qdev, 189 VirtIOHandleOutput ctrl_cb, 190 VirtIOHandleOutput cursor_cb, 191 Error **errp); 192 void virtio_gpu_base_reset(VirtIOGPUBase *g); 193 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, 194 struct virtio_gpu_resp_display_info *dpy_info); 195 196 /* virtio-gpu.c */ 197 void virtio_gpu_ctrl_response(VirtIOGPU *g, 198 struct virtio_gpu_ctrl_command *cmd, 199 struct virtio_gpu_ctrl_hdr *resp, 200 size_t resp_len); 201 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 202 struct virtio_gpu_ctrl_command *cmd, 203 enum virtio_gpu_ctrl_type type); 204 void virtio_gpu_get_display_info(VirtIOGPU *g, 205 struct virtio_gpu_ctrl_command *cmd); 206 void virtio_gpu_get_edid(VirtIOGPU *g, 207 struct virtio_gpu_ctrl_command *cmd); 208 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 209 struct virtio_gpu_resource_attach_backing *ab, 210 struct virtio_gpu_ctrl_command *cmd, 211 uint64_t **addr, struct iovec **iov); 212 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 213 struct iovec *iov, uint32_t count); 214 void virtio_gpu_process_cmdq(VirtIOGPU *g); 215 216 /* virtio-gpu-3d.c */ 217 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 218 struct virtio_gpu_ctrl_command *cmd); 219 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); 220 void virtio_gpu_virgl_reset(VirtIOGPU *g); 221 int virtio_gpu_virgl_init(VirtIOGPU *g); 222 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); 223 224 #endif 225