xref: /openbmc/qemu/include/hw/timer/mss-timer.h (revision a68694cd)
1 /*
2  * Microsemi SmartFusion2 Timer.
3  *
4  * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef HW_MSS_TIMER_H
26 #define HW_MSS_TIMER_H
27 
28 #include "hw/sysbus.h"
29 #include "hw/ptimer.h"
30 #include "qom/object.h"
31 
32 #define TYPE_MSS_TIMER     "mss-timer"
33 typedef struct MSSTimerState MSSTimerState;
34 DECLARE_INSTANCE_CHECKER(MSSTimerState, MSS_TIMER,
35                          TYPE_MSS_TIMER)
36 
37 /*
38  * There are two 32-bit down counting timers.
39  * Timers 1 and 2 can be concatenated into a single 64-bit Timer
40  * that operates either in Periodic mode or in One-shot mode.
41  * Writing 1 to the TIM64_MODE register bit 0 sets the Timers in 64-bit mode.
42  * In 64-bit mode, writing to the 32-bit registers has no effect.
43  * Similarly, in 32-bit mode, writing to the 64-bit mode registers
44  * has no effect. Only two 32-bit timers are supported currently.
45  */
46 #define NUM_TIMERS        2
47 
48 #define R_TIM1_MAX        6
49 
50 struct Msf2Timer {
51     ptimer_state *ptimer;
52 
53     uint32_t regs[R_TIM1_MAX];
54     qemu_irq irq;
55 };
56 
57 struct MSSTimerState {
58     SysBusDevice parent_obj;
59 
60     MemoryRegion mmio;
61     uint32_t freq_hz;
62     struct Msf2Timer timers[NUM_TIMERS];
63 };
64 
65 #endif /* HW_MSS_TIMER_H */
66