1 /* 2 * i.MX GPT Timer 3 * 4 * Copyright (c) 2008 OK Labs 5 * Copyright (c) 2011 NICTA Pty Ltd 6 * Originally written by Hans Jiang 7 * Updated by Peter Chubb 8 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a copy 11 * of this software and associated documentation files (the "Software"), to deal 12 * in the Software without restriction, including without limitation the rights 13 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 14 * copies of the Software, and to permit persons to whom the Software is 15 * furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice shall be included in 18 * all copies or substantial portions of the Software. 19 * 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 26 * THE SOFTWARE. 27 */ 28 29 #ifndef IMX_GPT_H 30 #define IMX_GPT_H 31 32 #include "hw/sysbus.h" 33 #include "hw/ptimer.h" 34 #include "hw/misc/imx_ccm.h" 35 36 /* 37 * GPT : General purpose timer 38 * 39 * This timer counts up continuously while it is enabled, resetting itself 40 * to 0 when it reaches GPT_TIMER_MAX (in freerun mode) or when it 41 * reaches the value of one of the ocrX (in periodic mode). 42 */ 43 44 #define GPT_TIMER_MAX 0XFFFFFFFFUL 45 46 /* Control register. Not all of these bits have any effect (yet) */ 47 #define GPT_CR_EN (1 << 0) /* GPT Enable */ 48 #define GPT_CR_ENMOD (1 << 1) /* GPT Enable Mode */ 49 #define GPT_CR_DBGEN (1 << 2) /* GPT Debug mode enable */ 50 #define GPT_CR_WAITEN (1 << 3) /* GPT Wait Mode Enable */ 51 #define GPT_CR_DOZEN (1 << 4) /* GPT Doze mode enable */ 52 #define GPT_CR_STOPEN (1 << 5) /* GPT Stop Mode Enable */ 53 #define GPT_CR_CLKSRC_SHIFT (6) 54 #define GPT_CR_CLKSRC_MASK (0x7) 55 56 #define GPT_CR_FRR (1 << 9) /* Freerun or Restart */ 57 #define GPT_CR_SWR (1 << 15) /* Software Reset */ 58 #define GPT_CR_IM1 (3 << 16) /* Input capture channel 1 mode (2 bits) */ 59 #define GPT_CR_IM2 (3 << 18) /* Input capture channel 2 mode (2 bits) */ 60 #define GPT_CR_OM1 (7 << 20) /* Output Compare Channel 1 Mode (3 bits) */ 61 #define GPT_CR_OM2 (7 << 23) /* Output Compare Channel 2 Mode (3 bits) */ 62 #define GPT_CR_OM3 (7 << 26) /* Output Compare Channel 3 Mode (3 bits) */ 63 #define GPT_CR_FO1 (1 << 29) /* Force Output Compare Channel 1 */ 64 #define GPT_CR_FO2 (1 << 30) /* Force Output Compare Channel 2 */ 65 #define GPT_CR_FO3 (1 << 31) /* Force Output Compare Channel 3 */ 66 67 #define GPT_SR_OF1 (1 << 0) 68 #define GPT_SR_OF2 (1 << 1) 69 #define GPT_SR_OF3 (1 << 2) 70 #define GPT_SR_ROV (1 << 5) 71 72 #define GPT_IR_OF1IE (1 << 0) 73 #define GPT_IR_OF2IE (1 << 1) 74 #define GPT_IR_OF3IE (1 << 2) 75 #define GPT_IR_ROVIE (1 << 5) 76 77 #define TYPE_IMX25_GPT "imx25.gpt" 78 #define TYPE_IMX31_GPT "imx31.gpt" 79 #define TYPE_IMX6_GPT "imx6.gpt" 80 #define TYPE_IMX7_GPT "imx7.gpt" 81 82 #define TYPE_IMX_GPT TYPE_IMX25_GPT 83 84 #define IMX_GPT(obj) OBJECT_CHECK(IMXGPTState, (obj), TYPE_IMX_GPT) 85 86 typedef struct IMXGPTState{ 87 /*< private >*/ 88 SysBusDevice parent_obj; 89 90 /*< public >*/ 91 ptimer_state *timer; 92 MemoryRegion iomem; 93 IMXCCMState *ccm; 94 95 uint32_t cr; 96 uint32_t pr; 97 uint32_t sr; 98 uint32_t ir; 99 uint32_t ocr1; 100 uint32_t ocr2; 101 uint32_t ocr3; 102 uint32_t icr1; 103 uint32_t icr2; 104 uint32_t cnt; 105 106 uint32_t next_timeout; 107 uint32_t next_int; 108 109 uint32_t freq; 110 111 qemu_irq irq; 112 113 const IMXClk *clocks; 114 } IMXGPTState; 115 116 #endif /* IMX_GPT_H */ 117