xref: /openbmc/qemu/include/hw/timer/i8254_internal.h (revision 6a0acfff)
1 /*
2  * QEMU 8253/8254 - internal interfaces
3  *
4  * Copyright (c) 2011 Jan Kiszka, Siemens AG
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef QEMU_I8254_INTERNAL_H
26 #define QEMU_I8254_INTERNAL_H
27 
28 #include "hw/hw.h"
29 #include "hw/isa/isa.h"
30 #include "hw/timer/i8254.h"
31 #include "qemu/timer.h"
32 
33 typedef struct PITChannelState {
34     int count; /* can be 65536 */
35     uint16_t latched_count;
36     uint8_t count_latched;
37     uint8_t status_latched;
38     uint8_t status;
39     uint8_t read_state;
40     uint8_t write_state;
41     uint8_t write_latch;
42     uint8_t rw_mode;
43     uint8_t mode;
44     uint8_t bcd; /* not supported */
45     uint8_t gate; /* timer start */
46     int64_t count_load_time;
47     /* irq handling */
48     int64_t next_transition_time;
49     QEMUTimer *irq_timer;
50     qemu_irq irq;
51     uint32_t irq_disabled;
52 } PITChannelState;
53 
54 typedef struct PITCommonState {
55     ISADevice dev;
56     MemoryRegion ioports;
57     uint32_t iobase;
58     PITChannelState channels[3];
59 } PITCommonState;
60 
61 typedef struct PITCommonClass {
62     ISADeviceClass parent_class;
63 
64     void (*set_channel_gate)(PITCommonState *s, PITChannelState *sc, int val);
65     void (*get_channel_info)(PITCommonState *s, PITChannelState *sc,
66                              PITChannelInfo *info);
67     void (*pre_save)(PITCommonState *s);
68     void (*post_load)(PITCommonState *s);
69 } PITCommonClass;
70 
71 int pit_get_out(PITChannelState *s, int64_t current_time);
72 int64_t pit_get_next_transition_time(PITChannelState *s, int64_t current_time);
73 void pit_get_channel_info_common(PITCommonState *s, PITChannelState *sc,
74                                  PITChannelInfo *info);
75 void pit_reset_common(PITCommonState *s);
76 
77 #endif /* QEMU_I8254_INTERNAL_H */
78