1 /* 2 * Header file for the Xilinx Zynq SPI controller 3 * 4 * Copyright (C) 2015 Xilinx Inc 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #ifndef XILINX_SPIPS_H 26 #define XILINX_SPIPS_H 27 28 #include "hw/ssi/ssi.h" 29 #include "qemu/fifo32.h" 30 #include "hw/stream.h" 31 32 typedef struct XilinxSPIPS XilinxSPIPS; 33 34 #define XLNX_SPIPS_R_MAX (0x100 / 4) 35 #define XLNX_ZYNQMP_SPIPS_R_MAX (0x830 / 4) 36 37 /* Bite off 4k chunks at a time */ 38 #define LQSPI_CACHE_SIZE 1024 39 40 #define QSPI_DMA_MAX_BURST_SIZE 2048 41 42 typedef enum { 43 READ = 0x3, READ_4 = 0x13, 44 FAST_READ = 0xb, FAST_READ_4 = 0x0c, 45 DOR = 0x3b, DOR_4 = 0x3c, 46 QOR = 0x6b, QOR_4 = 0x6c, 47 DIOR = 0xbb, DIOR_4 = 0xbc, 48 QIOR = 0xeb, QIOR_4 = 0xec, 49 50 PP = 0x2, PP_4 = 0x12, 51 DPP = 0xa2, 52 QPP = 0x32, QPP_4 = 0x34, 53 } FlashCMD; 54 55 struct XilinxSPIPS { 56 SysBusDevice parent_obj; 57 58 MemoryRegion iomem; 59 MemoryRegion mmlqspi; 60 61 qemu_irq irq; 62 int irqline; 63 64 uint8_t num_cs; 65 uint8_t num_busses; 66 67 uint8_t snoop_state; 68 int cmd_dummies; 69 uint8_t link_state; 70 uint8_t link_state_next; 71 uint8_t link_state_next_when; 72 qemu_irq *cs_lines; 73 bool *cs_lines_state; 74 SSIBus **spi; 75 76 Fifo8 rx_fifo; 77 Fifo8 tx_fifo; 78 79 uint8_t num_txrx_bytes; 80 uint32_t rx_discard; 81 82 uint32_t regs[XLNX_SPIPS_R_MAX]; 83 84 bool man_start_com; 85 }; 86 87 typedef struct { 88 XilinxSPIPS parent_obj; 89 90 uint8_t lqspi_buf[LQSPI_CACHE_SIZE]; 91 hwaddr lqspi_cached_addr; 92 Error *migration_blocker; 93 bool mmio_execution_enabled; 94 } XilinxQSPIPS; 95 96 typedef struct { 97 XilinxQSPIPS parent_obj; 98 99 StreamSlave *dma; 100 int gqspi_irqline; 101 102 uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX]; 103 104 /* GQSPI has seperate tx/rx fifos */ 105 Fifo8 rx_fifo_g; 106 Fifo8 tx_fifo_g; 107 Fifo32 fifo_g; 108 /* 109 * At the end of each generic command, misaligned extra bytes are discard 110 * or padded to tx and rx respectively to round it out (and avoid need for 111 * individual byte access. Since we use byte fifos, keep track of the 112 * alignment WRT to word access. 113 */ 114 uint8_t rx_fifo_g_align; 115 uint8_t tx_fifo_g_align; 116 bool man_start_com_g; 117 uint32_t dma_burst_size; 118 uint8_t dma_buf[QSPI_DMA_MAX_BURST_SIZE]; 119 } XlnxZynqMPQSPIPS; 120 121 typedef struct XilinxSPIPSClass { 122 SysBusDeviceClass parent_class; 123 124 const MemoryRegionOps *reg_ops; 125 126 uint32_t rx_fifo_size; 127 uint32_t tx_fifo_size; 128 } XilinxSPIPSClass; 129 130 #define TYPE_XILINX_SPIPS "xlnx.ps7-spi" 131 #define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi" 132 #define TYPE_XLNX_ZYNQMP_QSPIPS "xlnx.usmp-gqspi" 133 134 #define XILINX_SPIPS(obj) \ 135 OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS) 136 #define XILINX_SPIPS_CLASS(klass) \ 137 OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS) 138 #define XILINX_SPIPS_GET_CLASS(obj) \ 139 OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS) 140 141 #define XILINX_QSPIPS(obj) \ 142 OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS) 143 144 #define XLNX_ZYNQMP_QSPIPS(obj) \ 145 OBJECT_CHECK(XlnxZynqMPQSPIPS, (obj), TYPE_XLNX_ZYNQMP_QSPIPS) 146 147 #endif /* XILINX_SPIPS_H */ 148