1 /* QEMU Synchronous Serial Interface support. */ 2 3 /* In principle SSI is a point-point interface. As such the qemu 4 implementation has a single slave device on a "bus". 5 However it is fairly common for boards to have multiple slaves 6 connected to a single master, and select devices with an external 7 chip select. This is implemented in qemu by having an explicit mux device. 8 It is assumed that master and slave are both using the same transfer width. 9 */ 10 11 #ifndef QEMU_SSI_H 12 #define QEMU_SSI_H 13 14 #include "hw/qdev-core.h" 15 16 typedef struct SSISlave SSISlave; 17 typedef struct SSISlaveClass SSISlaveClass; 18 typedef enum SSICSMode SSICSMode; 19 20 #define TYPE_SSI_SLAVE "ssi-slave" 21 #define SSI_SLAVE(obj) \ 22 OBJECT_CHECK(SSISlave, (obj), TYPE_SSI_SLAVE) 23 #define SSI_SLAVE_CLASS(klass) \ 24 OBJECT_CLASS_CHECK(SSISlaveClass, (klass), TYPE_SSI_SLAVE) 25 #define SSI_SLAVE_GET_CLASS(obj) \ 26 OBJECT_GET_CLASS(SSISlaveClass, (obj), TYPE_SSI_SLAVE) 27 28 #define SSI_GPIO_CS "ssi-gpio-cs" 29 30 enum SSICSMode { 31 SSI_CS_NONE = 0, 32 SSI_CS_LOW, 33 SSI_CS_HIGH, 34 }; 35 36 /* Slave devices. */ 37 struct SSISlaveClass { 38 DeviceClass parent_class; 39 40 void (*realize)(SSISlave *dev, Error **errp); 41 42 /* if you have standard or no CS behaviour, just override transfer. 43 * This is called when the device cs is active (true by default). 44 */ 45 uint32_t (*transfer)(SSISlave *dev, uint32_t val); 46 /* called when the CS line changes. Optional, devices only need to implement 47 * this if they have side effects associated with the cs line (beyond 48 * tristating the txrx lines). 49 */ 50 int (*set_cs)(SSISlave *dev, bool select); 51 /* define whether or not CS exists and is active low/high */ 52 SSICSMode cs_polarity; 53 54 /* if you have non-standard CS behaviour override this to take control 55 * of the CS behaviour at the device level. transfer, set_cs, and 56 * cs_polarity are unused if this is overwritten. Transfer_raw will 57 * always be called for the device for every txrx access to the parent bus 58 */ 59 uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val); 60 }; 61 62 struct SSISlave { 63 DeviceState parent_obj; 64 65 /* Chip select state */ 66 bool cs; 67 }; 68 69 #define FROM_SSI_SLAVE(type, dev) DO_UPCAST(type, ssidev, dev) 70 71 extern const VMStateDescription vmstate_ssi_slave; 72 73 #define VMSTATE_SSI_SLAVE(_field, _state) { \ 74 .name = (stringify(_field)), \ 75 .size = sizeof(SSISlave), \ 76 .vmsd = &vmstate_ssi_slave, \ 77 .flags = VMS_STRUCT, \ 78 .offset = vmstate_offset_value(_state, _field, SSISlave), \ 79 } 80 81 DeviceState *ssi_create_slave(SSIBus *bus, const char *name); 82 DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name); 83 84 /* Master interface. */ 85 SSIBus *ssi_create_bus(DeviceState *parent, const char *name); 86 87 uint32_t ssi_transfer(SSIBus *bus, uint32_t val); 88 89 /* Automatically connect all children nodes a spi controller as slaves */ 90 void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_lines, 91 SSIBus *bus); 92 93 /* max111x.c */ 94 void max111x_set_input(DeviceState *dev, int line, uint8_t value); 95 96 #endif 97