xref: /openbmc/qemu/include/hw/ssi/pl022.h (revision 8fa3b702)
1 /*
2  * ARM PrimeCell PL022 Synchronous Serial Port
3  *
4  * Copyright (c) 2007 CodeSourcery.
5  * Written by Paul Brook
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 or
9  * (at your option) any later version.
10  */
11 
12 /* This is a model of the Arm PrimeCell PL022 synchronous serial port.
13  * The PL022 TRM is:
14  * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf
15  *
16  * QEMU interface:
17  * + sysbus IRQ: SSPINTR combined interrupt line
18  * + sysbus MMIO region 0: MemoryRegion for the device's registers
19  */
20 
21 #ifndef HW_SSI_PL022_H
22 #define HW_SSI_PL022_H
23 
24 #include "hw/sysbus.h"
25 #include "qom/object.h"
26 
27 #define TYPE_PL022 "pl022"
28 typedef struct PL022State PL022State;
29 DECLARE_INSTANCE_CHECKER(PL022State, PL022,
30                          TYPE_PL022)
31 
32 struct PL022State {
33     SysBusDevice parent_obj;
34 
35     MemoryRegion iomem;
36     uint32_t cr0;
37     uint32_t cr1;
38     uint32_t bitmask;
39     uint32_t sr;
40     uint32_t cpsr;
41     uint32_t is;
42     uint32_t im;
43     /* The FIFO head points to the next empty entry.  */
44     int tx_fifo_head;
45     int rx_fifo_head;
46     int tx_fifo_len;
47     int rx_fifo_len;
48     uint16_t tx_fifo[8];
49     uint16_t rx_fifo[8];
50     qemu_irq irq;
51     SSIBus *ssi;
52 };
53 
54 #endif
55