1 #ifndef SH_INTC_H 2 #define SH_INTC_H 3 4 #include "exec/memory.h" 5 6 typedef unsigned char intc_enum; 7 8 struct intc_vect { 9 intc_enum enum_id; 10 unsigned short vect; 11 }; 12 13 #define INTC_VECT(enum_id, vect) { enum_id, vect } 14 15 struct intc_group { 16 intc_enum enum_id; 17 intc_enum enum_ids[32]; 18 }; 19 20 #define INTC_GROUP(enum_id, ...) { enum_id, { __VA_ARGS__ } } 21 22 struct intc_mask_reg { 23 unsigned long set_reg, clr_reg, reg_width; 24 intc_enum enum_ids[32]; 25 unsigned long value; 26 }; 27 28 struct intc_prio_reg { 29 unsigned long set_reg, clr_reg, reg_width, field_width; 30 intc_enum enum_ids[16]; 31 unsigned long value; 32 }; 33 34 #define _INTC_ARRAY(a) a, ARRAY_SIZE(a) 35 36 struct intc_source { 37 unsigned short vect; 38 intc_enum next_enum_id; 39 40 int asserted; /* emulates the interrupt signal line from device to intc */ 41 int enable_count; 42 int enable_max; 43 int pending; /* emulates the result of signal and masking */ 44 struct intc_desc *parent; 45 }; 46 47 struct intc_desc { 48 MemoryRegion iomem; 49 MemoryRegion *iomem_aliases; 50 qemu_irq *irqs; 51 struct intc_source *sources; 52 int nr_sources; 53 struct intc_mask_reg *mask_regs; 54 int nr_mask_regs; 55 struct intc_prio_reg *prio_regs; 56 int nr_prio_regs; 57 int pending; /* number of interrupt sources that has pending set */ 58 }; 59 60 int sh_intc_get_pending_vector(struct intc_desc *desc, int imask); 61 62 void sh_intc_toggle_source(struct intc_source *source, 63 int enable_adj, int assert_adj); 64 65 void sh_intc_register_sources(struct intc_desc *desc, 66 struct intc_vect *vectors, 67 int nr_vectors, 68 struct intc_group *groups, 69 int nr_groups); 70 71 int sh_intc_init(MemoryRegion *sysmem, 72 struct intc_desc *desc, 73 int nr_sources, 74 struct intc_mask_reg *mask_regs, 75 int nr_mask_regs, 76 struct intc_prio_reg *prio_regs, 77 int nr_prio_regs); 78 79 void sh_intc_set_irl(void *opaque, int n, int level); 80 81 #endif /* SH_INTC_H */ 82