xref: /openbmc/qemu/include/hw/sh4/sh.h (revision 8692aa29)
1 #ifndef QEMU_SH_H
2 #define QEMU_SH_H
3 /* Definitions for SH board emulation.  */
4 
5 #include "hw/sh4/sh_intc.h"
6 #include "target-sh4/cpu-qom.h"
7 
8 #define A7ADDR(x) ((x) & 0x1fffffff)
9 #define P4ADDR(x) ((x) | 0xe0000000)
10 
11 /* sh7750.c */
12 struct SH7750State;
13 struct MemoryRegion;
14 
15 struct SH7750State *sh7750_init(SuperHCPU *cpu, struct MemoryRegion *sysmem);
16 
17 typedef struct {
18     /* The callback will be triggered if any of the designated lines change */
19     uint16_t portamask_trigger;
20     uint16_t portbmask_trigger;
21     /* Return 0 if no action was taken */
22     int (*port_change_cb) (uint16_t porta, uint16_t portb,
23 			   uint16_t * periph_pdtra,
24 			   uint16_t * periph_portdira,
25 			   uint16_t * periph_pdtrb,
26 			   uint16_t * periph_portdirb);
27 } sh7750_io_device;
28 
29 int sh7750_register_io_device(struct SH7750State *s,
30 			      sh7750_io_device * device);
31 /* sh_timer.c */
32 #define TMU012_FEAT_TOCR   (1 << 0)
33 #define TMU012_FEAT_3CHAN  (1 << 1)
34 #define TMU012_FEAT_EXTCLK (1 << 2)
35 void tmu012_init(struct MemoryRegion *sysmem, hwaddr base,
36                  int feat, uint32_t freq,
37 		 qemu_irq ch0_irq, qemu_irq ch1_irq,
38 		 qemu_irq ch2_irq0, qemu_irq ch2_irq1);
39 
40 
41 /* sh_serial.c */
42 #define SH_SERIAL_FEAT_SCIF (1 << 0)
43 void sh_serial_init(MemoryRegion *sysmem,
44                     hwaddr base, int feat,
45 		     uint32_t freq, CharDriverState *chr,
46 		     qemu_irq eri_source,
47 		     qemu_irq rxi_source,
48 		     qemu_irq txi_source,
49 		     qemu_irq tei_source,
50 		     qemu_irq bri_source);
51 
52 /* sh7750.c */
53 qemu_irq sh7750_irl(struct SH7750State *s);
54 
55 /* tc58128.c */
56 int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
57 
58 #endif
59