1 /* 2 * Definitions for SH board emulation 3 * 4 * Copyright (c) 2005 Samuel Tardieu 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 * 25 * SPDX-License-Identifier: MIT 26 */ 27 #ifndef QEMU_HW_SH_H 28 #define QEMU_HW_SH_H 29 30 #include "hw/sh4/sh_intc.h" 31 #include "target/sh4/cpu-qom.h" 32 33 #define A7ADDR(x) ((x) & 0x1fffffff) 34 #define P4ADDR(x) ((x) | 0xe0000000) 35 36 /* sh7750.c */ 37 struct SH7750State; 38 39 struct SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem); 40 41 typedef struct { 42 /* The callback will be triggered if any of the designated lines change */ 43 uint16_t portamask_trigger; 44 uint16_t portbmask_trigger; 45 /* Return 0 if no action was taken */ 46 int (*port_change_cb) (uint16_t porta, uint16_t portb, 47 uint16_t * periph_pdtra, 48 uint16_t * periph_portdira, 49 uint16_t * periph_pdtrb, 50 uint16_t * periph_portdirb); 51 } sh7750_io_device; 52 53 int sh7750_register_io_device(struct SH7750State *s, 54 sh7750_io_device * device); 55 56 /* sh_serial.c */ 57 #define SH_SERIAL_FEAT_SCIF (1 << 0) 58 void sh_serial_init(MemoryRegion *sysmem, 59 hwaddr base, int feat, 60 uint32_t freq, Chardev *chr, 61 qemu_irq eri_source, 62 qemu_irq rxi_source, 63 qemu_irq txi_source, 64 qemu_irq tei_source, 65 qemu_irq bri_source); 66 67 /* sh7750.c */ 68 qemu_irq sh7750_irl(struct SH7750State *s); 69 70 /* tc58128.c */ 71 int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); 72 73 #endif 74