18092b518SShengtan Mao /* 28092b518SShengtan Mao * NPCM7xx SD-3.0 / eMMC-4.51 Host Controller 38092b518SShengtan Mao * 48092b518SShengtan Mao * Copyright (c) 2021 Google LLC 58092b518SShengtan Mao * 68092b518SShengtan Mao * This program is free software; you can redistribute it and/or modify it 78092b518SShengtan Mao * under the terms of the GNU General Public License as published by the 88092b518SShengtan Mao * Free Software Foundation; either version 2 of the License, or 98092b518SShengtan Mao * (at your option) any later version. 108092b518SShengtan Mao * 118092b518SShengtan Mao * This program is distributed in the hope that it will be useful, but WITHOUT 128092b518SShengtan Mao * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 138092b518SShengtan Mao * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 148092b518SShengtan Mao * for more details. 158092b518SShengtan Mao */ 168092b518SShengtan Mao 178092b518SShengtan Mao #ifndef NPCM7XX_SDHCI_H 188092b518SShengtan Mao #define NPCM7XX_SDHCI_H 198092b518SShengtan Mao 208092b518SShengtan Mao #include "hw/sd/sdhci.h" 218092b518SShengtan Mao #include "qom/object.h" 228092b518SShengtan Mao 238092b518SShengtan Mao #define TYPE_NPCM7XX_SDHCI "npcm7xx.sdhci" 248092b518SShengtan Mao #define NPCM7XX_PRSTVALS_SIZE 6 258092b518SShengtan Mao #define NPCM7XX_PRSTVALS 0x60 268092b518SShengtan Mao #define NPCM7XX_PRSTVALS_0 0x0 278092b518SShengtan Mao #define NPCM7XX_PRSTVALS_1 0x2 288092b518SShengtan Mao #define NPCM7XX_PRSTVALS_2 0x4 298092b518SShengtan Mao #define NPCM7XX_PRSTVALS_3 0x6 308092b518SShengtan Mao #define NPCM7XX_PRSTVALS_4 0x8 318092b518SShengtan Mao #define NPCM7XX_PRSTVALS_5 0xA 328092b518SShengtan Mao #define NPCM7XX_BOOTTOCTRL 0x10 338092b518SShengtan Mao #define NPCM7XX_SDHCI_REGSIZE 0x20 348092b518SShengtan Mao 358092b518SShengtan Mao #define NPCM7XX_PRSNTS_RESET 0x04A00000 368092b518SShengtan Mao #define NPCM7XX_BLKGAP_RESET 0x80 378092b518SShengtan Mao #define NPCM7XX_CAPAB_RESET 0x0100200161EE0399 388092b518SShengtan Mao #define NPCM7XX_MAXCURR_RESET 0x0000000000000005 398092b518SShengtan Mao #define NPCM7XX_HCVER_RESET 0x1002 408092b518SShengtan Mao 418092b518SShengtan Mao #define NPCM7XX_PRSTVALS_0_RESET 0x0040 428092b518SShengtan Mao #define NPCM7XX_PRSTVALS_1_RESET 0x0001 438092b518SShengtan Mao #define NPCM7XX_PRSTVALS_3_RESET 0x0001 448092b518SShengtan Mao 458092b518SShengtan Mao OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxSDHCIState, NPCM7XX_SDHCI) 468092b518SShengtan Mao 478092b518SShengtan Mao typedef struct NPCM7xxRegs { 488092b518SShengtan Mao /* Preset Values Register Field, read-only */ 498092b518SShengtan Mao uint16_t prstvals[NPCM7XX_PRSTVALS_SIZE]; 508092b518SShengtan Mao /* Boot Timeout Control Register, read-write */ 518092b518SShengtan Mao uint32_t boottoctrl; 528092b518SShengtan Mao } NPCM7xxRegisters; 538092b518SShengtan Mao 54*c79aa350SPhilippe Mathieu-Daudé struct NPCM7xxSDHCIState { 558092b518SShengtan Mao SysBusDevice parent; 568092b518SShengtan Mao 578092b518SShengtan Mao MemoryRegion container; 588092b518SShengtan Mao MemoryRegion iomem; 598092b518SShengtan Mao BusState *bus; 608092b518SShengtan Mao NPCM7xxRegisters regs; 618092b518SShengtan Mao 628092b518SShengtan Mao SDHCIState sdhci; 63*c79aa350SPhilippe Mathieu-Daudé }; 648092b518SShengtan Mao 658092b518SShengtan Mao #endif /* NPCM7XX_SDHCI_H */ 66