1 /* 2 * SCLP Support 3 * 4 * Copyright IBM, Corp. 2012 5 * 6 * Authors: 7 * Christian Borntraeger <borntraeger@de.ibm.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or (at your 10 * option) any later version. See the COPYING file in the top-level directory. 11 * 12 */ 13 14 #ifndef HW_S390_SCLP_H 15 #define HW_S390_SCLP_H 16 17 #include "hw/sysbus.h" 18 #include "hw/qdev.h" 19 20 #define SCLP_CMD_CODE_MASK 0xffff00ff 21 22 /* SCLP command codes */ 23 #define SCLP_CMDW_READ_SCP_INFO 0x00020001 24 #define SCLP_CMDW_READ_SCP_INFO_FORCED 0x00120001 25 #define SCLP_READ_STORAGE_ELEMENT_INFO 0x00040001 26 #define SCLP_ATTACH_STORAGE_ELEMENT 0x00080001 27 #define SCLP_ASSIGN_STORAGE 0x000D0001 28 #define SCLP_UNASSIGN_STORAGE 0x000C0001 29 #define SCLP_CMD_READ_EVENT_DATA 0x00770005 30 #define SCLP_CMD_WRITE_EVENT_DATA 0x00760005 31 #define SCLP_CMD_WRITE_EVENT_MASK 0x00780005 32 33 /* SCLP Memory hotplug codes */ 34 #define SCLP_FC_ASSIGN_ATTACH_READ_STOR 0xE00000000000ULL 35 #define SCLP_STARTING_SUBINCREMENT_ID 0x10001 36 #define SCLP_INCREMENT_UNIT 0x10000 37 #define MAX_AVAIL_SLOTS 32 38 #define MAX_STORAGE_INCREMENTS 1020 39 40 /* CPU hotplug SCLP codes */ 41 #define SCLP_HAS_CPU_INFO 0x0C00000000000000ULL 42 #define SCLP_CMDW_READ_CPU_INFO 0x00010001 43 #define SCLP_CMDW_CONFIGURE_CPU 0x00110001 44 #define SCLP_CMDW_DECONFIGURE_CPU 0x00100001 45 46 /* SCLP PCI codes */ 47 #define SCLP_HAS_PCI_RECONFIG 0x0000000040000000ULL 48 #define SCLP_CMDW_CONFIGURE_PCI 0x001a0001 49 #define SCLP_CMDW_DECONFIGURE_PCI 0x001b0001 50 #define SCLP_RECONFIG_PCI_ATPYE 2 51 52 /* SCLP response codes */ 53 #define SCLP_RC_NORMAL_READ_COMPLETION 0x0010 54 #define SCLP_RC_NORMAL_COMPLETION 0x0020 55 #define SCLP_RC_SCCB_BOUNDARY_VIOLATION 0x0100 56 #define SCLP_RC_NO_ACTION_REQUIRED 0x0120 57 #define SCLP_RC_INVALID_SCLP_COMMAND 0x01f0 58 #define SCLP_RC_CONTAINED_EQUIPMENT_CHECK 0x0340 59 #define SCLP_RC_INSUFFICIENT_SCCB_LENGTH 0x0300 60 #define SCLP_RC_STANDBY_READ_COMPLETION 0x0410 61 #define SCLP_RC_ADAPTER_IN_RESERVED_STATE 0x05f0 62 #define SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED 0x09f0 63 #define SCLP_RC_INVALID_FUNCTION 0x40f0 64 #define SCLP_RC_NO_EVENT_BUFFERS_STORED 0x60f0 65 #define SCLP_RC_INVALID_SELECTION_MASK 0x70f0 66 #define SCLP_RC_INCONSISTENT_LENGTHS 0x72f0 67 #define SCLP_RC_EVENT_BUFFER_SYNTAX_ERROR 0x73f0 68 #define SCLP_RC_INVALID_MASK_LENGTH 0x74f0 69 70 71 /* Service Call Control Block (SCCB) and its elements */ 72 73 #define SCCB_SIZE 4096 74 75 #define SCLP_VARIABLE_LENGTH_RESPONSE 0x80 76 #define SCLP_EVENT_BUFFER_ACCEPTED 0x80 77 78 #define SCLP_FC_NORMAL_WRITE 0 79 80 /* 81 * Normally packed structures are not the right thing to do, since all code 82 * must take care of endianness. We cannot use ldl_phys and friends for two 83 * reasons, though: 84 * - some of the embedded structures below the SCCB can appear multiple times 85 * at different locations, so there is no fixed offset 86 * - we work on a private copy of the SCCB, since there are several length 87 * fields, that would cause a security nightmare if we allow the guest to 88 * alter the structure while we parse it. We cannot use ldl_p and friends 89 * either without doing pointer arithmetics 90 * So we have to double check that all users of sclp data structures use the 91 * right endianness wrappers. 92 */ 93 typedef struct SCCBHeader { 94 uint16_t length; 95 uint8_t function_code; 96 uint8_t control_mask[3]; 97 uint16_t response_code; 98 } QEMU_PACKED SCCBHeader; 99 100 #define SCCB_DATA_LEN (SCCB_SIZE - sizeof(SCCBHeader)) 101 #define SCCB_CPU_FEATURE_LEN 6 102 103 /* CPU information */ 104 typedef struct CPUEntry { 105 uint8_t address; 106 uint8_t reserved0; 107 uint8_t features[SCCB_CPU_FEATURE_LEN]; 108 uint8_t reserved2[6]; 109 uint8_t type; 110 uint8_t reserved1; 111 } QEMU_PACKED CPUEntry; 112 113 typedef struct ReadInfo { 114 SCCBHeader h; 115 uint16_t rnmax; 116 uint8_t rnsize; 117 uint8_t _reserved1[16 - 11]; /* 11-15 */ 118 uint16_t entries_cpu; /* 16-17 */ 119 uint16_t offset_cpu; /* 18-19 */ 120 uint8_t _reserved2[24 - 20]; /* 20-23 */ 121 uint8_t loadparm[8]; /* 24-31 */ 122 uint8_t _reserved3[48 - 32]; /* 32-47 */ 123 uint64_t facilities; /* 48-55 */ 124 uint8_t _reserved0[76 - 56]; /* 56-75 */ 125 uint32_t ibc_val; 126 uint8_t conf_char[96 - 80]; /* 80-95 */ 127 uint8_t _reserved4[99 - 96]; /* 96-98 */ 128 uint8_t mha_pow; 129 uint32_t rnsize2; 130 uint64_t rnmax2; 131 uint8_t _reserved6[116 - 112]; /* 112-115 */ 132 uint8_t conf_char_ext[120 - 116]; /* 116-119 */ 133 uint16_t highest_cpu; 134 uint8_t _reserved5[124 - 122]; /* 122-123 */ 135 uint32_t hmfai; 136 struct CPUEntry entries[0]; 137 } QEMU_PACKED ReadInfo; 138 139 typedef struct ReadCpuInfo { 140 SCCBHeader h; 141 uint16_t nr_configured; /* 8-9 */ 142 uint16_t offset_configured; /* 10-11 */ 143 uint16_t nr_standby; /* 12-13 */ 144 uint16_t offset_standby; /* 14-15 */ 145 uint8_t reserved0[24-16]; /* 16-23 */ 146 struct CPUEntry entries[0]; 147 } QEMU_PACKED ReadCpuInfo; 148 149 typedef struct ReadStorageElementInfo { 150 SCCBHeader h; 151 uint16_t max_id; 152 uint16_t assigned; 153 uint16_t standby; 154 uint8_t _reserved0[16 - 14]; /* 14-15 */ 155 uint32_t entries[0]; 156 } QEMU_PACKED ReadStorageElementInfo; 157 158 typedef struct AttachStorageElement { 159 SCCBHeader h; 160 uint8_t _reserved0[10 - 8]; /* 8-9 */ 161 uint16_t assigned; 162 uint8_t _reserved1[16 - 12]; /* 12-15 */ 163 uint32_t entries[0]; 164 } QEMU_PACKED AttachStorageElement; 165 166 typedef struct AssignStorage { 167 SCCBHeader h; 168 uint16_t rn; 169 } QEMU_PACKED AssignStorage; 170 171 typedef struct SCCB { 172 SCCBHeader h; 173 char data[SCCB_DATA_LEN]; 174 } QEMU_PACKED SCCB; 175 176 #define TYPE_SCLP "sclp" 177 #define SCLP(obj) OBJECT_CHECK(SCLPDevice, (obj), TYPE_SCLP) 178 #define SCLP_CLASS(oc) OBJECT_CLASS_CHECK(SCLPDeviceClass, (oc), TYPE_SCLP) 179 #define SCLP_GET_CLASS(obj) OBJECT_GET_CLASS(SCLPDeviceClass, (obj), TYPE_SCLP) 180 181 typedef struct SCLPEventFacility SCLPEventFacility; 182 183 typedef struct SCLPDevice { 184 /* private */ 185 DeviceState parent_obj; 186 SCLPEventFacility *event_facility; 187 int increment_size; 188 189 /* public */ 190 } SCLPDevice; 191 192 typedef struct SCLPDeviceClass { 193 /* private */ 194 DeviceClass parent_class; 195 void (*read_SCP_info)(SCLPDevice *sclp, SCCB *sccb); 196 void (*read_storage_element0_info)(SCLPDevice *sclp, SCCB *sccb); 197 void (*read_storage_element1_info)(SCLPDevice *sclp, SCCB *sccb); 198 void (*attach_storage_element)(SCLPDevice *sclp, SCCB *sccb, 199 uint16_t element); 200 void (*assign_storage)(SCLPDevice *sclp, SCCB *sccb); 201 void (*unassign_storage)(SCLPDevice *sclp, SCCB *sccb); 202 void (*read_cpu_info)(SCLPDevice *sclp, SCCB *sccb); 203 204 /* public */ 205 void (*execute)(SCLPDevice *sclp, SCCB *sccb, uint32_t code); 206 void (*service_interrupt)(SCLPDevice *sclp, uint32_t sccb); 207 } SCLPDeviceClass; 208 209 typedef struct sclpMemoryHotplugDev sclpMemoryHotplugDev; 210 211 #define TYPE_SCLP_MEMORY_HOTPLUG_DEV "sclp-memory-hotplug-dev" 212 #define SCLP_MEMORY_HOTPLUG_DEV(obj) \ 213 OBJECT_CHECK(sclpMemoryHotplugDev, (obj), TYPE_SCLP_MEMORY_HOTPLUG_DEV) 214 215 struct sclpMemoryHotplugDev { 216 SysBusDevice parent; 217 ram_addr_t standby_mem_size; 218 ram_addr_t padded_ram_size; 219 ram_addr_t pad_size; 220 ram_addr_t standby_subregion_size; 221 ram_addr_t rzm; 222 int increment_size; 223 char *standby_state_map; 224 }; 225 226 static inline int sccb_data_len(SCCB *sccb) 227 { 228 return be16_to_cpu(sccb->h.length) - sizeof(sccb->h); 229 } 230 231 232 void s390_sclp_init(void); 233 sclpMemoryHotplugDev *init_sclp_memory_hotplug_dev(void); 234 sclpMemoryHotplugDev *get_sclp_memory_hotplug_dev(void); 235 void sclp_service_interrupt(uint32_t sccb); 236 void raise_irq_cpu_hotplug(void); 237 238 #endif 239