1 /* 2 * s390 CLP instruction definitions 3 * 4 * Copyright 2019 IBM Corp. 5 * Author(s): Pierre Morel <pmorel@de.ibm.com> 6 * 7 * This work is licensed under the terms of the GNU GPL, version 2 or (at 8 * your option) any later version. See the COPYING file in the top-level 9 * directory. 10 */ 11 12 #ifndef HW_S390_PCI_CLP_H 13 #define HW_S390_PCI_CLP_H 14 15 /* CLP common request & response block size */ 16 #define CLP_BLK_SIZE 4096 17 #define PCI_BAR_COUNT 6 18 #define PCI_MAX_FUNCTIONS 4096 19 20 typedef struct ClpReqHdr { 21 uint16_t len; 22 uint16_t cmd; 23 } QEMU_PACKED ClpReqHdr; 24 25 typedef struct ClpRspHdr { 26 uint16_t len; 27 uint16_t rsp; 28 } QEMU_PACKED ClpRspHdr; 29 30 /* CLP Response Codes */ 31 #define CLP_RC_OK 0x0010 /* Command request successfully */ 32 #define CLP_RC_CMD 0x0020 /* Command code not recognized */ 33 #define CLP_RC_PERM 0x0030 /* Command not authorized */ 34 #define CLP_RC_FMT 0x0040 /* Invalid command request format */ 35 #define CLP_RC_LEN 0x0050 /* Invalid command request length */ 36 #define CLP_RC_8K 0x0060 /* Command requires 8K LPCB */ 37 #define CLP_RC_RESNOT0 0x0070 /* Reserved field not zero */ 38 #define CLP_RC_NODATA 0x0080 /* No data available */ 39 #define CLP_RC_FC_UNKNOWN 0x0100 /* Function code not recognized */ 40 41 /* 42 * Call Logical Processor - Command Codes 43 */ 44 #define CLP_LIST_PCI 0x0002 45 #define CLP_QUERY_PCI_FN 0x0003 46 #define CLP_QUERY_PCI_FNGRP 0x0004 47 #define CLP_SET_PCI_FN 0x0005 48 49 /* PCI function handle list entry */ 50 typedef struct ClpFhListEntry { 51 uint16_t device_id; 52 uint16_t vendor_id; 53 #define CLP_FHLIST_MASK_CONFIG 0x80000000 54 uint32_t config; 55 uint32_t fid; 56 uint32_t fh; 57 } QEMU_PACKED ClpFhListEntry; 58 59 #define CLP_RC_SETPCIFN_FH 0x0101 /* Invalid PCI fn handle */ 60 #define CLP_RC_SETPCIFN_FHOP 0x0102 /* Fn handle not valid for op */ 61 #define CLP_RC_SETPCIFN_DMAAS 0x0103 /* Invalid DMA addr space */ 62 #define CLP_RC_SETPCIFN_RES 0x0104 /* Insufficient resources */ 63 #define CLP_RC_SETPCIFN_ALRDY 0x0105 /* Fn already in requested state */ 64 #define CLP_RC_SETPCIFN_ERR 0x0106 /* Fn in permanent error state */ 65 #define CLP_RC_SETPCIFN_RECPND 0x0107 /* Error recovery pending */ 66 #define CLP_RC_SETPCIFN_BUSY 0x0108 /* Fn busy */ 67 #define CLP_RC_LISTPCI_BADRT 0x010a /* Resume token not recognized */ 68 #define CLP_RC_QUERYPCIFG_PFGID 0x010b /* Unrecognized PFGID */ 69 70 /* request or response block header length */ 71 #define LIST_PCI_HDR_LEN 32 72 73 /* Number of function handles fitting in response block */ 74 #define CLP_FH_LIST_NR_ENTRIES \ 75 ((CLP_BLK_SIZE - 2 * LIST_PCI_HDR_LEN) \ 76 / sizeof(ClpFhListEntry)) 77 78 #define CLP_SET_ENABLE_PCI_FN 0 /* Yes, 0 enables it */ 79 #define CLP_SET_DISABLE_PCI_FN 1 /* Yes, 1 disables it */ 80 81 #define CLP_UTIL_STR_LEN 64 82 #define CLP_PFIP_NR_SEGMENTS 4 83 84 #define CLP_MASK_FMT 0xf0000000 85 86 /* List PCI functions request */ 87 typedef struct ClpReqListPci { 88 ClpReqHdr hdr; 89 uint32_t fmt; 90 uint64_t reserved1; 91 uint64_t resume_token; 92 uint64_t reserved2; 93 } QEMU_PACKED ClpReqListPci; 94 95 /* List PCI functions response */ 96 typedef struct ClpRspListPci { 97 ClpRspHdr hdr; 98 uint32_t fmt; 99 uint64_t reserved1; 100 uint64_t resume_token; 101 uint32_t mdd; 102 uint16_t max_fn; 103 uint8_t flags; 104 uint8_t entry_size; 105 ClpFhListEntry fh_list[CLP_FH_LIST_NR_ENTRIES]; 106 } QEMU_PACKED ClpRspListPci; 107 108 /* Query PCI function request */ 109 typedef struct ClpReqQueryPci { 110 ClpReqHdr hdr; 111 uint32_t fmt; 112 uint64_t reserved1; 113 uint32_t fh; /* function handle */ 114 uint32_t reserved2; 115 uint64_t reserved3; 116 } QEMU_PACKED ClpReqQueryPci; 117 118 /* Query PCI function response */ 119 typedef struct ClpRspQueryPci { 120 ClpRspHdr hdr; 121 uint32_t fmt; 122 uint64_t reserved1; 123 uint16_t vfn; /* virtual fn number */ 124 #define CLP_RSP_QPCI_MASK_UTIL 0x01 125 uint8_t flags; 126 uint8_t pfgid; 127 uint32_t fid; /* pci function id */ 128 uint8_t bar_size[PCI_BAR_COUNT]; 129 uint16_t pchid; 130 uint32_t bar[PCI_BAR_COUNT]; 131 uint8_t pfip[CLP_PFIP_NR_SEGMENTS]; 132 uint16_t reserved2; 133 uint8_t fmbl; 134 uint8_t pft; 135 uint64_t sdma; /* start dma as */ 136 uint64_t edma; /* end dma as */ 137 uint32_t reserved3[11]; 138 uint32_t uid; 139 uint8_t util_str[CLP_UTIL_STR_LEN]; /* utility string */ 140 } QEMU_PACKED ClpRspQueryPci; 141 142 /* Query PCI function group request */ 143 typedef struct ClpReqQueryPciGrp { 144 ClpReqHdr hdr; 145 uint32_t fmt; 146 uint64_t reserved1; 147 uint8_t reserved2[3]; 148 uint8_t g; 149 uint32_t reserved3; 150 uint64_t reserved4; 151 } QEMU_PACKED ClpReqQueryPciGrp; 152 153 /* Query PCI function group response */ 154 typedef struct ClpRspQueryPciGrp { 155 ClpRspHdr hdr; 156 uint32_t fmt; 157 uint64_t reserved1; 158 #define CLP_RSP_QPCIG_MASK_NOI 0xfff 159 uint16_t i; 160 uint8_t version; 161 #define CLP_RSP_QPCIG_MASK_FRAME 0x2 162 #define CLP_RSP_QPCIG_MASK_REFRESH 0x1 163 uint8_t fr; 164 uint16_t maxstbl; 165 uint16_t mui; 166 uint8_t dtsm; 167 uint8_t reserved3[7]; 168 uint64_t dasm; /* dma address space mask */ 169 uint64_t msia; /* MSI address */ 170 uint64_t reserved4; 171 uint64_t reserved5; 172 } QEMU_PACKED ClpRspQueryPciGrp; 173 174 /* Set PCI function request */ 175 typedef struct ClpReqSetPci { 176 ClpReqHdr hdr; 177 uint32_t fmt; 178 uint64_t reserved1; 179 uint32_t fh; /* function handle */ 180 uint16_t reserved2; 181 uint8_t oc; /* operation controls */ 182 uint8_t ndas; /* number of dma spaces */ 183 uint64_t reserved3; 184 } QEMU_PACKED ClpReqSetPci; 185 186 /* Set PCI function response */ 187 typedef struct ClpRspSetPci { 188 ClpRspHdr hdr; 189 uint32_t fmt; 190 uint64_t reserved1; 191 uint32_t fh; /* function handle */ 192 uint32_t reserved3; 193 uint64_t reserved4; 194 } QEMU_PACKED ClpRspSetPci; 195 196 typedef struct ClpReqRspListPci { 197 ClpReqListPci request; 198 ClpRspListPci response; 199 } QEMU_PACKED ClpReqRspListPci; 200 201 typedef struct ClpReqRspSetPci { 202 ClpReqSetPci request; 203 ClpRspSetPci response; 204 } QEMU_PACKED ClpReqRspSetPci; 205 206 typedef struct ClpReqRspQueryPci { 207 ClpReqQueryPci request; 208 ClpRspQueryPci response; 209 } QEMU_PACKED ClpReqRspQueryPci; 210 211 typedef struct ClpReqRspQueryPciGrp { 212 ClpReqQueryPciGrp request; 213 ClpRspQueryPciGrp response; 214 } QEMU_PACKED ClpReqRspQueryPciGrp; 215 216 #endif 217