1*ba3658adSJared Rossi /* 2*ba3658adSJared Rossi * S/390 boot structures 3*ba3658adSJared Rossi * 4*ba3658adSJared Rossi * Copyright 2024 IBM Corp. 5*ba3658adSJared Rossi * Author(s): Jared Rossi <jrossi@linux.ibm.com> 6*ba3658adSJared Rossi * 7*ba3658adSJared Rossi * This work is licensed under the terms of the GNU GPL, version 2 or (at 8*ba3658adSJared Rossi * your option) any later version. See the COPYING file in the top-level 9*ba3658adSJared Rossi * directory. 10*ba3658adSJared Rossi */ 11*ba3658adSJared Rossi 12*ba3658adSJared Rossi #ifndef S390X_QIPL_H 13*ba3658adSJared Rossi #define S390X_QIPL_H 14*ba3658adSJared Rossi 15*ba3658adSJared Rossi /* Boot Menu flags */ 16*ba3658adSJared Rossi #define QIPL_FLAG_BM_OPTS_CMD 0x80 17*ba3658adSJared Rossi #define QIPL_FLAG_BM_OPTS_ZIPL 0x40 18*ba3658adSJared Rossi 19*ba3658adSJared Rossi #define QIPL_ADDRESS 0xcc 20*ba3658adSJared Rossi #define LOADPARM_LEN 8 21*ba3658adSJared Rossi 22*ba3658adSJared Rossi /* 23*ba3658adSJared Rossi * The QEMU IPL Parameters will be stored at absolute address 24*ba3658adSJared Rossi * 204 (0xcc) which means it is 32-bit word aligned but not 25*ba3658adSJared Rossi * double-word aligned. Placement of 64-bit data fields in this 26*ba3658adSJared Rossi * area must account for their alignment needs. 27*ba3658adSJared Rossi * The total size of the struct must never exceed 28 bytes. 28*ba3658adSJared Rossi */ 29*ba3658adSJared Rossi struct QemuIplParameters { 30*ba3658adSJared Rossi uint8_t qipl_flags; 31*ba3658adSJared Rossi uint8_t reserved1[3]; 32*ba3658adSJared Rossi uint64_t reserved2; 33*ba3658adSJared Rossi uint32_t boot_menu_timeout; 34*ba3658adSJared Rossi uint8_t reserved3[12]; 35*ba3658adSJared Rossi } QEMU_PACKED; 36*ba3658adSJared Rossi typedef struct QemuIplParameters QemuIplParameters; 37*ba3658adSJared Rossi 38*ba3658adSJared Rossi struct IPLBlockPVComp { 39*ba3658adSJared Rossi uint64_t tweak_pref; 40*ba3658adSJared Rossi uint64_t addr; 41*ba3658adSJared Rossi uint64_t size; 42*ba3658adSJared Rossi } QEMU_PACKED; 43*ba3658adSJared Rossi typedef struct IPLBlockPVComp IPLBlockPVComp; 44*ba3658adSJared Rossi 45*ba3658adSJared Rossi struct IPLBlockPV { 46*ba3658adSJared Rossi uint8_t reserved18[87]; /* 0x18 */ 47*ba3658adSJared Rossi uint8_t version; /* 0x6f */ 48*ba3658adSJared Rossi uint32_t reserved70; /* 0x70 */ 49*ba3658adSJared Rossi uint32_t num_comp; /* 0x74 */ 50*ba3658adSJared Rossi uint64_t pv_header_addr; /* 0x78 */ 51*ba3658adSJared Rossi uint64_t pv_header_len; /* 0x80 */ 52*ba3658adSJared Rossi struct IPLBlockPVComp components[0]; 53*ba3658adSJared Rossi } QEMU_PACKED; 54*ba3658adSJared Rossi typedef struct IPLBlockPV IPLBlockPV; 55*ba3658adSJared Rossi 56*ba3658adSJared Rossi struct IplBlockCcw { 57*ba3658adSJared Rossi uint8_t reserved0[85]; 58*ba3658adSJared Rossi uint8_t ssid; 59*ba3658adSJared Rossi uint16_t devno; 60*ba3658adSJared Rossi uint8_t vm_flags; 61*ba3658adSJared Rossi uint8_t reserved3[3]; 62*ba3658adSJared Rossi uint32_t vm_parm_len; 63*ba3658adSJared Rossi uint8_t nss_name[8]; 64*ba3658adSJared Rossi uint8_t vm_parm[64]; 65*ba3658adSJared Rossi uint8_t reserved4[8]; 66*ba3658adSJared Rossi } QEMU_PACKED; 67*ba3658adSJared Rossi typedef struct IplBlockCcw IplBlockCcw; 68*ba3658adSJared Rossi 69*ba3658adSJared Rossi struct IplBlockFcp { 70*ba3658adSJared Rossi uint8_t reserved1[305 - 1]; 71*ba3658adSJared Rossi uint8_t opt; 72*ba3658adSJared Rossi uint8_t reserved2[3]; 73*ba3658adSJared Rossi uint16_t reserved3; 74*ba3658adSJared Rossi uint16_t devno; 75*ba3658adSJared Rossi uint8_t reserved4[4]; 76*ba3658adSJared Rossi uint64_t wwpn; 77*ba3658adSJared Rossi uint64_t lun; 78*ba3658adSJared Rossi uint32_t bootprog; 79*ba3658adSJared Rossi uint8_t reserved5[12]; 80*ba3658adSJared Rossi uint64_t br_lba; 81*ba3658adSJared Rossi uint32_t scp_data_len; 82*ba3658adSJared Rossi uint8_t reserved6[260]; 83*ba3658adSJared Rossi uint8_t scp_data[0]; 84*ba3658adSJared Rossi } QEMU_PACKED; 85*ba3658adSJared Rossi typedef struct IplBlockFcp IplBlockFcp; 86*ba3658adSJared Rossi 87*ba3658adSJared Rossi struct IplBlockQemuScsi { 88*ba3658adSJared Rossi uint32_t lun; 89*ba3658adSJared Rossi uint16_t target; 90*ba3658adSJared Rossi uint16_t channel; 91*ba3658adSJared Rossi uint8_t reserved0[77]; 92*ba3658adSJared Rossi uint8_t ssid; 93*ba3658adSJared Rossi uint16_t devno; 94*ba3658adSJared Rossi } QEMU_PACKED; 95*ba3658adSJared Rossi typedef struct IplBlockQemuScsi IplBlockQemuScsi; 96*ba3658adSJared Rossi 97*ba3658adSJared Rossi union IplParameterBlock { 98*ba3658adSJared Rossi struct { 99*ba3658adSJared Rossi uint32_t len; 100*ba3658adSJared Rossi uint8_t reserved0[3]; 101*ba3658adSJared Rossi uint8_t version; 102*ba3658adSJared Rossi uint32_t blk0_len; 103*ba3658adSJared Rossi uint8_t pbt; 104*ba3658adSJared Rossi uint8_t flags; 105*ba3658adSJared Rossi uint16_t reserved01; 106*ba3658adSJared Rossi uint8_t loadparm[LOADPARM_LEN]; 107*ba3658adSJared Rossi union { 108*ba3658adSJared Rossi IplBlockCcw ccw; 109*ba3658adSJared Rossi IplBlockFcp fcp; 110*ba3658adSJared Rossi IPLBlockPV pv; 111*ba3658adSJared Rossi IplBlockQemuScsi scsi; 112*ba3658adSJared Rossi }; 113*ba3658adSJared Rossi } QEMU_PACKED; 114*ba3658adSJared Rossi struct { 115*ba3658adSJared Rossi uint8_t reserved1[110]; 116*ba3658adSJared Rossi uint16_t devno; 117*ba3658adSJared Rossi uint8_t reserved2[88]; 118*ba3658adSJared Rossi uint8_t reserved_ext[4096 - 200]; 119*ba3658adSJared Rossi } QEMU_PACKED; 120*ba3658adSJared Rossi } QEMU_PACKED; 121*ba3658adSJared Rossi typedef union IplParameterBlock IplParameterBlock; 122*ba3658adSJared Rossi 123*ba3658adSJared Rossi #endif 124